Overview

Request 5637 (accepted)

- Update to new version r8168-8.051.02
- Delete patch r8168-kernel_5.18.patch now upstream
- Add patch r8168-support-linux-6.1.0.patch
- Add patch r8168-support-dev0x8136.patch to support
Realtek Semiconductor Co.,
Ltd. RTL810xE PCI Express Fast Ethernet controller [10ec:8136] (rev 05)

Submit package home:bitstreamout:Essentials / r8168 to package Essentials / r8168
View file
r8168.changes Changed
​x
 
1
@@ -1,4 +1,14 @@
2
 -------------------------------------------------------------------
3
+Wed Dec 14 13:42:47 UTC 2022 - Dr. Werner Fink <werner@suse.de>
4
+
5
+- Update to new version r8168-8.051.02
6
+- Delete patch r8168-kernel_5.18.patch now upstream
7
+- Add patch r8168-support-linux-6.1.0.patch
8
+- Add patch r8168-support-dev0x8136.patch to support
9
+  Realtek Semiconductor Co.,
10
+  Ltd. RTL810xE PCI Express Fast Ethernet controller 10ec:8136 (rev 05)
11
+
12
+-------------------------------------------------------------------
13
 Tue Dec  6 11:31:36 UTC 2022 - Werner Fink <werner.fink@opensuse.org>
14
15
 - Switch over to build require %kernel_module_package_buildreqs macro
16
​
View file
r8168.spec Changed
33
 
1
@@ -18,7 +18,7 @@
2
3
 #!BuildIgnore: enough-build-resources
4
 Name:           r8168
5
-Version:        8.050.03
6
+Version:        8.051.02
7
 Release:        0
8
 Summary:        Device driver for RealTek Gigabit Ethernet controllers
9
 License:        GPL-2.0-or-later
10
@@ -29,8 +29,9 @@
11
 Source2:        Module.supported
12
 Patch0:         r8168-kernel_version.patch
13
 Patch1:         r8168-configuration.patch
14
-Patch2:         r8168-kernel_5.18.patch
15
-Patch3:         r8168-support-linux-5.19.patch
16
+Patch2:         r8168-support-linux-5.19.patch
17
+Patch3:         r8168-support-linux-6.1.0.patch
18
+Patch4:         r8168-support-dev0x8136.patch
19
 BuildRequires:  kernel-source
20
 BuildRequires:  kernel-syms
21
 BuildRequires:  libelf-devel
22
@@ -60,8 +61,9 @@
23
 %setup -q
24
 %patch0 -b .p0
25
 %patch1 -b .p1
26
-%patch2 -b .p2
27
+%patch2 -p1 -b .p2
28
 %patch3 -p1 -b .p3
29
+%patch4 -p1 -b .p4
30
 cp %{S:1} .
31
 cp %{S:2} .
32
33
​
View file
r8168-kernel_5.18.patch Deleted
41
 
1
@@ -1,39 +0,0 @@
2
----
3
- src/r8168_n.c |   10 +++++-----
4
- 1 file changed, 5 insertions(+), 5 deletions(-)
5
-
6
---- src/r8168_n.c
7
-+++ src/r8168_n.c  2022-05-03 21:58:06.034047041 +0000
8
-@@ -3723,7 +3723,7 @@ static void rtl8168_mac_loopback_test(st
9
-         txd->opts2 = 0;
10
-         while (1) {
11
-                 memset(tmpAddr, pattern++, len - 14);
12
--                pci_dma_sync_single_for_device(tp->pci_dev,
13
-+               dma_sync_single_for_device(&tp->pci_dev->dev,
14
-                                                le64_to_cpu(mapping),
15
-                                                len, DMA_TO_DEVICE);
16
-                 txd->opts1 = cpu_to_le32(DescOwn | FirstFrag | LastFrag | len);
17
-@@ -3751,7 +3751,7 @@ static void rtl8168_mac_loopback_test(st
18
-                 if (rx_len == len) {
19
-                         dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
20
-                         i = memcmp(skb->data, rx_skb->data, rx_len);
21
--                        pci_dma_sync_single_for_device(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
22
-+                        dma_sync_single_for_device(&tp->pci_dev->dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
23
-                         if (i == 0) {
24
- //              dev_printk(KERN_INFO, tp_to_dev(tp), "loopback test finished\n",rx_len,len);
25
-                                 break;
26
-@@ -26454,11 +26454,11 @@ rtl8168_init_board(struct pci_dev *pdev,
27
-
28
-         if ((sizeof(dma_addr_t) > 4) &&
29
-             use_dac &&
30
--            !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
31
--            !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
32
-+            !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
33
-+            !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
34
-                 dev->features |= NETIF_F_HIGHDMA;
35
-         } else {
36
--                rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
37
-+                rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
38
-                 if (rc < 0) {
39
- #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
40
-                         if (netif_msg_probe(tp))
41
​
View file
r8168-kernel_version.patch Changed
19
 
1
@@ -48,7 +48,7 @@
2
  static struct net_device_stats *rtl8168_get_stats(struct net_device *dev);
3
  static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, napi_budget);
4
  static int rtl8168_change_mtu(struct net_device *dev, int new_mtu);
5
-@@ -28796,8 +28805,12 @@ static void
6
+@@ -28985,8 +28994,12 @@ static void
7
  rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue)
8
  #else
9
  static void
10
@@ -61,7 +61,7 @@
11
  {
12
          struct rtl8168_private *tp = netdev_priv(dev);
13
          unsigned long flags;
14
-@@ -29483,7 +29496,7 @@ process_pkt:
15
+@@ -29676,7 +29685,7 @@ process_pkt:
16
17
                          if (rtl8168_rx_vlan_skb(tp, desc, skb) < 0)
18
                                  rtl8168_rx_skb(tp, skb);
19
​
View file
r8168-support-dev0x8136.patch Added
24
 
1
@@ -0,0 +1,22 @@
2
+From b6e3225a3c9f3aa7b218f1c31a6666e3026092ca Mon Sep 17 00:00:00 2001
3
+From: M4rQu1Nh0S <blogmrcs@gmail.com>
4
+Date: Thu, 12 May 2022 11:32:17 -0300
5
+Subject: PATCH Add files via upload
6
+
7
+Added Device ID 10ec:8136 (0x8136)
8
+---
9
+ src/r8168_n.c | 1 +
10
+ 1 file changed, 1 insertion(+)
11
+
12
+diff --git a/src/r8168_n.c b/src/r8168_n.c
13
+index 28d7636..cbf43d1 100755
14
+--- a/src/r8168_n.c
15
++++ b/src/r8168_n.c
16
+@@ -397,6 +397,7 @@ static const struct {
17
+
18
+ static struct pci_device_id rtl8168_pci_tbl = {
19
+         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), },
20
++        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), },
21
+         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8161), },
22
+         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x2502), },
23
+         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x2600), },
24
​
View file
r8168-support-linux-6.1.0.patch Added
27
 
1
@@ -0,0 +1,25 @@
2
+From 39dd0fd2e5dc45cd63113f33a9890e36c304916d Mon Sep 17 00:00:00 2001
3
+From: zu1k <i@zu1k.com>
4
+Date: Sat, 29 Oct 2022 21:57:39 +0800
5
+Subject: PATCH Adapted for Linux 6.1
6
+
7
+---
8
+ src/r8168.h | 4 ++++
9
+ 1 file changed, 4 insertions(+)
10
+
11
+diff --git a/src/r8168.h b/src/r8168.h
12
+index 662974a..baf48c6 100755
13
+--- a/src/r8168.h
14
++++ b/src/r8168.h
15
+@@ -570,7 +570,11 @@ typedef int *napi_budget;
16
+ typedef struct napi_struct *napi_ptr;
17
+ typedef int napi_budget;
18
+
19
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)
20
++#define RTL_NAPI_CONFIG(ndev, priv, function, weight)   netif_napi_add(ndev, &priv->napi, function)
21
++#else
22
+ #define RTL_NAPI_CONFIG(ndev, priv, function, weight)   netif_napi_add(ndev, &priv->napi, function, weight)
23
++#endif
24
+ #define RTL_NAPI_QUOTA(budget, ndev)            min(budget, budget)
25
+ #define RTL_GET_PRIV(stuct_ptr, priv_struct)        container_of(stuct_ptr, priv_struct, stuct_ptr)
26
+ #define RTL_GET_NETDEV(priv_ptr)            struct net_device *dev = priv_ptr->dev;
27
​
View file
r8168-8.050.03.tar.gz/src/r8168.h -> r8168-8.051.02.tar.gz/src/r8168.h Changed
65
 
1
@@ -190,7 +190,7 @@
2
 #define NETIF_F_RXFCS  0
3
 #endif
4
5
-#ifndef HAVE_FREE_NETDEV
6
+#if !defined(HAVE_FREE_NETDEV) && (LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0))
7
 #define free_netdev(x)  kfree(x)
8
 #endif
9
10
@@ -344,7 +344,7 @@
11
 #define DASH_SUFFIX ""
12
 #endif
13
14
-#define RTL8168_VERSION "8.050.03" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
15
+#define RTL8168_VERSION "8.051.02" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
16
 #define MODULENAME "r8168"
17
 #define PFX MODULENAME ": "
18
19
@@ -445,6 +445,11 @@
20
21
 #define OCP_STD_PHY_BASE   0xa400
22
23
+//Channel Wait Count
24
+#define R8168_CHANNEL_WAIT_COUNT (20000)
25
+#define R8168_CHANNEL_WAIT_TIME (1)  // 1us
26
+#define R8168_CHANNEL_EXIT_DELAY_TIME (20)  //20us
27
+
28
 #define NODE_ADDRESS_SIZE 6
29
30
 #define SHORT_PACKET_PADDING_BUF_SIZE 256
31
@@ -1387,6 +1392,7 @@
32
 enum features {
33
 //  RTL_FEATURE_WOL = (1 << 0),
34
         RTL_FEATURE_MSI = (1 << 1),
35
+        RTL_FEATURE_MSIX = (1 << 2),
36
 };
37
38
 enum wol_capability {
39
@@ -1513,6 +1519,8 @@
40
         struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
41
         dma_addr_t TxPhyAddr;
42
         dma_addr_t RxPhyAddr;
43
+        u32 TxDescAllocSize;
44
+        u32 RxDescAllocSize;
45
         struct sk_buff *Rx_skbuffMAX_NUM_RX_DESC; /* Rx data buffers */
46
         struct ring_info tx_skbMAX_NUM_TX_DESC;   /* Tx data buffers */
47
         unsigned rx_buf_sz;
48
@@ -1525,6 +1533,7 @@
49
         u16 cp_cmd;
50
         u16 intr_mask;
51
         u16 timer_intr_mask;
52
+        int irq;
53
         int phy_auto_nego_reg;
54
         int phy_1000_ctrl_reg;
55
         u8 org_mac_addrNODE_ADDRESS_SIZE;
56
@@ -1810,7 +1819,7 @@
57
 #define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0019)
58
 #define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0055)
59
 #define NIC_RAMCODE_VERSION_CFG_METHOD_31 (0x0003)
60
-#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0010)
61
+#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0019)
62
63
 //hwoptimize
64
 #define HW_PATCH_SOC_LAN (BIT_0)
65
​
View file
r8168-8.050.03.tar.gz/src/r8168_n.c -> r8168-8.051.02.tar.gz/src/r8168_n.c Changed
1334
 
1
@@ -1922,8 +1922,8 @@
2
         data32 |= OCPR_Write | value;
3
4
         RTL_W32(tp, PHYOCP, data32);
5
-        for (i = 0; i < 100; i++) {
6
-                udelay(1);
7
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
8
+                udelay(R8168_CHANNEL_WAIT_TIME);
9
10
                 if (!(RTL_R32(tp, PHYOCP) & OCPR_Flag))
11
                         break;
12
@@ -2005,12 +2005,12 @@
13
                                 (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift |
14
                                 (value & PHYAR_Data_Mask));
15
16
-                        for (i = 0; i < 10; i++) {
17
-                                udelay(100);
18
+                        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
19
+                                udelay(R8168_CHANNEL_WAIT_TIME);
20
21
                                 /* Check if the RTL8168 has completed writing to the specified MII register */
22
                                 if (!(RTL_R32(tp, PHYAR) & PHYAR_Flag)) {
23
-                                        udelay(20);
24
+                                        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
25
                                         break;
26
                                 }
27
                         }
28
@@ -2061,8 +2061,8 @@
29
         data32 <<= OCPR_Addr_Reg_shift;
30
31
         RTL_W32(tp, PHYOCP, data32);
32
-        for (i = 0; i < 100; i++) {
33
-                udelay(1);
34
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
35
+                udelay(R8168_CHANNEL_WAIT_TIME);
36
37
                 if (RTL_R32(tp, PHYOCP) & OCPR_Flag)
38
                         break;
39
@@ -2145,13 +2145,13 @@
40
                         RTL_W32(tp, PHYAR,
41
                                 PHYAR_Read | (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift);
42
43
-                        for (i = 0; i < 10; i++) {
44
-                                udelay(100);
45
+                        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
46
+                                udelay(R8168_CHANNEL_WAIT_TIME);
47
48
                                 /* Check if the RTL8168 has completed retrieving data from the specified MII register */
49
                                 if (RTL_R32(tp, PHYAR) & PHYAR_Flag) {
50
                                         value = RTL_R32(tp, PHYAR) & PHYAR_Data_Mask;
51
-                                        udelay(20);
52
+                                        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
53
                                         break;
54
                                 }
55
                         }
56
@@ -2323,8 +2323,8 @@
57
58
                 RTL_W32(tp, OCPAR, (0x0F<<12) | (addr&0xFFF));
59
60
-                for (i = 0; i < 20; i++) {
61
-                        udelay(100);
62
+                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
63
+                        udelay(R8168_CHANNEL_WAIT_TIME);
64
                         if (RTL_R32(tp, OCPAR) & OCPAR_Flag)
65
                                 break;
66
                 }
67
@@ -2346,7 +2346,7 @@
68
                 }
69
         }
70
71
-        udelay(20);
72
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
73
74
         return value2;
75
 }
76
@@ -2393,8 +2393,8 @@
77
                 RTL_W32(tp, OCPDR, value1);
78
                 RTL_W32(tp, OCPAR, OCPAR_Flag | (0x0F<<12) | (addr&0xFFF));
79
80
-                for (i = 0; i < 10; i++) {
81
-                        udelay(100);
82
+                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
83
+                        udelay(R8168_CHANNEL_WAIT_TIME);
84
85
                         /* Check if the RTL8168 has completed ERI write */
86
                         if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
87
@@ -2410,7 +2410,7 @@
88
                 }
89
         }
90
91
-        udelay(20);
92
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
93
94
         return 0;
95
 }
96
@@ -2634,36 +2634,56 @@
97
         }
98
 }
99
100
-void rtl8168_ephy_write(struct rtl8168_private *tp, int RegAddr, int value)
101
+static u8 rtl8168_check_ephy_addr(struct rtl8168_private *tp, int addr)
102
+{
103
+        if ( tp->mcfg != CFG_METHOD_35) goto exit;
104
+
105
+        if (addr & (BIT_6 | BIT_5))
106
+                rtl8168_clear_and_set_mcu_ocp_bit(tp, 0xDE28,
107
+                                                  (BIT_1 | BIT_0),
108
+                                                  (addr >> 5) & (BIT_1 | BIT_0));
109
+
110
+        addr &= 0x1F;
111
+
112
+exit:
113
+        return addr;
114
+}
115
+
116
+static void _rtl8168_ephy_write(struct rtl8168_private *tp, int addr, int value)
117
 {
118
         int i;
119
120
         RTL_W32(tp, EPHYAR,
121
                 EPHYAR_Write |
122
-                (RegAddr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift |
123
+                (addr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift |
124
                 (value & EPHYAR_Data_Mask));
125
126
-        for (i = 0; i < 10; i++) {
127
-                udelay(100);
128
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
129
+                udelay(R8168_CHANNEL_WAIT_TIME);
130
131
                 /* Check if the RTL8168 has completed EPHY write */
132
                 if (!(RTL_R32(tp, EPHYAR) & EPHYAR_Flag))
133
                         break;
134
         }
135
136
-        udelay(20);
137
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
138
+}
139
+
140
+void rtl8168_ephy_write(struct rtl8168_private *tp, int addr, int value)
141
+{
142
+        _rtl8168_ephy_write(tp, rtl8168_check_ephy_addr(tp, addr), value);
143
 }
144
145
-u16 rtl8168_ephy_read(struct rtl8168_private *tp, int RegAddr)
146
+static u16 _rtl8168_ephy_read(struct rtl8168_private *tp, int addr)
147
 {
148
         int i;
149
         u16 value = 0xffff;
150
151
         RTL_W32(tp, EPHYAR,
152
-                EPHYAR_Read | (RegAddr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift);
153
+                EPHYAR_Read | (addr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift);
154
155
-        for (i = 0; i < 10; i++) {
156
-                udelay(100);
157
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
158
+                udelay(R8168_CHANNEL_WAIT_TIME);
159
160
                 /* Check if the RTL8168 has completed EPHY read */
161
                 if (RTL_R32(tp, EPHYAR) & EPHYAR_Flag) {
162
@@ -2672,11 +2692,16 @@
163
                 }
164
         }
165
166
-        udelay(20);
167
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
168
169
         return value;
170
 }
171
172
+u16 rtl8168_ephy_read(struct rtl8168_private *tp, int addr)
173
+{
174
+        return _rtl8168_ephy_read(tp, rtl8168_check_ephy_addr(tp, addr));
175
+}
176
+
177
 static void ClearAndSetPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 clearmask, u16 setmask)
178
 {
179
         u16 EphyValue;
180
@@ -2732,8 +2757,8 @@
181
182
         RTL_W32(tp, CSIAR, cmd);
183
184
-        for (i = 0; i < 10; i++) {
185
-                udelay(100);
186
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
187
+                udelay(R8168_CHANNEL_WAIT_TIME);
188
189
                 /* Check if the RTL8168 has completed CSI read */
190
                 if (RTL_R32(tp, CSIAR) & CSIAR_Flag) {
191
@@ -2742,7 +2767,7 @@
192
                 }
193
         }
194
195
-        udelay(20);
196
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
197
198
         return value;
199
 }
200
@@ -2774,15 +2799,15 @@
201
202
         RTL_W32(tp, CSIAR, cmd);
203
204
-        for (i = 0; i < 10; i++) {
205
-                udelay(100);
206
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
207
+                udelay(R8168_CHANNEL_WAIT_TIME);
208
209
                 /* Check if the RTL8168 has completed CSI write */
210
                 if (!(RTL_R32(tp, CSIAR) & CSIAR_Flag))
211
                         break;
212
         }
213
214
-        udelay(20);
215
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
216
 }
217
218
 static u32
219
@@ -2837,7 +2862,7 @@
220
221
                 RegAlignAddr = addr & ~(0x3);
222
                 ShiftByte = addr & (0x3);
223
-                TmpUlong = rtl8168_csi_other_fun_read(tp, 0, addr);
224
+                TmpUlong = rtl8168_csi_other_fun_read(tp, 0, RegAlignAddr);
225
                 TmpUlong >>= (8*ShiftByte);
226
                 RetVal = (u8)TmpUlong;
227
         } else {
228
@@ -2846,7 +2871,7 @@
229
                 pci_read_config_byte(pdev, addr, &RetVal);
230
         }
231
232
-        udelay(20);
233
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
234
235
         return RetVal;
236
 }
237
@@ -2875,7 +2900,7 @@
238
                 pci_write_config_byte(pdev, addr, value);
239
         }
240
241
-        udelay(20);
242
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
243
 }
244
245
 static void
246
@@ -3045,8 +3070,8 @@
247
248
                 RTL_W32(tp, ERIAR, eri_cmd);
249
250
-                for (i = 0; i < 10; i++) {
251
-                        udelay(100);
252
+                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
253
+                        udelay(R8168_CHANNEL_WAIT_TIME);
254
255
                         /* Check if the RTL8168 has completed ERI read */
256
                         if (RTL_R32(tp, ERIAR) & ERIAR_Flag)
257
@@ -3070,7 +3095,7 @@
258
                 }
259
         }
260
261
-        udelay(20);
262
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
263
264
         return value2;
265
 }
266
@@ -3119,8 +3144,8 @@
267
268
                 RTL_W32(tp, ERIAR, eri_cmd);
269
270
-                for (i = 0; i < 10; i++) {
271
-                        udelay(100);
272
+                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
273
+                        udelay(R8168_CHANNEL_WAIT_TIME);
274
275
                         /* Check if the RTL8168 has completed ERI write */
276
                         if (!(RTL_R32(tp, ERIAR) & ERIAR_Flag))
277
@@ -3136,7 +3161,7 @@
278
                 }
279
         }
280
281
-        udelay(20);
282
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
283
284
         return 0;
285
 }
286
@@ -3714,9 +3739,9 @@
287
         txd->opts2 = 0;
288
         while (1) {
289
                 memset(tmpAddr, pattern++, len - 14);
290
-                pci_dma_sync_single_for_device(tp->pci_dev,
291
-                                               le64_to_cpu(mapping),
292
-                                               len, DMA_TO_DEVICE);
293
+                dma_sync_single_for_device(&tp->pci_dev->dev,
294
+                                           le64_to_cpu(mapping),
295
+                                           len, DMA_TO_DEVICE);
296
                 txd->opts1 = cpu_to_le32(DescOwn | FirstFrag | LastFrag | len);
297
298
                 RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig)  | AcceptMyPhys);
299
@@ -3742,7 +3767,7 @@
300
                 if (rx_len == len) {
301
                         dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
302
                         i = memcmp(skb->data, rx_skb->data, rx_len);
303
-                        pci_dma_sync_single_for_device(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
304
+                        dma_sync_single_for_device(&tp->pci_dev->dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
305
                         if (i == 0) {
306
 //              dev_printk(KERN_INFO, tp_to_dev(tp), "loopback test finished\n",rx_len,len);
307
                                 break;
308
@@ -4593,10 +4618,7 @@
309
 static void
310
 rtl8168_init_pci_offset_180(struct rtl8168_private *tp)
311
 {
312
-        if (tp->org_pci_offset_180 & (BIT_0|BIT_1))
313
-                rtl8168_enable_pci_offset_180(tp);
314
-        else
315
-                rtl8168_disable_pci_offset_180(tp);
316
+        rtl8168_enable_pci_offset_180(tp);
317
 }
318
319
 static void
320
@@ -4938,32 +4960,30 @@
321
         giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000);
322
         giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
323
324
-        aner = anlpar = gbsr = 0;
325
+        aner = tp->phy_reg_aner;
326
+        anlpar = tp->phy_reg_anlpar;
327
+        gbsr = tp->phy_reg_gbsr;
328
         if (tp->link_ok(dev)) {
329
                 aner = rtl8168_mdio_read(tp, MII_EXPANSION);
330
                 anlpar = rtl8168_mdio_read(tp, MII_LPA);
331
                 gbsr = rtl8168_mdio_read(tp, MII_STAT1000);
332
-        } else {
333
-                if (netif_running(dev)) {
334
-                        aner = tp->phy_reg_aner;
335
-                        anlpar = tp->phy_reg_anlpar;
336
-                        gbsr = tp->phy_reg_gbsr;
337
-                }
338
         }
339
340
+        adv = tp->advertising;
341
         if ((aner | anlpar | gbsr) == 0) {
342
                 int auto_nego_tmp = 0;
343
-                adv = tp->advertising;
344
-                if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF))
345
+
346
+                if (adv & ADVERTISED_10baseT_Half)
347
                         auto_nego_tmp |= ADVERTISE_10HALF;
348
-                if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL))
349
+                if (adv & ADVERTISED_10baseT_Full)
350
                         auto_nego_tmp |= ADVERTISE_10FULL;
351
-                if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF))
352
+                if (adv & ADVERTISED_100baseT_Half)
353
                         auto_nego_tmp |= ADVERTISE_100HALF;
354
-                if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL))
355
+                if (adv & ADVERTISED_100baseT_Full)
356
                         auto_nego_tmp |= ADVERTISE_100FULL;
357
358
-                if (auto_nego_tmp == 0)    goto exit;
359
+                if (auto_nego_tmp == 0)
360
+                        goto exit;
361
362
                 auto_nego |= auto_nego_tmp;
363
                 goto skip_check_lpa;
364
@@ -4971,7 +4991,6 @@
365
         if (!(aner & EXPANSION_NWAY))
366
                 goto exit;
367
368
-        adv = tp->advertising;
369
         if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF))
370
                 auto_nego |= ADVERTISE_10HALF;
371
         else if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL))
372
@@ -5012,11 +5031,6 @@
373
 {
374
         struct rtl8168_private *tp = netdev_priv(dev);
375
376
-#ifdef ENABLE_FIBER_SUPPORT
377
-        if (HW_FIBER_MODE_ENABLED(tp))
378
-                return;
379
-#endif //ENABLE_FIBER_SUPPORT
380
-
381
         if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) {
382
                 rtl8168_set_hw_wol(dev, tp->wol_opts);
383
384
@@ -5037,6 +5051,11 @@
385
                 /* Enable the PME and clear the status */
386
                 rtl8168_set_pci_pme(tp, 1);
387
388
+#ifdef ENABLE_FIBER_SUPPORT
389
+                if (HW_FIBER_MODE_ENABLED(tp))
390
+                        return;
391
+#endif //ENABLE_FIBER_SUPPORT
392
+
393
                 if (HW_SUPP_SERDES_PHY(tp))
394
                         return;
395
396
@@ -5047,6 +5066,13 @@
397
                 return;
398
         }
399
400
+        rtl8168_set_hw_wol(dev, 0);
401
+
402
+#ifdef ENABLE_FIBER_SUPPORT
403
+        if (HW_FIBER_MODE_ENABLED(tp))
404
+                return;
405
+#endif //ENABLE_FIBER_SUPPORT
406
+
407
         if (tp->DASH)
408
                 return;
409
410
@@ -5901,7 +5927,7 @@
411
 {
412
         struct rtl8168_private *tp = netdev_priv(dev);
413
414
-        synchronize_irq(dev->irq);
415
+        synchronize_irq(tp->irq);
416
417
         /* Wait for any pending NAPI task to complete */
418
 #ifdef CONFIG_R8168_NAPI
419
@@ -7374,7 +7400,7 @@
420
                 }
421
         }
422
423
-        udelay(20);
424
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
425
426
         return efuse_data;
427
 }
428
@@ -8972,7 +8998,81 @@
429
 static void
430
 rtl8168_set_mac_mcu_8168h_3(struct net_device *dev)
431
 {
432
+        struct rtl8168_private *tp = netdev_priv(dev);
433
+        u16 i;
434
+        static const u16 mcu_patch_code_8168h_3 = {
435
+                0xE008, 0xE00A, 0xE00C, 0xE00E, 0xE010, 0xE039, 0xE03B, 0xE064, 0xC602,
436
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
437
+                0xBE00, 0x0000, 0xC727, 0x76E2, 0x49EE, 0xF1FD, 0x1E00, 0x8EE0, 0x1E1C,
438
+                0x8EE2, 0x76E2, 0x49EE, 0xF1FE, 0xC61D, 0x8EE0, 0x1E1D, 0x486F, 0x8EE2,
439
+                0x76E2, 0x49EE, 0xF12C, 0xC716, 0x76E0, 0x48E8, 0x48E9, 0x48EA, 0x48EB,
440
+                0x48EC, 0x9EE0, 0xC709, 0xC609, 0x9EF4, 0xC608, 0x9EF6, 0xB007, 0xC602,
441
+                0xBE00, 0x0ACC, 0xE000, 0x03BF, 0x07FF, 0xDE24, 0x3200, 0xE096, 0xC602,
442
+                0xBE00, 0x0000, 0x8EE6, 0xC726, 0x76E2, 0x49EE, 0xF1FD, 0x1E00, 0x8EE0,
443
+                0x1E1C, 0x8EE2, 0x76E2, 0x49EE, 0xF1FE, 0xC61C, 0x8EE0, 0x1E1D, 0x486F,
444
+                0x8EE2, 0x76E2, 0x49EE, 0xF1FE, 0xC715, 0x76E0, 0x48E8, 0x48E9, 0x48EA,
445
+                0x48EB, 0x48EC, 0x9EE0, 0xC708, 0xC608, 0x9EF4, 0xC607, 0x9EF6, 0xC602,
446
+                0xBE00, 0x0ABE, 0xE000, 0x03BF, 0x07FF, 0xDE24, 0x3200, 0xE096, 0xC602,
447
+                0xBE00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
448
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
449
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
450
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
451
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
452
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
453
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
454
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
455
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
456
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
457
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
458
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
459
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
460
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
461
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
462
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
463
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
464
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
465
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
466
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
467
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
468
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
469
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
470
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
471
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
472
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
473
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
474
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
475
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
476
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
477
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
478
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
479
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
480
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
481
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
482
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
483
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
484
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
485
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
486
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
487
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
488
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
489
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
490
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
491
+                0x0000, 0x0000, 0x0000, 0x0000, 0x6838, 0x0A16, 0x0901, 0x101C
492
+        };
493
+
494
         rtl8168_hw_disable_mac_mcu_bps(dev);
495
+
496
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_3); i++) {
497
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168h_3i);
498
+        }
499
+
500
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
501
+
502
+        rtl8168_mac_ocp_write(tp, 0xFC30, 0x0ACA);
503
+
504
+        rtl8168_clear_mcu_ocp_bit(tp, 0xD438, BIT_3);
505
+
506
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0010);
507
 }
508
509
 static void
510
@@ -9422,6 +9522,8 @@
511
512
         if (s0_magic_packet == 1)
513
                 rtl8168_enable_magic_packet(dev);
514
+        else
515
+                rtl8168_disable_magic_packet(dev);
516
517
 #ifdef ENABLE_USE_FIRMWARE_FILE
518
         if (tp->rtl_fw &&
519
@@ -9784,9 +9886,13 @@
520
521
                 break;
522
         case CFG_METHOD_35:
523
+                rtl8168_clear_mcu_ocp_bit(tp, 0xDE38, BIT_2);
524
+
525
+                ClearPCIePhyBit(tp, 0x24, BIT_9);
526
+
527
                 rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
528
529
-                rtl8168_set_mcu_ocp_bit(tp, 0xDE38, (BIT_2));
530
+                rtl8168_set_mcu_ocp_bit(tp, 0xDE38, BIT_2);
531
532
                 break;
533
         }
534
@@ -21259,6 +21365,7 @@
535
536
         rtl8168_set_phy_mcu_patch_request(tp);
537
538
+
539
         rtl8168_mdio_write(tp, 0x1f, 0x0A43);
540
         rtl8168_mdio_write(tp, 0x13, 0x8042);
541
         rtl8168_mdio_write(tp, 0x14, 0x3800);
542
@@ -21294,13 +21401,13 @@
543
         rtl8168_mdio_write(tp, 0x14, 0x8466);
544
         rtl8168_mdio_write(tp, 0x14, 0xaf84);
545
         rtl8168_mdio_write(tp, 0x14, 0xcdaf);
546
-        rtl8168_mdio_write(tp, 0x14, 0x8736);
547
+        rtl8168_mdio_write(tp, 0x14, 0x873c);
548
         rtl8168_mdio_write(tp, 0x14, 0xaf87);
549
-        rtl8168_mdio_write(tp, 0x14, 0x39af);
550
-        rtl8168_mdio_write(tp, 0x14, 0x8739);
551
+        rtl8168_mdio_write(tp, 0x14, 0x3faf);
552
+        rtl8168_mdio_write(tp, 0x14, 0x8760);
553
         rtl8168_mdio_write(tp, 0x14, 0xaf87);
554
-        rtl8168_mdio_write(tp, 0x14, 0x39af);
555
-        rtl8168_mdio_write(tp, 0x14, 0x8739);
556
+        rtl8168_mdio_write(tp, 0x14, 0x60af);
557
+        rtl8168_mdio_write(tp, 0x14, 0x8760);
558
         rtl8168_mdio_write(tp, 0x14, 0xef79);
559
         rtl8168_mdio_write(tp, 0x14, 0xfb89);
560
         rtl8168_mdio_write(tp, 0x14, 0xe987);
561
@@ -21347,7 +21454,7 @@
562
         rtl8168_mdio_write(tp, 0x14, 0x3719);
563
         rtl8168_mdio_write(tp, 0x14, 0x19ae);
564
         rtl8168_mdio_write(tp, 0x14, 0xcfbf);
565
-        rtl8168_mdio_write(tp, 0x14, 0x8763);
566
+        rtl8168_mdio_write(tp, 0x14, 0x878a);
567
         rtl8168_mdio_write(tp, 0x14, 0x0244);
568
         rtl8168_mdio_write(tp, 0x14, 0xdc3c);
569
         rtl8168_mdio_write(tp, 0x14, 0x0005);
570
@@ -21369,28 +21476,28 @@
571
         rtl8168_mdio_write(tp, 0x14, 0x5fd4);
572
         rtl8168_mdio_write(tp, 0x14, 0x0003);
573
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
574
-        rtl8168_mdio_write(tp, 0x14, 0x7502);
575
+        rtl8168_mdio_write(tp, 0x14, 0x9c02);
576
         rtl8168_mdio_write(tp, 0x14, 0x4498);
577
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
578
-        rtl8168_mdio_write(tp, 0x14, 0x7202);
579
+        rtl8168_mdio_write(tp, 0x14, 0x9902);
580
         rtl8168_mdio_write(tp, 0x14, 0x4a5f);
581
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
582
-        rtl8168_mdio_write(tp, 0x14, 0x6602);
583
+        rtl8168_mdio_write(tp, 0x14, 0x8d02);
584
         rtl8168_mdio_write(tp, 0x14, 0x4a5f);
585
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
586
-        rtl8168_mdio_write(tp, 0x14, 0x6902);
587
+        rtl8168_mdio_write(tp, 0x14, 0x9002);
588
         rtl8168_mdio_write(tp, 0x14, 0x44dc);
589
         rtl8168_mdio_write(tp, 0x14, 0xad28);
590
         rtl8168_mdio_write(tp, 0x14, 0xf7bf);
591
-        rtl8168_mdio_write(tp, 0x14, 0x876f);
592
+        rtl8168_mdio_write(tp, 0x14, 0x8796);
593
         rtl8168_mdio_write(tp, 0x14, 0x0244);
594
         rtl8168_mdio_write(tp, 0x14, 0xdcad);
595
         rtl8168_mdio_write(tp, 0x14, 0x28f7);
596
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
597
-        rtl8168_mdio_write(tp, 0x14, 0x6c02);
598
+        rtl8168_mdio_write(tp, 0x14, 0x9302);
599
         rtl8168_mdio_write(tp, 0x14, 0x4a5f);
600
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
601
-        rtl8168_mdio_write(tp, 0x14, 0x6c02);
602
+        rtl8168_mdio_write(tp, 0x14, 0x9302);
603
         rtl8168_mdio_write(tp, 0x14, 0x4a56);
604
         rtl8168_mdio_write(tp, 0x14, 0xbf46);
605
         rtl8168_mdio_write(tp, 0x14, 0x5c02);
606
@@ -21415,12 +21522,12 @@
607
         rtl8168_mdio_write(tp, 0x14, 0x3c00);
608
         rtl8168_mdio_write(tp, 0x14, 0x03aa);
609
         rtl8168_mdio_write(tp, 0x14, 0x2cbf);
610
-        rtl8168_mdio_write(tp, 0x14, 0x8769);
611
+        rtl8168_mdio_write(tp, 0x14, 0x8790);
612
         rtl8168_mdio_write(tp, 0x14, 0x0244);
613
         rtl8168_mdio_write(tp, 0x14, 0xdcad);
614
         rtl8168_mdio_write(tp, 0x14, 0x2823);
615
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
616
-        rtl8168_mdio_write(tp, 0x14, 0x6f02);
617
+        rtl8168_mdio_write(tp, 0x14, 0x9602);
618
         rtl8168_mdio_write(tp, 0x14, 0x44dc);
619
         rtl8168_mdio_write(tp, 0x14, 0xad28);
620
         rtl8168_mdio_write(tp, 0x14, 0x1a02);
621
@@ -21431,10 +21538,10 @@
622
         rtl8168_mdio_write(tp, 0x14, 0x49e5);
623
         rtl8168_mdio_write(tp, 0x14, 0xad50);
624
         rtl8168_mdio_write(tp, 0x14, 0xf7bf);
625
-        rtl8168_mdio_write(tp, 0x14, 0x876c);
626
+        rtl8168_mdio_write(tp, 0x14, 0x8793);
627
         rtl8168_mdio_write(tp, 0x14, 0x024a);
628
         rtl8168_mdio_write(tp, 0x14, 0x5fbf);
629
-        rtl8168_mdio_write(tp, 0x14, 0x876c);
630
+        rtl8168_mdio_write(tp, 0x14, 0x8793);
631
         rtl8168_mdio_write(tp, 0x14, 0x024a);
632
         rtl8168_mdio_write(tp, 0x14, 0x56ef);
633
         rtl8168_mdio_write(tp, 0x14, 0x95ff);
634
@@ -21446,7 +21553,7 @@
635
         rtl8168_mdio_write(tp, 0x14, 0x15ad);
636
         rtl8168_mdio_write(tp, 0x14, 0x2406);
637
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
638
-        rtl8168_mdio_write(tp, 0x14, 0x6002);
639
+        rtl8168_mdio_write(tp, 0x14, 0x8702);
640
         rtl8168_mdio_write(tp, 0x14, 0x4a56);
641
         rtl8168_mdio_write(tp, 0x14, 0xef96);
642
         rtl8168_mdio_write(tp, 0x14, 0xfefc);
643
@@ -21465,11 +21572,11 @@
644
         rtl8168_mdio_write(tp, 0x14, 0xf700);
645
         rtl8168_mdio_write(tp, 0x14, 0xae12);
646
         rtl8168_mdio_write(tp, 0x14, 0x0286);
647
-        rtl8168_mdio_write(tp, 0x14, 0x9702);
648
+        rtl8168_mdio_write(tp, 0x14, 0x9d02);
649
         rtl8168_mdio_write(tp, 0x14, 0x8565);
650
         rtl8168_mdio_write(tp, 0x14, 0x0285);
651
         rtl8168_mdio_write(tp, 0x14, 0x9d02);
652
-        rtl8168_mdio_write(tp, 0x14, 0x865a);
653
+        rtl8168_mdio_write(tp, 0x14, 0x8660);
654
         rtl8168_mdio_write(tp, 0x14, 0xae04);
655
         rtl8168_mdio_write(tp, 0x14, 0x10e4);
656
         rtl8168_mdio_write(tp, 0x14, 0x87f9);
657
@@ -21486,17 +21593,17 @@
658
         rtl8168_mdio_write(tp, 0x14, 0xe187);
659
         rtl8168_mdio_write(tp, 0x14, 0xecef);
660
         rtl8168_mdio_write(tp, 0x14, 0x64bf);
661
-        rtl8168_mdio_write(tp, 0x14, 0x8748);
662
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
663
         rtl8168_mdio_write(tp, 0x14, 0x0244);
664
         rtl8168_mdio_write(tp, 0x14, 0xdc1b);
665
         rtl8168_mdio_write(tp, 0x14, 0x46aa);
666
         rtl8168_mdio_write(tp, 0x14, 0x0abf);
667
-        rtl8168_mdio_write(tp, 0x14, 0x874b);
668
+        rtl8168_mdio_write(tp, 0x14, 0x8772);
669
         rtl8168_mdio_write(tp, 0x14, 0x0244);
670
         rtl8168_mdio_write(tp, 0x14, 0xdc1b);
671
         rtl8168_mdio_write(tp, 0x14, 0x46ab);
672
         rtl8168_mdio_write(tp, 0x14, 0x06bf);
673
-        rtl8168_mdio_write(tp, 0x14, 0x8745);
674
+        rtl8168_mdio_write(tp, 0x14, 0x876c);
675
         rtl8168_mdio_write(tp, 0x14, 0x024a);
676
         rtl8168_mdio_write(tp, 0x14, 0x5ffe);
677
         rtl8168_mdio_write(tp, 0x14, 0xef96);
678
@@ -21515,7 +21622,7 @@
679
         rtl8168_mdio_write(tp, 0x14, 0x0285);
680
         rtl8168_mdio_write(tp, 0x14, 0xc9ae);
681
         rtl8168_mdio_write(tp, 0x14, 0x0d02);
682
-        rtl8168_mdio_write(tp, 0x14, 0x860d);
683
+        rtl8168_mdio_write(tp, 0x14, 0x8613);
684
         rtl8168_mdio_write(tp, 0x14, 0xae08);
685
         rtl8168_mdio_write(tp, 0x14, 0xe287);
686
         rtl8168_mdio_write(tp, 0x14, 0xf7f6);
687
@@ -21528,7 +21635,7 @@
688
         rtl8168_mdio_write(tp, 0x14, 0xfafb);
689
         rtl8168_mdio_write(tp, 0x14, 0xef79);
690
         rtl8168_mdio_write(tp, 0x14, 0xfbbf);
691
-        rtl8168_mdio_write(tp, 0x14, 0x8748);
692
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
693
         rtl8168_mdio_write(tp, 0x14, 0x0244);
694
         rtl8168_mdio_write(tp, 0x14, 0xdcef);
695
         rtl8168_mdio_write(tp, 0x14, 0x64e2);
696
@@ -21544,11 +21651,14 @@
697
         rtl8168_mdio_write(tp, 0x14, 0xf636);
698
         rtl8168_mdio_write(tp, 0x14, 0xe687);
699
         rtl8168_mdio_write(tp, 0x14, 0xf7ae);
700
-        rtl8168_mdio_write(tp, 0x14, 0x13e2);
701
+        rtl8168_mdio_write(tp, 0x14, 0x19e2);
702
         rtl8168_mdio_write(tp, 0x14, 0x87f7);
703
         rtl8168_mdio_write(tp, 0x14, 0xf736);
704
         rtl8168_mdio_write(tp, 0x14, 0xe687);
705
-        rtl8168_mdio_write(tp, 0x14, 0xf702);
706
+        rtl8168_mdio_write(tp, 0x14, 0xf700);
707
+        rtl8168_mdio_write(tp, 0x14, 0x00ae);
708
+        rtl8168_mdio_write(tp, 0x14, 0x0200);
709
+        rtl8168_mdio_write(tp, 0x14, 0x0002);
710
         rtl8168_mdio_write(tp, 0x14, 0x49ca);
711
         rtl8168_mdio_write(tp, 0x14, 0xef57);
712
         rtl8168_mdio_write(tp, 0x14, 0xe687);
713
@@ -21573,7 +21683,7 @@
714
         rtl8168_mdio_write(tp, 0x14, 0x49e5);
715
         rtl8168_mdio_write(tp, 0x14, 0xac50);
716
         rtl8168_mdio_write(tp, 0x14, 0x1abf);
717
-        rtl8168_mdio_write(tp, 0x14, 0x8748);
718
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
719
         rtl8168_mdio_write(tp, 0x14, 0x0244);
720
         rtl8168_mdio_write(tp, 0x14, 0xdcef);
721
         rtl8168_mdio_write(tp, 0x14, 0x64e2);
722
@@ -21586,7 +21696,7 @@
723
         rtl8168_mdio_write(tp, 0x14, 0xe587);
724
         rtl8168_mdio_write(tp, 0x14, 0xeaae);
725
         rtl8168_mdio_write(tp, 0x14, 0x06bf);
726
-        rtl8168_mdio_write(tp, 0x14, 0x8745);
727
+        rtl8168_mdio_write(tp, 0x14, 0x876c);
728
         rtl8168_mdio_write(tp, 0x14, 0x024a);
729
         rtl8168_mdio_write(tp, 0x14, 0x5fe2);
730
         rtl8168_mdio_write(tp, 0x14, 0x87f7);
731
@@ -21600,15 +21710,15 @@
732
         rtl8168_mdio_write(tp, 0x14, 0xf9fa);
733
         rtl8168_mdio_write(tp, 0x14, 0xef69);
734
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
735
-        rtl8168_mdio_write(tp, 0x14, 0x3f02);
736
+        rtl8168_mdio_write(tp, 0x14, 0x6602);
737
         rtl8168_mdio_write(tp, 0x14, 0x44dc);
738
         rtl8168_mdio_write(tp, 0x14, 0xad28);
739
         rtl8168_mdio_write(tp, 0x14, 0x29bf);
740
-        rtl8168_mdio_write(tp, 0x14, 0x873c);
741
+        rtl8168_mdio_write(tp, 0x14, 0x8763);
742
         rtl8168_mdio_write(tp, 0x14, 0x0244);
743
         rtl8168_mdio_write(tp, 0x14, 0xdcef);
744
         rtl8168_mdio_write(tp, 0x14, 0x54bf);
745
-        rtl8168_mdio_write(tp, 0x14, 0x8739);
746
+        rtl8168_mdio_write(tp, 0x14, 0x8760);
747
         rtl8168_mdio_write(tp, 0x14, 0x0244);
748
         rtl8168_mdio_write(tp, 0x14, 0xdcac);
749
         rtl8168_mdio_write(tp, 0x14, 0x290d);
750
@@ -21622,7 +21732,7 @@
751
         rtl8168_mdio_write(tp, 0x14, 0x0402);
752
         rtl8168_mdio_write(tp, 0x14, 0xae06);
753
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
754
-        rtl8168_mdio_write(tp, 0x14, 0x4502);
755
+        rtl8168_mdio_write(tp, 0x14, 0x6c02);
756
         rtl8168_mdio_write(tp, 0x14, 0x4a5f);
757
         rtl8168_mdio_write(tp, 0x14, 0xef96);
758
         rtl8168_mdio_write(tp, 0x14, 0xfefd);
759
@@ -21635,7 +21745,7 @@
760
         rtl8168_mdio_write(tp, 0x14, 0xad25);
761
         rtl8168_mdio_write(tp, 0x14, 0x41d2);
762
         rtl8168_mdio_write(tp, 0x14, 0x0002);
763
-        rtl8168_mdio_write(tp, 0x14, 0x86ed);
764
+        rtl8168_mdio_write(tp, 0x14, 0x86f3);
765
         rtl8168_mdio_write(tp, 0x14, 0xe087);
766
         rtl8168_mdio_write(tp, 0x14, 0xebe1);
767
         rtl8168_mdio_write(tp, 0x14, 0x87ec);
768
@@ -21664,7 +21774,7 @@
769
         rtl8168_mdio_write(tp, 0x14, 0x08c9);
770
         rtl8168_mdio_write(tp, 0x14, 0xae06);
771
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
772
-        rtl8168_mdio_write(tp, 0x14, 0x4202);
773
+        rtl8168_mdio_write(tp, 0x14, 0x6902);
774
         rtl8168_mdio_write(tp, 0x14, 0x4a5f);
775
         rtl8168_mdio_write(tp, 0x14, 0xfeef);
776
         rtl8168_mdio_write(tp, 0x14, 0x96ff);
777
@@ -21674,72 +21784,88 @@
778
         rtl8168_mdio_write(tp, 0x14, 0xef79);
779
         rtl8168_mdio_write(tp, 0x14, 0xa200);
780
         rtl8168_mdio_write(tp, 0x14, 0x05bf);
781
-        rtl8168_mdio_write(tp, 0x14, 0x8748);
782
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
783
         rtl8168_mdio_write(tp, 0x14, 0xae33);
784
         rtl8168_mdio_write(tp, 0x14, 0xa201);
785
         rtl8168_mdio_write(tp, 0x14, 0x05bf);
786
-        rtl8168_mdio_write(tp, 0x14, 0x874b);
787
+        rtl8168_mdio_write(tp, 0x14, 0x8772);
788
         rtl8168_mdio_write(tp, 0x14, 0xae2b);
789
         rtl8168_mdio_write(tp, 0x14, 0xa202);
790
         rtl8168_mdio_write(tp, 0x14, 0x05bf);
791
-        rtl8168_mdio_write(tp, 0x14, 0x874e);
792
+        rtl8168_mdio_write(tp, 0x14, 0x8775);
793
         rtl8168_mdio_write(tp, 0x14, 0xae23);
794
         rtl8168_mdio_write(tp, 0x14, 0xa203);
795
         rtl8168_mdio_write(tp, 0x14, 0x05bf);
796
-        rtl8168_mdio_write(tp, 0x14, 0x8751);
797
+        rtl8168_mdio_write(tp, 0x14, 0x8778);
798
         rtl8168_mdio_write(tp, 0x14, 0xae1b);
799
         rtl8168_mdio_write(tp, 0x14, 0xa204);
800
         rtl8168_mdio_write(tp, 0x14, 0x05bf);
801
-        rtl8168_mdio_write(tp, 0x14, 0x8754);
802
+        rtl8168_mdio_write(tp, 0x14, 0x877b);
803
         rtl8168_mdio_write(tp, 0x14, 0xae13);
804
         rtl8168_mdio_write(tp, 0x14, 0xa205);
805
         rtl8168_mdio_write(tp, 0x14, 0x05bf);
806
-        rtl8168_mdio_write(tp, 0x14, 0x8757);
807
+        rtl8168_mdio_write(tp, 0x14, 0x877e);
808
         rtl8168_mdio_write(tp, 0x14, 0xae0b);
809
         rtl8168_mdio_write(tp, 0x14, 0xa206);
810
         rtl8168_mdio_write(tp, 0x14, 0x05bf);
811
-        rtl8168_mdio_write(tp, 0x14, 0x875a);
812
+        rtl8168_mdio_write(tp, 0x14, 0x8781);
813
         rtl8168_mdio_write(tp, 0x14, 0xae03);
814
         rtl8168_mdio_write(tp, 0x14, 0xbf87);
815
-        rtl8168_mdio_write(tp, 0x14, 0x5d02);
816
+        rtl8168_mdio_write(tp, 0x14, 0x8402);
817
         rtl8168_mdio_write(tp, 0x14, 0x44dc);
818
         rtl8168_mdio_write(tp, 0x14, 0xef64);
819
         rtl8168_mdio_write(tp, 0x14, 0xef97);
820
         rtl8168_mdio_write(tp, 0x14, 0xfffc);
821
         rtl8168_mdio_write(tp, 0x14, 0x04af);
822
         rtl8168_mdio_write(tp, 0x14, 0x00ed);
823
-        rtl8168_mdio_write(tp, 0x14, 0x54a4);
824
-        rtl8168_mdio_write(tp, 0x14, 0x3474);
825
-        rtl8168_mdio_write(tp, 0x14, 0xa600);
826
-        rtl8168_mdio_write(tp, 0x14, 0x22a4);
827
-        rtl8168_mdio_write(tp, 0x14, 0x3411);
828
+        rtl8168_mdio_write(tp, 0x14, 0x0220);
829
+        rtl8168_mdio_write(tp, 0x14, 0xa5f8);
830
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
831
+        rtl8168_mdio_write(tp, 0x14, 0x69bf);
832
+        rtl8168_mdio_write(tp, 0x14, 0x4554);
833
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
834
+        rtl8168_mdio_write(tp, 0x14, 0xdce0);
835
+        rtl8168_mdio_write(tp, 0x14, 0x87ff);
836
+        rtl8168_mdio_write(tp, 0x14, 0x1f01);
837
+        rtl8168_mdio_write(tp, 0x14, 0x9e06);
838
+        rtl8168_mdio_write(tp, 0x14, 0xe587);
839
+        rtl8168_mdio_write(tp, 0x14, 0xff02);
840
+        rtl8168_mdio_write(tp, 0x14, 0x4b05);
841
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
842
+        rtl8168_mdio_write(tp, 0x14, 0xfefc);
843
+        rtl8168_mdio_write(tp, 0x14, 0xaf03);
844
+        rtl8168_mdio_write(tp, 0x14, 0x8c54);
845
+        rtl8168_mdio_write(tp, 0x14, 0xa434);
846
+        rtl8168_mdio_write(tp, 0x14, 0x74a6);
847
+        rtl8168_mdio_write(tp, 0x14, 0x0022);
848
+        rtl8168_mdio_write(tp, 0x14, 0xa434);
849
+        rtl8168_mdio_write(tp, 0x14, 0x11b8);
850
+        rtl8168_mdio_write(tp, 0x14, 0x4222);
851
         rtl8168_mdio_write(tp, 0x14, 0xb842);
852
-        rtl8168_mdio_write(tp, 0x14, 0x22b8);
853
-        rtl8168_mdio_write(tp, 0x14, 0x42f0);
854
-        rtl8168_mdio_write(tp, 0x14, 0xa200);
855
         rtl8168_mdio_write(tp, 0x14, 0xf0a2);
856
-        rtl8168_mdio_write(tp, 0x14, 0x02f0);
857
-        rtl8168_mdio_write(tp, 0x14, 0xa204);
858
+        rtl8168_mdio_write(tp, 0x14, 0x00f0);
859
+        rtl8168_mdio_write(tp, 0x14, 0xa202);
860
         rtl8168_mdio_write(tp, 0x14, 0xf0a2);
861
-        rtl8168_mdio_write(tp, 0x14, 0x06f0);
862
-        rtl8168_mdio_write(tp, 0x14, 0xa208);
863
+        rtl8168_mdio_write(tp, 0x14, 0x04f0);
864
+        rtl8168_mdio_write(tp, 0x14, 0xa206);
865
         rtl8168_mdio_write(tp, 0x14, 0xf0a2);
866
-        rtl8168_mdio_write(tp, 0x14, 0x0af0);
867
-        rtl8168_mdio_write(tp, 0x14, 0xa20c);
868
+        rtl8168_mdio_write(tp, 0x14, 0x08f0);
869
+        rtl8168_mdio_write(tp, 0x14, 0xa20a);
870
         rtl8168_mdio_write(tp, 0x14, 0xf0a2);
871
-        rtl8168_mdio_write(tp, 0x14, 0x0e55);
872
-        rtl8168_mdio_write(tp, 0x14, 0xb820);
873
-        rtl8168_mdio_write(tp, 0x14, 0xd9c6);
874
-        rtl8168_mdio_write(tp, 0x14, 0x08aa);
875
-        rtl8168_mdio_write(tp, 0x14, 0xc430);
876
-        rtl8168_mdio_write(tp, 0x14, 0x00c6);
877
-        rtl8168_mdio_write(tp, 0x14, 0x1433);
878
-        rtl8168_mdio_write(tp, 0x14, 0xc41a);
879
-        rtl8168_mdio_write(tp, 0x14, 0x88c4);
880
-        rtl8168_mdio_write(tp, 0x14, 0x2e22);
881
+        rtl8168_mdio_write(tp, 0x14, 0x0cf0);
882
+        rtl8168_mdio_write(tp, 0x14, 0xa20e);
883
+        rtl8168_mdio_write(tp, 0x14, 0x55b8);
884
+        rtl8168_mdio_write(tp, 0x14, 0x20d9);
885
+        rtl8168_mdio_write(tp, 0x14, 0xc608);
886
+        rtl8168_mdio_write(tp, 0x14, 0xaac4);
887
+        rtl8168_mdio_write(tp, 0x14, 0x3000);
888
+        rtl8168_mdio_write(tp, 0x14, 0xc614);
889
+        rtl8168_mdio_write(tp, 0x14, 0x33c4);
890
+        rtl8168_mdio_write(tp, 0x14, 0x1a88);
891
         rtl8168_mdio_write(tp, 0x14, 0xc42e);
892
-        rtl8168_mdio_write(tp, 0x14, 0x54c4);
893
-        rtl8168_mdio_write(tp, 0x14, 0x1a00);
894
+        rtl8168_mdio_write(tp, 0x14, 0x22c4);
895
+        rtl8168_mdio_write(tp, 0x14, 0x2e54);
896
+        rtl8168_mdio_write(tp, 0x14, 0xc41a);
897
         rtl8168_mdio_write(tp, 0x13, 0xb818);
898
         rtl8168_mdio_write(tp, 0x14, 0x1a01);
899
         rtl8168_mdio_write(tp, 0x13, 0xb81a);
900
@@ -21749,7 +21875,7 @@
901
         rtl8168_mdio_write(tp, 0x13, 0xb81e);
902
         rtl8168_mdio_write(tp, 0x14, 0x00e7);
903
         rtl8168_mdio_write(tp, 0x13, 0xb846);
904
-        rtl8168_mdio_write(tp, 0x14, 0xffff);
905
+        rtl8168_mdio_write(tp, 0x14, 0x0389);
906
         rtl8168_mdio_write(tp, 0x13, 0xb848);
907
         rtl8168_mdio_write(tp, 0x14, 0xffff);
908
         rtl8168_mdio_write(tp, 0x13, 0xb84a);
909
@@ -21757,7 +21883,7 @@
910
         rtl8168_mdio_write(tp, 0x13, 0xb84c);
911
         rtl8168_mdio_write(tp, 0x14, 0xffff);
912
         rtl8168_mdio_write(tp, 0x13, 0xb832);
913
-        rtl8168_mdio_write(tp, 0x14, 0x000f);
914
+        rtl8168_mdio_write(tp, 0x14, 0x001f);
915
916
917
         rtl8168_mdio_write(tp, 0x1F, 0x0A43);
918
@@ -21771,6 +21897,7 @@
919
         rtl8168_mdio_write(tp, 0x13, 0x8042);
920
         rtl8168_mdio_write(tp, 0x14, 0x0000);
921
922
+
923
         rtl8168_clear_phy_mcu_patch_request(tp);
924
925
         if (tp->RequiredSecLanDonglePatch) {
926
@@ -24555,15 +24682,14 @@
927
 rtl8168_netpoll(struct net_device *dev)
928
 {
929
         struct rtl8168_private *tp = netdev_priv(dev);
930
-        struct pci_dev *pdev = tp->pci_dev;
931
932
-        disable_irq(pdev->irq);
933
+        disable_irq(tp->irq);
934
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
935
-        rtl8168_interrupt(pdev->irq, dev, NULL);
936
+        rtl8168_interrupt(tp->irq, dev, NULL);
937
 #else
938
-        rtl8168_interrupt(pdev->irq, dev);
939
+        rtl8168_interrupt(tp->irq, dev);
940
 #endif
941
-        enable_irq(pdev->irq);
942
+        enable_irq(tp->irq);
943
 }
944
 #endif
945
946
@@ -24941,7 +25067,8 @@
947
         case CFG_METHOD_25:
948
         case CFG_METHOD_26:
949
         case CFG_METHOD_27:
950
-                if ((tp->features & RTL_FEATURE_MSI) && (tp->org_pci_offset_80 & BIT_1))
951
+                if ((tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) &&
952
+                    (tp->org_pci_offset_80 & BIT_1))
953
                         tp->use_timer_interrrupt = FALSE;
954
                 else
955
                         tp->use_timer_interrrupt = TRUE;
956
@@ -25046,6 +25173,16 @@
957
                         hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
958
         }
959
960
+        switch (tp->mcfg) {
961
+        case CFG_METHOD_18:
962
+        case CFG_METHOD_19:
963
+                if (pdev->subsystem_vendor == 0x13fe) {
964
+                        if (pdev->subsystem_device == 0x00ec)
965
+                                hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
966
+                }
967
+                break;
968
+        }
969
+
970
 #ifdef CONFIG_CTAP_SHORT_OFF
971
         hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
972
 #endif //CONFIG_CTAP_SHORT_OFF
973
@@ -26296,6 +26433,11 @@
974
         struct rtl8168_private *tp = netdev_priv(dev);
975
         u32 csi_tmp;
976
977
+#ifdef ENABLE_FIBER_SUPPORT
978
+        if (HW_FIBER_MODE_ENABLED(tp))
979
+                return;
980
+#endif //ENABLE_FIBER_SUPPORT
981
+
982
         switch (tp->mcfg) {
983
         case CFG_METHOD_21:
984
         case CFG_METHOD_22:
985
@@ -26372,6 +26514,7 @@
986
         SET_NETDEV_DEV(dev, &pdev->dev);
987
         tp = netdev_priv(dev);
988
         tp->dev = dev;
989
+        tp->pci_dev = pdev;
990
         tp->msg_enable = netif_msg_init(debug.msg_enable, R8168_MSG_DEFAULT);
991
992
         if (!aspm || tp->mcfg == CFG_METHOD_9) {
993
@@ -26445,11 +26588,11 @@
994
995
         if ((sizeof(dma_addr_t) > 4) &&
996
             use_dac &&
997
-            !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
998
-            !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
999
+            !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
1000
+            !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1001
                 dev->features |= NETIF_F_HIGHDMA;
1002
         } else {
1003
-                rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1004
+                rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1005
                 if (rc < 0) {
1006
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
1007
                         if (netif_msg_probe(tp))
1008
@@ -26719,6 +26862,21 @@
1009
         mod_timer(timer, jiffies + RTL8168_LINK_TIMEOUT);
1010
 }
1011
1012
+static int rtl8168_enable_msix(struct rtl8168_private *tp)
1013
+{
1014
+        int nvecs = 0;
1015
+        struct msix_entry msix_ent1 = {0};
1016
+
1017
+        nvecs = pci_enable_msix_range(tp->pci_dev, msix_ent,
1018
+                                      1, 1);
1019
+        if (nvecs < 0)
1020
+                goto out;
1021
+
1022
+        tp->irq = msix_ent0.vector;
1023
+out:
1024
+        return nvecs;
1025
+}
1026
+
1027
 /* Cfg9346_Unlock assumed. */
1028
 static unsigned rtl8168_try_msi(struct pci_dev *pdev, struct rtl8168_private *tp)
1029
 {
1030
@@ -26737,19 +26895,34 @@
1031
                 dev_info(&pdev->dev, "Default use INTx.\n");
1032
                 break;
1033
         default:
1034
-                if (pci_enable_msi(pdev))
1035
-                        dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
1036
-                else
1037
+                if (rtl8168_enable_msix(tp) > 0)
1038
+                        msi |= RTL_FEATURE_MSIX;
1039
+                else if (!pci_enable_msi(pdev))
1040
                         msi |= RTL_FEATURE_MSI;
1041
+                else
1042
+                        dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
1043
                 break;
1044
         }
1045
 #endif
1046
1047
+        if (msi & RTL_FEATURE_MSIX)
1048
+                goto out;
1049
+
1050
+        tp->irq = pdev->irq;
1051
+
1052
+out:
1053
         return msi;
1054
 }
1055
1056
 static void rtl8168_disable_msi(struct pci_dev *pdev, struct rtl8168_private *tp)
1057
 {
1058
+        if (tp->features & RTL_FEATURE_MSIX) {
1059
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
1060
+                pci_disable_msix(pdev);
1061
+#endif
1062
+                tp->features &= ~RTL_FEATURE_MSIX;
1063
+        }
1064
+
1065
         if (tp->features & RTL_FEATURE_MSI) {
1066
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
1067
                 pci_disable_msi(pdev);
1068
@@ -26834,7 +27007,7 @@
1069
 #endif
1070
1071
         dev->watchdog_timeo = RTL8168_TX_TIMEOUT;
1072
-        dev->irq = pdev->irq;
1073
+        dev->irq = tp->irq;
1074
         dev->base_addr = (unsigned long) ioaddr;
1075
1076
 #ifdef CONFIG_R8168_NAPI
1077
@@ -26879,6 +27052,10 @@
1078
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
1079
                 if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) {
1080
                         dev->hw_features &= ~NETIF_F_IPV6_CSUM;
1081
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
1082
+                        netif_set_tso_max_size(dev, LSO_64K);
1083
+                        netif_set_tso_max_segs(dev, NIC_MAX_PHYS_BUF_COUNT_LSO2);
1084
+#else //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
1085
                         netif_set_gso_max_size(dev, LSO_32K);
1086
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
1087
                         dev->gso_max_segs = NIC_MAX_PHYS_BUF_COUNT_LSO_64K;
1088
@@ -26886,6 +27063,7 @@
1089
                         dev->gso_min_segs = NIC_MIN_PHYS_BUF_COUNT;
1090
 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
1091
 #endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
1092
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
1093
                 } else {
1094
                         dev->hw_features |= NETIF_F_IPV6_CSUM;
1095
                         dev->features |=  NETIF_F_IPV6_CSUM;
1096
@@ -26893,6 +27071,10 @@
1097
                                 dev->hw_features |= NETIF_F_TSO6;
1098
                                 //dev->features |=  NETIF_F_TSO6;
1099
                         }
1100
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
1101
+                        netif_set_tso_max_size(dev, LSO_64K);
1102
+                        netif_set_tso_max_segs(dev, NIC_MAX_PHYS_BUF_COUNT_LSO2);
1103
+#else //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
1104
                         netif_set_gso_max_size(dev, LSO_64K);
1105
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
1106
                         dev->gso_max_segs = NIC_MAX_PHYS_BUF_COUNT_LSO2;
1107
@@ -26900,13 +27082,12 @@
1108
                         dev->gso_min_segs = NIC_MIN_PHYS_BUF_COUNT;
1109
 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
1110
 #endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
1111
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
1112
                 }
1113
 #endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
1114
 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
1115
         }
1116
1117
-        tp->pci_dev = pdev;
1118
-
1119
         spin_lock_init(&tp->lock);
1120
1121
         rtl8168_init_software_variable(dev);
1122
@@ -27076,14 +27257,16 @@
1123
         * Rx and Tx descriptors needs 256 bytes alignment.
1124
         * pci_alloc_consistent provides more.
1125
         */
1126
+        tp->TxDescAllocSize = (tp->num_tx_desc + 1) * sizeof(struct TxDesc);
1127
         tp->TxDescArray = dma_alloc_coherent(&pdev->dev,
1128
-                                             (tp->num_tx_desc * sizeof(struct TxDesc)),
1129
+                                             tp->TxDescAllocSize,
1130
                                              &tp->TxPhyAddr, GFP_KERNEL);
1131
         if (!tp->TxDescArray)
1132
                 goto err_free_all_allocated_mem;
1133
1134
+        tp->RxDescAllocSize = (tp->num_rx_desc + 1) * sizeof(struct RxDesc);
1135
         tp->RxDescArray = dma_alloc_coherent(&pdev->dev,
1136
-                                             (tp->num_rx_desc * sizeof(struct RxDesc)),
1137
+                                             tp->RxDescAllocSize,
1138
                                              &tp->RxPhyAddr, GFP_KERNEL);
1139
         if (!tp->RxDescArray)
1140
                 goto err_free_all_allocated_mem;
1141
@@ -27092,7 +27275,9 @@
1142
         if (retval < 0)
1143
                 goto err_free_all_allocated_mem;
1144
1145
-        retval = request_irq(dev->irq, rtl8168_interrupt, (tp->features & RTL_FEATURE_MSI) ? 0 : SA_SHIRQ, dev->name, dev);
1146
+        retval = request_irq(tp->irq, rtl8168_interrupt, (tp->features &
1147
+                             (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) ? 0 :
1148
+                             SA_SHIRQ, dev->name, dev);
1149
         if (retval<0)
1150
                 goto err_free_all_allocated_mem;
1151
1152
@@ -27104,7 +27289,7 @@
1153
                        dev->base_addr,
1154
                        dev->dev_addr0, dev->dev_addr1,
1155
                        dev->dev_addr2, dev->dev_addr3,
1156
-                       dev->dev_addr4, dev->dev_addr5, dev->irq);
1157
+                       dev->dev_addr4, dev->dev_addr5, tp->irq);
1158
         }
1159
1160
 #ifdef ENABLE_USE_FIRMWARE_FILE
1161
@@ -27158,7 +27343,7 @@
1162
 err_free_all_allocated_mem:
1163
         if (tp->RxDescArray != NULL) {
1164
                 dma_free_coherent(&pdev->dev,
1165
-                                  (tp->num_rx_desc * sizeof(struct RxDesc)),
1166
+                                  tp->RxDescAllocSize,
1167
                                   tp->RxDescArray,
1168
                                   tp->RxPhyAddr);
1169
                 tp->RxDescArray = NULL;
1170
@@ -27166,7 +27351,7 @@
1171
1172
         if (tp->TxDescArray != NULL) {
1173
                 dma_free_coherent(&pdev->dev,
1174
-                                  (tp->num_tx_desc * sizeof(struct TxDesc)),
1175
+                                  tp->TxDescAllocSize,
1176
                                   tp->TxDescArray,
1177
                                   tp->TxPhyAddr);
1178
                 tp->TxDescArray = NULL;
1179
@@ -28238,8 +28423,10 @@
1180
         case CFG_METHOD_33:
1181
         case CFG_METHOD_34:
1182
         case CFG_METHOD_35:
1183
+                rtl8168_disable_pci_offset_99(tp);
1184
                 if (aspm) {
1185
-                        rtl8168_init_pci_offset_99(tp);
1186
+                        if (tp->org_pci_offset_99 & (BIT_2 | BIT_5 | BIT_6))
1187
+                                rtl8168_init_pci_offset_99(tp);
1188
                 }
1189
                 break;
1190
         }
1191
@@ -28256,8 +28443,10 @@
1192
         case CFG_METHOD_33:
1193
         case CFG_METHOD_34:
1194
         case CFG_METHOD_35:
1195
+                rtl8168_disable_pci_offset_180(tp);
1196
                 if (aspm) {
1197
-                        rtl8168_init_pci_offset_180(tp);
1198
+                        if (tp->org_pci_offset_180 & (BIT_0|BIT_1))
1199
+                                rtl8168_init_pci_offset_180(tp);
1200
                 }
1201
                 break;
1202
         }
1203
@@ -28563,7 +28752,7 @@
1204
 {
1205
         int i = 0;
1206
1207
-        memset(tp->TxDescArray, 0x0, tp->num_tx_desc * sizeof(struct TxDesc));
1208
+        memset(tp->TxDescArray, 0x0, tp->TxDescAllocSize);
1209
1210
         for (i = 0; i < tp->num_tx_desc; i++) {
1211
                 if (i == (tp->num_tx_desc - 1))
1212
@@ -28594,7 +28783,7 @@
1213
 static void
1214
 rtl8168_rx_desc_init(struct rtl8168_private *tp)
1215
 {
1216
-        memset(tp->RxDescArray, 0x0, tp->num_rx_desc * sizeof(struct RxDesc));
1217
+        memset(tp->RxDescArray, 0x0, tp->RxDescAllocSize);
1218
 }
1219
1220
 static int
1221
@@ -28947,11 +29136,10 @@
1222
                         break;
1223
                 case  __constant_htons(ETH_P_IPV6):
1224
                         if (dev->features & NETIF_F_IPV6_CSUM) {
1225
-                                u32 transport_offset = (u32)skb_transport_offset(skb);
1226
-                                if (transport_offset > 0 && transport_offset <= TCPHO_MAX) {
1227
+                                if (skb_transport_offset(skb) > 0 && skb_transport_offset(skb) <= TCPHO_MAX) {
1228
                                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1229
                                         csum_cmd = tp->tx_ipv6_csum_cmd;
1230
-                                        csum_cmd |= transport_offset << TCPHO_SHIFT;
1231
+                                        csum_cmd |= skb_transport_offset(skb) << TCPHO_SHIFT;
1232
                                 }
1233
                         }
1234
                         break;
1235
@@ -29134,12 +29322,11 @@
1236
                                 opts0 |= LargeSend | (min(mss, MSS_MAX) << 16);
1237
                                 large_send = 1;
1238
                         } else {
1239
-                                u32 transport_offset = (u32)skb_transport_offset(skb);
1240
                                 switch (get_protocol(skb)) {
1241
                                 case __constant_htons(ETH_P_IP):
1242
-                                        if (transport_offset <= GTTCPHO_MAX) {
1243
+                                        if (skb_transport_offset(skb) <= GTTCPHO_MAX) {
1244
                                                 opts0 |= GiantSendv4;
1245
-                                                opts0 |= transport_offset << GTTCPHO_SHIFT;
1246
+                                                opts0 |= skb_transport_offset(skb) << GTTCPHO_SHIFT;
1247
                                                 opts1 |= min(mss, MSS_MAX) << 18;
1248
                                                 large_send = 1;
1249
                                         }
1250
@@ -29152,9 +29339,9 @@
1251
                                                 goto out;
1252
                                         }
1253
 #endif
1254
-                                        if (transport_offset <= GTTCPHO_MAX) {
1255
+                                        if (skb_transport_offset(skb) <= GTTCPHO_MAX) {
1256
                                                 opts0 |= GiantSendv6;
1257
-                                                opts0 |= transport_offset << GTTCPHO_SHIFT;
1258
+                                                opts0 |= skb_transport_offset(skb) << GTTCPHO_SHIFT;
1259
                                                 opts1 |= min(mss, MSS_MAX) << 18;
1260
                                                 large_send = 1;
1261
                                         }
1262
@@ -29412,10 +29599,12 @@
1263
         rx_left = rtl8168_rx_quota(rx_left, (u32)rx_quota);
1264
1265
         for (; rx_left > 0; rx_left--) {
1266
-                rmb();
1267
                 status = le32_to_cpu(desc->opts1);
1268
                 if (status & DescOwn)
1269
                         break;
1270
+
1271
+                rmb();
1272
+
1273
                 if (unlikely(status & RxRES)) {
1274
                         if (netif_msg_rx_err(tp)) {
1275
                                 printk(KERN_INFO
1276
@@ -29438,17 +29627,17 @@
1277
                         int pkt_size;
1278
1279
 process_pkt:
1280
+                        pkt_size = status & 0x00003fff;
1281
                         if (likely(!(dev->features & NETIF_F_RXFCS)))
1282
-                                pkt_size = (status & 0x00003fff) - 4;
1283
-                        else
1284
-                                pkt_size = status & 0x00003fff;
1285
+                                pkt_size -= ETH_FCS_LEN;
1286
1287
                         /*
1288
                          * The driver does not support incoming fragmented
1289
                          * frames. They are seen as a symptom of over-mtu
1290
                          * sized frames.
1291
                          */
1292
-                        if (unlikely(rtl8168_fragmented_frame(status))) {
1293
+                        if (unlikely(rtl8168_fragmented_frame(status)) ||
1294
+                            unlikely(pkt_size > tp->rx_buf_sz)) {
1295
                                 RTLDEV->stats.rx_dropped++;
1296
                                 RTLDEV->stats.rx_length_errors++;
1297
                                 rtl8168_mark_to_asic(desc, tp->rx_buf_sz);
1298
@@ -29540,7 +29729,7 @@
1299
         do {
1300
                 status = RTL_R16(tp, IntrStatus);
1301
1302
-                if (!(tp->features & RTL_FEATURE_MSI)) {
1303
+                if (!(tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))) {
1304
                         /* hotplug/major error/no more work/shared irq */
1305
                         if ((status == 0xFFFF) || !status)
1306
                                 break;
1307
@@ -29785,7 +29974,7 @@
1308
1309
         spin_unlock_irqrestore(&tp->lock, flags);
1310
1311
-        synchronize_irq(dev->irq);
1312
+        synchronize_irq(tp->irq);
1313
1314
         spin_lock_irqsave(&tp->lock, flags);
1315
1316
@@ -29819,14 +30008,14 @@
1317
1318
                 spin_unlock_irqrestore(&tp->lock, flags);
1319
1320
-                free_irq(dev->irq, dev);
1321
+                free_irq(tp->irq, dev);
1322
1323
                 dma_free_coherent(&pdev->dev,
1324
-                                  (tp->num_rx_desc * sizeof(struct RxDesc)),
1325
+                                  tp->RxDescAllocSize,
1326
                                   tp->RxDescArray,
1327
                                   tp->RxPhyAddr);
1328
                 dma_free_coherent(&pdev->dev,
1329
-                                  (tp->num_tx_desc * sizeof(struct TxDesc)),
1330
+                                  tp->TxDescAllocSize,
1331
                                   tp->TxDescArray,
1332
                                   tp->TxPhyAddr);
1333
                 tp->TxDescArray = NULL;
1334
​
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Request History








bitstreamout's avatar




bitstreamout
created request
over 2 years ago









- Update to new version r8168-8.051.02

- Delete patch r8168-kernel_5.18.patch now upstream

- Add patch r8168-support-linux-6.1.0.patch

- Add patch r8168-support-dev0x8136.patch to support

  Realtek Semiconductor Co.,

  Ltd. RTL810xE PCI Express Fast Ethernet controller [10ec:8136] (rev 05)
















bitstreamout's avatar




bitstreamout
accepted request
over 2 years ago









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