Overview

Request 5598 (accepted)

- Update to new version 8.050.03
- Add patch r8168-support-linux-5.19.patch to get it build with 5.19

Submit package home:bitstreamout:Essentials / r8168 to package Essentials / r8168
View file
r8168.changes Changed
​x
 
1
@@ -1,4 +1,10 @@
2
 -------------------------------------------------------------------
3
+Fri Aug  5 13:40:01 UTC 2022 - Dr. Werner Fink <werner@suse.de>
4
+
5
+- Update to new version 8.050.03
6
+- Add patch r8168-support-linux-5.19.patch to get it build with 5.19
7
+
8
+-------------------------------------------------------------------
9
 Tue May 24 09:09:05 UTC 2022 - Dr. Werner Fink <werner@suse.de>
10
11
 - Add upstream patch r8168-kernel_5.18.patch
12
​
View file
r8168.spec Changed
26
 
1
@@ -18,7 +18,7 @@
2
3
 #!BuildIgnore: enough-build-resources
4
 Name:           r8168
5
-Version:        8.050.00
6
+Version:        8.050.03
7
 Release:        0
8
 Summary:        Device driver for RealTek Gigabit Ethernet controllers
9
 License:        GPL-2.0-or-later
10
@@ -30,6 +30,7 @@
11
 Patch0:         r8168-kernel_version.patch
12
 Patch1:         r8168-configuration.patch
13
 Patch2:         r8168-kernel_5.18.patch
14
+Patch3:         r8168-support-linux-5.19.patch
15
 BuildRequires:  kernel-source
16
 BuildRequires:  kernel-syms
17
 BuildRequires:  libelf-devel
18
@@ -59,6 +60,7 @@
19
 %patch0 -b .p0
20
 %patch1 -b .p1
21
 %patch2 -b .p2
22
+%patch3 -p1 -b .p3
23
 cp %{S:1} .
24
 cp %{S:2} .
25
26
​
View file
r8168-kernel_5.18.patch Changed
28
 
1
@@ -4,7 +4,7 @@
2
3
 --- src/r8168_n.c
4
 +++ src/r8168_n.c  2022-05-03 21:58:06.034047041 +0000
5
-@@ -3707,7 +3707,7 @@ static void rtl8168_mac_loopback_test(st
6
+@@ -3723,7 +3723,7 @@ static void rtl8168_mac_loopback_test(st
7
          txd->opts2 = 0;
8
          while (1) {
9
                  memset(tmpAddr, pattern++, len - 14);
10
@@ -13,7 +13,7 @@
11
                                                 le64_to_cpu(mapping),
12
                                                 len, DMA_TO_DEVICE);
13
                  txd->opts1 = cpu_to_le32(DescOwn | FirstFrag | LastFrag | len);
14
-@@ -3735,7 +3735,7 @@ static void rtl8168_mac_loopback_test(st
15
+@@ -3751,7 +3751,7 @@ static void rtl8168_mac_loopback_test(st
16
                  if (rx_len == len) {
17
                          dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
18
                          i = memcmp(skb->data, rx_skb->data, rx_len);
19
@@ -22,7 +22,7 @@
20
                          if (i == 0) {
21
  //              dev_printk(KERN_INFO, tp_to_dev(tp), "loopback test finished\n",rx_len,len);
22
                                  break;
23
-@@ -26412,11 +26412,11 @@ rtl8168_init_board(struct pci_dev *pdev,
24
+@@ -26454,11 +26454,11 @@ rtl8168_init_board(struct pci_dev *pdev,
25
26
          if ((sizeof(dma_addr_t) > 4) &&
27
              use_dac &&
28
​
View file
r8168-kernel_version.patch Changed
19
 
1
@@ -48,7 +48,7 @@
2
  static struct net_device_stats *rtl8168_get_stats(struct net_device *dev);
3
  static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, napi_budget);
4
  static int rtl8168_change_mtu(struct net_device *dev, int new_mtu);
5
-@@ -28748,8 +28757,12 @@ static void
6
+@@ -28796,8 +28805,12 @@ static void
7
  rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue)
8
  #else
9
  static void
10
@@ -61,7 +61,7 @@
11
  {
12
          struct rtl8168_private *tp = netdev_priv(dev);
13
          unsigned long flags;
14
-@@ -29435,7 +29448,7 @@ process_pkt:
15
+@@ -29483,7 +29496,7 @@ process_pkt:
16
17
                          if (rtl8168_rx_vlan_skb(tp, desc, skb) < 0)
18
                                  rtl8168_rx_skb(tp, skb);
19
​
View file
r8168-support-linux-5.19.patch Added
20
 
1
@@ -0,0 +1,18 @@
2
+--- r8168-8.050.03/src/r8168_n.c
3
++++ r8168-8.050.03/src/r8168_n.c
4
+@@ -121,6 +121,15 @@
5
+ #define FIRMWARE_8168FP_3   "rtl_nic/rtl8168fp-3.fw"
6
+ #define FIRMWARE_8168FP_4   "rtl_nic/rtl8168fp-4.fw"
7
+
8
++#if LINUX_VERSION_CODE > KERNEL_VERSION(5, 18, 0)
9
++static inline void netif_set_gso_max_size(struct net_device *dev,
10
++                    unsigned int size)
11
++{
12
++  /* dev->gso_max_size is read locklessly from sk_setup_caps() */
13
++  WRITE_ONCE(dev->gso_max_size, size);
14
++}
15
++#endif
16
++
17
+ /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
18
+    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
19
+ static const int multicast_filter_limit = 32;
20
​
View file
r8168-8.050.00.tar.gz/src/r8168.h -> r8168-8.050.03.tar.gz/src/r8168.h Changed
36
 
1
@@ -344,7 +344,7 @@
2
 #define DASH_SUFFIX ""
3
 #endif
4
5
-#define RTL8168_VERSION "8.050.00" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
6
+#define RTL8168_VERSION "8.050.03" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
7
 #define MODULENAME "r8168"
8
 #define PFX MODULENAME ": "
9
10
@@ -1599,6 +1599,7 @@
11
12
         u32 HwFiberModeVer;
13
         u32 HwFiberStat;
14
+        u8 HwFiberLedMode;
15
         u8 HwSwitchMdiToFiber;
16
17
         u8 HwSuppSerDesPhyVer;
18
@@ -1781,7 +1782,7 @@
19
 #define NIC_MAX_PHYS_BUF_COUNT_LSO2     (16*4)
20
21
 #define GTTCPHO_SHIFT                   18
22
-#define GTTCPHO_MAX                     0x7fU
23
+#define GTTCPHO_MAX                     0x70U
24
 #define GTPKTSIZE_MAX                   0x3ffffU
25
 #define TCPHO_SHIFT                     18
26
 #define TCPHO_MAX                       0x3ffU
27
@@ -1809,7 +1810,7 @@
28
 #define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0019)
29
 #define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0055)
30
 #define NIC_RAMCODE_VERSION_CFG_METHOD_31 (0x0003)
31
-#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0004)
32
+#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0010)
33
34
 //hwoptimize
35
 #define HW_PATCH_SOC_LAN (BIT_0)
36
​
View file
r8168-8.050.00.tar.gz/src/r8168_fiber.h -> r8168-8.050.03.tar.gz/src/r8168_fiber.h Changed
14
 
1
@@ -50,6 +50,12 @@
2
         FIBER_STAT_MAX
3
 };
4
5
+enum {
6
+        FIBER_LED_MODE_DEFAULT = 0,
7
+        FIBER_LED_MODE_1,
8
+        FIBER_LED_MODE_MAX
9
+};
10
+
11
 #define HW_FIBER_MODE_ENABLED(_M)        ((_M)->HwFiberModeVer > 0)
12
 #define HW_FIBER_STATUS_CONNECTED(_M)        (((_M)->HwFiberStat == FIBER_STAT_CONNECT_EEPROM) || ((_M)->HwFiberStat == FIBER_STAT_CONNECT_GPO))
13
 #define HW_FIBER_STATUS_DISCONNECTED(_M)        ((_M)->HwFiberStat == FIBER_STAT_DISCONNECT)
14
​
View file
r8168-8.050.00.tar.gz/src/r8168_n.c -> r8168-8.050.03.tar.gz/src/r8168_n.c Changed
512
 
1
@@ -1911,7 +1911,8 @@
2
         u32 data32;
3
         int i;
4
5
-        if (tp->HwSuppPhyOcpVer == 0) goto out;
6
+        if (tp->HwSuppPhyOcpVer == 0)
7
+                goto out;
8
9
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
10
         WARN_ON_ONCE(RegAddr % 2);
11
@@ -1935,7 +1936,8 @@
12
                                       u16 RegAddr,
13
                                       u16 value)
14
 {
15
-        if (tp->rtk_enable_diag) return;
16
+        if (tp->rtk_enable_diag)
17
+                return;
18
19
         mdio_real_direct_write_phy_ocp(tp, RegAddr, value);
20
 }
21
@@ -1947,7 +1949,8 @@
22
 {
23
         u16 ocp_addr;
24
25
-        if (tp->rtk_enable_diag) return;
26
+        if (tp->rtk_enable_diag)
27
+                return;
28
29
         ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
30
31
@@ -2022,7 +2025,8 @@
32
                         u16 RegAddr,
33
                         u16 value)
34
 {
35
-        if (tp->rtk_enable_diag) return;
36
+        if (tp->rtk_enable_diag)
37
+                return;
38
39
         mdio_real_write(tp, RegAddr, value);
40
 }
41
@@ -2047,7 +2051,8 @@
42
         u32 data32;
43
         int i, value = 0;
44
45
-        if (tp->HwSuppPhyOcpVer == 0) goto out;
46
+        if (tp->HwSuppPhyOcpVer == 0)
47
+                goto out;
48
49
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
50
         WARN_ON_ONCE(RegAddr % 2);
51
@@ -2071,7 +2076,8 @@
52
 static u32 mdio_direct_read_phy_ocp(struct rtl8168_private *tp,
53
                                     u16 RegAddr)
54
 {
55
-        if (tp->rtk_enable_diag) return 0xffffffff;
56
+        if (tp->rtk_enable_diag)
57
+                return 0xffffffff;
58
59
         return mdio_real_direct_read_phy_ocp(tp, RegAddr);
60
 }
61
@@ -2082,7 +2088,8 @@
62
 {
63
         u16 ocp_addr;
64
65
-        if (tp->rtk_enable_diag) return 0xffffffff;
66
+        if (tp->rtk_enable_diag)
67
+                return 0xffffffff;
68
69
         ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
70
71
@@ -2160,7 +2167,8 @@
72
 u32 rtl8168_mdio_read(struct rtl8168_private *tp,
73
                       u16 RegAddr)
74
 {
75
-        if (tp->rtk_enable_diag) return 0xffffffff;
76
+        if (tp->rtk_enable_diag)
77
+                return 0xffffffff;
78
79
         return mdio_real_read(tp, RegAddr);
80
 }
81
@@ -2430,7 +2438,8 @@
82
         u16 ocp_reg_mutex_oob;
83
         u16 ocp_reg_mutex_prio;
84
85
-        if (!tp->DASH) return;
86
+        if (!tp->DASH)
87
+                return;
88
89
         switch (tp->mcfg) {
90
         case CFG_METHOD_11:
91
@@ -2493,7 +2502,8 @@
92
         u16 ocp_reg_mutex_oob;
93
         u16 ocp_reg_mutex_prio;
94
95
-        if (!tp->DASH) return;
96
+        if (!tp->DASH)
97
+                return;
98
99
         switch (tp->mcfg) {
100
         case CFG_METHOD_11:
101
@@ -2556,7 +2566,8 @@
102
103
 void rtl8168_dash2_disable_tx(struct rtl8168_private *tp)
104
 {
105
-        if (!tp->DASH) return;
106
+        if (!tp->DASH)
107
+                return;
108
109
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
110
                 u16 WaitCnt;
111
@@ -2585,7 +2596,8 @@
112
113
 void rtl8168_dash2_enable_tx(struct rtl8168_private *tp)
114
 {
115
-        if (!tp->DASH) return;
116
+        if (!tp->DASH)
117
+                return;
118
119
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
120
                 RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) | BIT_0);
121
@@ -2594,7 +2606,8 @@
122
123
 void rtl8168_dash2_disable_rx(struct rtl8168_private *tp)
124
 {
125
-        if (!tp->DASH) return;
126
+        if (!tp->DASH)
127
+                return;
128
129
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
130
                 RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) & ~( BIT_0 ));
131
@@ -2603,7 +2616,8 @@
132
133
 void rtl8168_dash2_enable_rx(struct rtl8168_private *tp)
134
 {
135
-        if (!tp->DASH) return;
136
+        if (!tp->DASH)
137
+                return;
138
139
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
140
                 RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) | BIT_0);
141
@@ -3412,7 +3426,8 @@
142
 inline void
143
 rtl8168_enable_dash2_interrupt(struct rtl8168_private *tp)
144
 {
145
-        if (!tp->DASH) return;
146
+        if (!tp->DASH)
147
+                return;
148
149
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
150
                 RTL_CMAC_W8(tp, CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE ));
151
@@ -3422,7 +3437,8 @@
152
 static inline void
153
 rtl8168_disable_dash2_interrupt(struct rtl8168_private *tp)
154
 {
155
-        if (!tp->DASH) return;
156
+        if (!tp->DASH)
157
+                return;
158
159
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
160
                 RTL_CMAC_W8(tp, CMAC_IBIMR0, 0);
161
@@ -3803,7 +3819,8 @@
162
                            ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL));
163
         rtl8168_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
164
165
-        if (rtl8168_wait_phy_reset_complete(tp) == 0) return;
166
+        if (rtl8168_wait_phy_reset_complete(tp) == 0)
167
+                return;
168
169
         if (netif_msg_link(tp))
170
                 printk(KERN_ERR "%s: PHY reset failed.\n", dev->name);
171
@@ -3900,7 +3917,7 @@
172
                 csi_tmp |= (BIT_10 | BIT_11);
173
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
174
                 break;
175
-        case CFG_METHOD_21 ... CFG_METHOD_34:
176
+        case CFG_METHOD_21 ... CFG_METHOD_35:
177
                 csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
178
                 csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
179
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
180
@@ -3927,7 +3944,7 @@
181
                 csi_tmp &= ~(BIT_10 | BIT_11);
182
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
183
                 break;
184
-        case CFG_METHOD_21 ... CFG_METHOD_34:
185
+        case CFG_METHOD_21 ... CFG_METHOD_35:
186
                 csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
187
                 csi_tmp &= ~(BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
188
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
189
@@ -3938,7 +3955,8 @@
190
 static void
191
 rtl8168_hw_aspm_clkreq_enable(struct rtl8168_private *tp, bool enable)
192
 {
193
-        if (!tp->HwSuppAspmClkIntrLock) return;
194
+        if (!tp->HwSuppAspmClkIntrLock)
195
+                return;
196
197
         if (enable && aspm) {
198
                 RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en);
199
@@ -4846,7 +4864,8 @@
200
 {
201
         struct rtl8168_private *tp = netdev_priv(dev);
202
203
-        if (rtl8168_is_in_phy_disable_mode(dev)) return;
204
+        if (rtl8168_is_in_phy_disable_mode(dev))
205
+                return;
206
207
         rtl8168_mdio_write(tp, 0x1F, 0x0000);
208
         rtl8168_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART);
209
@@ -4858,7 +4877,8 @@
210
         struct rtl8168_private *tp = netdev_priv(dev);
211
         u16 bmcr_true_force = 0;
212
213
-        if (rtl8168_is_in_phy_disable_mode(dev)) return;
214
+        if (rtl8168_is_in_phy_disable_mode(dev))
215
+                return;
216
217
         if ((speed == SPEED_10) && (duplex == DUPLEX_HALF)) {
218
                 bmcr_true_force = BMCR_SPEED10;
219
@@ -4948,7 +4968,8 @@
220
                 auto_nego |= auto_nego_tmp;
221
                 goto skip_check_lpa;
222
         }
223
-        if (!(aner & EXPANSION_NWAY)) goto exit;
224
+        if (!(aner & EXPANSION_NWAY))
225
+                goto exit;
226
227
         adv = tp->advertising;
228
         if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF))
229
@@ -5069,7 +5090,7 @@
230
         case CFG_METHOD_14 ... CFG_METHOD_15:
231
                 RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
232
                 break;
233
-        case CFG_METHOD_16 ... CFG_METHOD_34:
234
+        case CFG_METHOD_16 ... CFG_METHOD_35:
235
                 RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
236
                 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
237
                 break;
238
@@ -5912,7 +5933,7 @@
239
         struct rtl8168_private *tp = netdev_priv(dev);
240
241
         ring->rx_max_pending = MAX_NUM_TX_DESC;
242
-        ring->tx_max_pending = MAX_NUM_RX_DESC;;
243
+        ring->tx_max_pending = MAX_NUM_RX_DESC;
244
         ring->rx_pending = tp->num_rx_desc;
245
         ring->tx_pending = tp->num_tx_desc;
246
 }
247
@@ -6702,7 +6723,7 @@
248
         u16 val;
249
250
         switch (tp->mcfg) {
251
-        case CFG_METHOD_21 ... CFG_METHOD_34:
252
+        case CFG_METHOD_21 ... CFG_METHOD_35:
253
                 break;
254
         default:
255
                 return -EOPNOTSUPP;
256
@@ -6749,7 +6770,7 @@
257
         unsigned long flags;
258
259
         switch (tp->mcfg) {
260
-        case CFG_METHOD_21 ... CFG_METHOD_34:
261
+        case CFG_METHOD_21 ... CFG_METHOD_35:
262
                 break;
263
         default:
264
                 return -EOPNOTSUPP;
265
@@ -7388,7 +7409,8 @@
266
 {
267
         u16 PhyState = 0xFF;
268
269
-        if (HW_SUPPORT_UPS_MODE(tp) == FALSE) goto exit;
270
+        if (HW_SUPPORT_UPS_MODE(tp) == FALSE)
271
+                goto exit;
272
273
         switch (tp->HwSuppUpsVer) {
274
         case 1:
275
@@ -7413,7 +7435,8 @@
276
         u32 i = 0;
277
         bool PhyStateReady = TRUE;
278
279
-        if (HW_SUPPORT_UPS_MODE(tp) == FALSE) goto exit;
280
+        if (HW_SUPPORT_UPS_MODE(tp) == FALSE)
281
+                goto exit;
282
283
         WaitCount = MicroSecondTimeout / 1000;
284
         if (WaitCount == 0) WaitCount = 100;
285
@@ -7454,7 +7477,8 @@
286
                 }
287
         }
288
289
-        if (ResetPhyType == 0) goto exit;
290
+        if (ResetPhyType == 0)
291
+                goto exit;
292
293
         netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
294
                   ResetPhyType);
295
@@ -7516,6 +7540,9 @@
296
         u8 nctl_pc_range_fail;
297
         u8 nctl_pc_stuck_fail;
298
299
+        if (FALSE == HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp))
300
+                goto exit;
301
+
302
         rtl8168_mdio_write(tp, 0x1F, 0x0B82);
303
         uc_response = !!(rtl8168_mdio_read(tp, 0x10) & BIT_5);
304
         rtl8168_mdio_write(tp, 0x1F, 0x0B84);
305
@@ -7535,7 +7562,8 @@
306
                 }
307
         }
308
309
-        if (ResetPhyType == 0) goto exit;
310
+        if (ResetPhyType == 0)
311
+                goto exit;
312
313
         netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
314
                   ResetPhyType);
315
@@ -7610,7 +7638,8 @@
316
 {
317
         bool RestorePhyOcpReg = FALSE;
318
319
-        if (tp->TestPhyOcpReg == FALSE) goto exit;
320
+        if (tp->TestPhyOcpReg == FALSE)
321
+                goto exit;
322
323
         switch (tp->HwSuppEsdVer) {
324
         case 2:
325
@@ -7683,7 +7712,8 @@
326
         struct rtl8168_private *tp
327
 )
328
 {
329
-        if (FALSE == HW_SUPP_SERDES_PHY(tp)) return;
330
+        if (FALSE == HW_SUPP_SERDES_PHY(tp))
331
+                return;
332
333
         switch (tp->HwSuppSerDesPhyVer) {
334
         case 1:
335
@@ -8863,7 +8893,7 @@
336
         struct rtl8168_private *tp = netdev_priv(dev);
337
         u16 i;
338
         static const u16 mcu_patch_code_8168ep_2 = {
339
-                0xE008, 0xE017, 0xE052, 0xE057, 0xE059, 0xE05B, 0xE05D, 0xE05F, 0xC50F,
340
+                0xE008, 0xE017, 0xE052, 0xE056, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xC50F,
341
                 0x76A4, 0x49E3, 0xF007, 0x49C0, 0xF103, 0xC607, 0xBE00, 0xC606, 0xBE00,
342
                 0xC602, 0xBE00, 0x0BDA, 0x0BB6, 0x0BBA, 0xDC00, 0xB400, 0xB401, 0xB402,
343
                 0xB403, 0xB404, 0xC02E, 0x7206, 0x49AE, 0xF1FE, 0xC12B, 0x9904, 0xC12A,
344
@@ -8872,9 +8902,9 @@
345
                 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x990A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE,
346
                 0xF1FE, 0xFF80, 0xB004, 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002,
347
                 0xB800, 0x1FC8, 0xE000, 0xE8E0, 0xF128, 0x0002, 0xFFFF, 0xF000, 0x8001,
348
-                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x0490,
349
-                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
350
-                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
351
+                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x0490, 0xC602,
352
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
353
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
354
         };
355
356
         rtl8168_hw_disable_mac_mcu_bps(dev);
357
@@ -9153,8 +9183,10 @@
358
 {
359
         struct rtl8168_private *tp = netdev_priv(dev);
360
361
-        if (tp->HwSuppSerDesPhyVer == 1) rtl8168_set_mac_mcu_8168fp_8116as_2(dev);
362
-        else _rtl8168_set_mac_mcu_8168fp_2(dev);
363
+        if (tp->HwSuppSerDesPhyVer == 1)
364
+                rtl8168_set_mac_mcu_8168fp_8116as_2(dev);
365
+        else
366
+                _rtl8168_set_mac_mcu_8168fp_2(dev);
367
 }
368
369
 static void
370
@@ -9199,7 +9231,8 @@
371
 {
372
         struct rtl8168_private *tp = netdev_priv(dev);
373
374
-        if (tp->NotWrMcuPatchCode == TRUE) return;
375
+        if (tp->NotWrMcuPatchCode == TRUE)
376
+                return;
377
378
         switch (tp->mcfg) {
379
         case CFG_METHOD_21:
380
@@ -9767,7 +9800,7 @@
381
         int retval = TRUE;
382
383
         switch (tp->mcfg) {
384
-        case CFG_METHOD_21 ... CFG_METHOD_34:
385
+        case CFG_METHOD_21 ... CFG_METHOD_35:
386
                 rtl8168_mdio_write(tp,0x1f, 0x0B82);
387
                 rtl8168_set_eth_phy_bit(tp, 0x10, BIT_4);
388
389
@@ -9779,7 +9812,8 @@
390
                         WaitCnt++;
391
                 }  while (!(PhyRegValue & BIT_6) && (WaitCnt < 1000));
392
393
-                if (!(PhyRegValue & BIT_6) && (WaitCnt == 1000)) retval = FALSE;
394
+                if (!(PhyRegValue & BIT_6) && (WaitCnt == 1000))
395
+                        retval = FALSE;
396
397
                 rtl8168_mdio_write(tp,0x1f, 0x0000);
398
                 break;
399
@@ -9796,7 +9830,7 @@
400
         int retval = TRUE;
401
402
         switch (tp->mcfg) {
403
-        case CFG_METHOD_21 ... CFG_METHOD_34:
404
+        case CFG_METHOD_21 ... CFG_METHOD_35:
405
                 rtl8168_mdio_write(tp, 0x1f, 0x0B82);
406
                 rtl8168_clear_eth_phy_bit(tp, 0x10, BIT_4);
407
408
@@ -9808,7 +9842,8 @@
409
                         WaitCnt++;
410
                 } while ((PhyRegValue & BIT_6) && (WaitCnt < 1000));
411
412
-                if ((PhyRegValue & BIT_6) && (WaitCnt == 1000)) retval = FALSE;
413
+                if ((PhyRegValue & BIT_6) && (WaitCnt == 1000))
414
+                        retval = FALSE;
415
416
                 rtl8168_mdio_write(tp,0x1f, 0x0000);
417
                 break;
418
@@ -21752,8 +21787,10 @@
419
         struct rtl8168_private *tp = netdev_priv(dev);
420
         u8 require_disable_phy_disable_mode = FALSE;
421
422
-        if (tp->NotWrRamCodeToMicroP == TRUE) return;
423
-        if (rtl8168_check_hw_phy_mcu_code_ver(dev)) return;
424
+        if (tp->NotWrRamCodeToMicroP == TRUE)
425
+                return;
426
+        if (rtl8168_check_hw_phy_mcu_code_ver(dev))
427
+                return;
428
429
         if (FALSE == rtl8168_phy_ram_code_check(dev)) {
430
                 rtl8168_set_phy_ram_code_check_fail_flag(dev);
431
@@ -21832,7 +21869,8 @@
432
433
         tp->phy_reset_enable(dev);
434
435
-        if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06) return;
436
+        if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06)
437
+                return;
438
439
 #ifndef ENABLE_USE_FIRMWARE_FILE
440
         if (!tp->rtl_fw) {
441
@@ -25080,6 +25118,10 @@
442
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
443
444
                 tp->TestPhyOcpReg = TRUE;
445
+#ifdef ENABLE_USE_FIRMWARE_FILE
446
+                if (tp->HwSuppEsdVer == 3)
447
+                        tp->TestPhyOcpReg = FALSE;
448
+#endif
449
         }
450
451
         switch (tp->mcfg) {
452
@@ -26508,6 +26550,9 @@
453
454
         spin_lock_irqsave(&tp->lock, flags);
455
456
+        if (unlikely(tp->rtk_enable_diag))
457
+                goto out_unlock;
458
+
459
         tp->esd_flag = 0;
460
461
         pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
462
@@ -27186,7 +27231,8 @@
463
         struct pci_dev *pdev = tp->pci_dev;
464
         u8 device_control;
465
466
-        if (hwoptimize & HW_PATCH_SOC_LAN) return;
467
+        if (hwoptimize & HW_PATCH_SOC_LAN)
468
+                return;
469
470
         pci_read_config_byte(pdev, 0x79, &device_control);
471
         device_control &= ~0x70;
472
@@ -28531,7 +28577,8 @@
473
         int i = 0;
474
         int ownbit = 0;
475
476
-        if (tp->RxDescArray == NULL) return;
477
+        if (tp->RxDescArray == NULL)
478
+                return;
479
480
         if (own)
481
                 ownbit = DescOwn;
482
@@ -28651,7 +28698,8 @@
483
         struct rtl8168_private *tp = netdev_priv(dev);
484
         struct work_struct *work = &tp->task.work;
485
486
-        if (!work->func) return;
487
+        if (!work->func)
488
+                return;
489
490
         cancel_delayed_work_sync(&tp->task);
491
 }
492
@@ -29668,7 +29716,8 @@
493
 #endif
494
495
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
496
-                if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) return RTL_NAPI_RETURN_VALUE;
497
+                if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE)
498
+                        return RTL_NAPI_RETURN_VALUE;
499
 #else
500
                 RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
501
 #endif
502
@@ -29691,7 +29740,8 @@
503
 {
504
         struct rtl8168_private *tp = netdev_priv(dev);
505
506
-        if (tp->wol_enabled != WOL_ENABLED) return;
507
+        if (tp->wol_enabled != WOL_ENABLED)
508
+                return;
509
510
         if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2)) {
511
                 RTL_W8(tp, ChipCmd, CmdReset);
512
​
Refresh 












































































Request History








bitstreamout's avatar




bitstreamout
created request
over 2 years ago









- Update to new version 8.050.03

- Add patch r8168-support-linux-5.19.patch to get it build with 5.19
















bitstreamout's avatar




bitstreamout
accepted request
over 2 years ago









OK



































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