Request 5558 (accepted)

Overview

Request 5558 (accepted)

- Update to new version 8.050.00
- Port patches r8168-kernel_version.patch and r8168-configuration.patch

Created by bitstreamout almost 3 years ago
In state accepted
Package maintainer: bitstreamout

Submit r8168

Submit package home:bitstreamout:Essentials / r8168 to package Essentials / r8168

r8168.changes Changed

​x
 
@@ -1,7 +1,8 @@
 -------------------------------------------------------------------
-Tue Aug 24 13:01:21 UTC 2021 - Luigi Baldoni <aloisio@gmx.com>
+Tue May 10 10:30:35 UTC 2022 - Werner Fink <werner@suse.de>
 
-- Update to version 8.049.02
+- Update to new version 8.050.00
+- Port patches r8168-kernel_version.patch and r8168-configuration.patch
 
 -------------------------------------------------------------------
 Thu Jan 21 15:49:06 UTC 2021 - Werner Fink <werner@suse.de>
​

r8168.spec Changed

 
@@ -1,7 +1,7 @@
 #
 # spec file for package r8168
 #
-# Copyright (c) 2021 Packman Team <packman@links2linux.de>
+# Copyright (c) 2019 Packman Team <packman@links2linux.de>
 # Copyright (c) 2017 SUSE LINUX Products GmbH, Nuernberg, Germany.
 #
 # All modifications and additions to the file contributed by third parties
@@ -18,7 +18,7 @@
 
 #!BuildIgnore: enough-build-resources
 Name:           r8168
-Version:        8.049.02
+Version:        8.050.00
 Release:        0
 Summary:        Device driver for RealTek Gigabit Ethernet controllers
 License:        GPL-2.0-or-later
​

r8168-configuration.patch Changed

 
@@ -3,8 +3,8 @@
  1 file changed, 1 insertion(+)
 
 --- src/Makefile
-+++ src/Makefile   2018-01-10 14:35:59.981468278 +0000
-@@ -44,6 +44,7 @@ ENABLE_S0_MAGIC_PACKET = n
++++ src/Makefile   2022-05-10 10:26:59.851240712 +0000
+@@ -48,6 +48,7 @@ CONFIG_CTAP_SHORT_OFF = n
  ifneq ($(KERNELRELEASE),)
    obj-m := r8168.o
    r8168-objs := r8168_n.o r8168_asf.o rtl_eeprom.o rtltool.o
​

r8168-kernel_version.patch Changed

@@ -4,8 +4,8 @@
  2 files changed, 18 insertions(+), 1 deletion(-)
 
 --- src/r8168.h
-+++ src/r8168.h	2021-01-25 09:25:12.615124741 +0000
-@@ -116,6 +116,10 @@ do { \
++++ src/r8168.h	2022-05-10 10:26:28.831787721 +0000
+@@ -121,6 +121,10 @@ do { \
  } while (0)
  #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
  
@@ -17,8 +17,8 @@
  #if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present)
  #define vlan_tx_tag_present skb_vlan_tag_present
 --- src/r8168_n.c
-+++ src/r8168_n.c	2021-01-25 11:42:13.268115241 +0000
-@@ -60,11 +60,16 @@
++++ src/r8168_n.c	2022-05-10 10:26:28.871787016 +0000
+@@ -61,11 +61,16 @@
  #include <linux/rtnetlink.h>
  #include <linux/completion.h>
  
@@ -35,7 +35,7 @@
  #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
  #include <linux/prefetch.h>
  #endif
-@@ -459,8 +464,12 @@ static void rtl8168_set_rx_mode(struct n
+@@ -571,8 +576,12 @@ static void rtl8168_set_rx_mode(struct n
  #if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
  static void rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue);
  #else
@@ -48,7 +48,7 @@
  static struct net_device_stats *rtl8168_get_stats(struct net_device *dev);
  static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, napi_budget);
  static int rtl8168_change_mtu(struct net_device *dev, int new_mtu);
-@@ -27948,8 +27957,12 @@ static void
+@@ -28748,8 +28757,12 @@ static void
  rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue)
  #else
  static void
@@ -61,7 +61,7 @@
  {
          struct rtl8168_private *tp = netdev_priv(dev);
          unsigned long flags;
-@@ -28655,7 +28668,7 @@ process_pkt:
+@@ -29435,7 +29448,7 @@ process_pkt:
  
                          if (rtl8168_rx_vlan_skb(tp, desc, skb) < 0)
                                  rtl8168_rx_skb(tp, skb);

 
@@ -4,8 +4,8 @@
  2 files changed, 18 insertions(+), 1 deletion(-)
 
 --- src/r8168.h
-+++ src/r8168.h    2021-01-25 09:25:12.615124741 +0000
-@@ -116,6 +116,10 @@ do { \
++++ src/r8168.h    2022-05-10 10:26:28.831787721 +0000
+@@ -121,6 +121,10 @@ do { \
  } while (0)
  #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
  
@@ -17,8 +17,8 @@
  #if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present)
  #define vlan_tx_tag_present skb_vlan_tag_present
 --- src/r8168_n.c
-+++ src/r8168_n.c  2021-01-25 11:42:13.268115241 +0000
-@@ -60,11 +60,16 @@
++++ src/r8168_n.c  2022-05-10 10:26:28.871787016 +0000
+@@ -61,11 +61,16 @@
  #include <linux/rtnetlink.h>
  #include <linux/completion.h>
  
@@ -35,7 +35,7 @@
  #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
  #include <linux/prefetch.h>
  #endif
-@@ -459,8 +464,12 @@ static void rtl8168_set_rx_mode(struct n
+@@ -571,8 +576,12 @@ static void rtl8168_set_rx_mode(struct n
  #if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
  static void rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue);
  #else
@@ -48,7 +48,7 @@
  static struct net_device_stats *rtl8168_get_stats(struct net_device *dev);
  static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, napi_budget);
  static int rtl8168_change_mtu(struct net_device *dev, int new_mtu);
-@@ -27948,8 +27957,12 @@ static void
+@@ -28748,8 +28757,12 @@ static void
  rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue)
  #else
  static void
@@ -61,7 +61,7 @@
  {
          struct rtl8168_private *tp = netdev_priv(dev);
          unsigned long flags;
-@@ -28655,7 +28668,7 @@ process_pkt:
+@@ -29435,7 +29448,7 @@ process_pkt:
  
                          if (rtl8168_rx_vlan_skb(tp, desc, skb) < 0)
                                  rtl8168_rx_skb(tp, skb);
​

r8168-8.049.02.tar.gz/Makefile -> r8168-8.050.00.tar.gz/Makefile Changed

 
@@ -4,7 +4,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/Makefile -> r8168-8.050.00.tar.gz/src/Makefile Changed

 
@@ -4,7 +4,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
@@ -43,6 +43,7 @@
 ENABLE_S0_MAGIC_PACKET = n
 CONFIG_DYNAMIC_ASPM = y
 ENABLE_USE_FIRMWARE_FILE = n
+CONFIG_CTAP_SHORT_OFF = n
 
 ifneq ($(KERNELRELEASE),)
    obj-m := r8168.o
@@ -93,6 +94,9 @@
        r8168-objs += r8168_firmware.o
        EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE
    endif
+   ifeq ($(CONFIG_CTAP_SHORT_OFF), y)
+       EXTRA_CFLAGS += -DCONFIG_CTAP_SHORT_OFF
+   endif
 else
    BASEDIR := /lib/modules/$(shell uname -r)
    KERNELDIR ?= $(BASEDIR)/build
​

r8168-8.049.02.tar.gz/src/Makefile_linux24x -> r8168-8.050.00.tar.gz/src/Makefile_linux24x Changed

 
@@ -4,7 +4,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/r8168.h -> r8168-8.050.00.tar.gz/src/r8168.h Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
@@ -138,6 +138,10 @@
 #endif
 #endif
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
+#define eth_random_addr(addr) random_ether_addr(addr)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
+
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
 #define netdev_features_t  u32
@@ -340,12 +344,12 @@
 #define DASH_SUFFIX ""
 #endif
 
-#define RTL8168_VERSION "8.049.02" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
+#define RTL8168_VERSION "8.050.00" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
 #define MODULENAME "r8168"
 #define PFX MODULENAME ": "
 
 #define GPL_CLAIM "\
-r8168  Copyright (C) 2021 Realtek NIC software team <nicfae@realtek.com> \n \
+r8168  Copyright (C) 2022 Realtek NIC software team <nicfae@realtek.com> \n \
 This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \
 This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n"
 
@@ -428,12 +432,16 @@
 #define RTL8168_LINK_TIMEOUT    (1 * HZ)
 #define RTL8168_ESD_TIMEOUT (2 * HZ)
 
-#define NUM_TX_DESC 1024    /* Number of Tx descriptor registers */
-#define NUM_RX_DESC 1024    /* Number of Rx descriptor registers */
+#define MAX_NUM_TX_DESC 1024    /* Maximum number of Tx descriptor registers */
+#define MAX_NUM_RX_DESC 1024    /* Maximum number of Rx descriptor registers */
+
+#define MIN_NUM_TX_DESC 32    /* Minimum number of Tx descriptor registers */
+#define MIN_NUM_RX_DESC 32    /* Minimum number of Rx descriptor registers */
+
+#define NUM_TX_DESC 256    /* Number of Tx descriptor registers */
+#define NUM_RX_DESC 256    /* Number of Rx descriptor registers */
 
 #define RX_BUF_SIZE 0x05F3  /* 0x05F3 = 1522bye + 1 */
-#define R8168_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
-#define R8168_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
 
 #define OCP_STD_PHY_BASE   0xa400
 
@@ -1467,6 +1475,15 @@
         u32 pci_sn_h;
 };
 
+/* Flow Control Settings */
+enum rtl8168_fc_mode {
+        rtl8168_fc_none = 0,
+        rtl8168_fc_rx_pause,
+        rtl8168_fc_tx_pause,
+        rtl8168_fc_full,
+        rtl8168_fc_default
+};
+
 struct rtl8168_private {
         void __iomem *mmio_addr;    /* memory map physical address */
         struct pci_dev *pci_dev;    /* Index of PCI device */
@@ -1490,12 +1507,14 @@
         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
         u32 dirty_rx;
         u32 dirty_tx;
+        u32 num_rx_desc; /* Number of Rx descriptor registers */
+        u32 num_tx_desc; /* Number of Tx descriptor registers */
         struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
         struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
         dma_addr_t TxPhyAddr;
         dma_addr_t RxPhyAddr;
-        struct sk_buff *Rx_skbuffNUM_RX_DESC; /* Rx data buffers */
-        struct ring_info tx_skbNUM_TX_DESC;   /* Tx data buffers */
+        struct sk_buff *Rx_skbuffMAX_NUM_RX_DESC; /* Rx data buffers */
+        struct ring_info tx_skbMAX_NUM_TX_DESC;   /* Tx data buffers */
         unsigned rx_buf_sz;
         struct timer_list esd_timer;
         struct timer_list link_timer;
@@ -1523,6 +1542,7 @@
         u8  duplex;
         u32 speed;
         u32 advertising;
+        enum rtl8168_fc_mode fcpause;
         u16 eeprom_len;
         u16 cur_page;
         u32 bios_setting;
@@ -1606,6 +1626,7 @@
         u8 HwSuppEsdVer;
         u8 TestPhyOcpReg;
         u16 BackupPhyFuseDout_15_0;
+        u16 BackupPhyFuseDout_31_16;
         u16 BackupPhyFuseDout_47_32;
         u16 BackupPhyFuseDout_63_48;
 
@@ -1746,6 +1767,8 @@
         CFG_METHOD_31,
         CFG_METHOD_32,
         CFG_METHOD_33,
+        CFG_METHOD_34,
+        CFG_METHOD_35,
         CFG_METHOD_MAX,
         CFG_METHOD_DEFAULT = 0xFF
 };
@@ -1786,6 +1809,7 @@
 #define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0019)
 #define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0055)
 #define NIC_RAMCODE_VERSION_CFG_METHOD_31 (0x0003)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0004)
 
 //hwoptimize
 #define HW_PATCH_SOC_LAN (BIT_0)
​

r8168-8.049.02.tar.gz/src/r8168_asf.c -> r8168-8.050.00.tar.gz/src/r8168_asf.c Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/r8168_asf.h -> r8168-8.050.00.tar.gz/src/r8168_asf.h Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/r8168_dash.h -> r8168-8.050.00.tar.gz/src/r8168_dash.h Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/r8168_fiber.h -> r8168-8.050.00.tar.gz/src/r8168_fiber.h Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
@@ -44,24 +44,26 @@
 
 enum {
         FIBER_STAT_NOT_CHECKED = 0,
-        FIBER_STAT_CONNECT,
+        FIBER_STAT_CONNECT_EEPROM,
         FIBER_STAT_DISCONNECT,
+        FIBER_STAT_CONNECT_GPO,
         FIBER_STAT_MAX
 };
 
 #define HW_FIBER_MODE_ENABLED(_M)        ((_M)->HwFiberModeVer > 0)
+#define HW_FIBER_STATUS_CONNECTED(_M)        (((_M)->HwFiberStat == FIBER_STAT_CONNECT_EEPROM) || ((_M)->HwFiberStat == FIBER_STAT_CONNECT_GPO))
+#define HW_FIBER_STATUS_DISCONNECTED(_M)        ((_M)->HwFiberStat == FIBER_STAT_DISCONNECT)
 
+struct rtl8168_private;
 
-
-void rtl8168_hw_init_fiber_nic(struct net_device *dev);
-void rtl8168_hw_fiber_nic_d3_para(struct net_device *dev);
-void rtl8168_hw_fiber_phy_config(struct net_device *dev);
-void rtl8168_hw_switch_mdi_to_fiber(struct net_device *dev);
-void rtl8168_hw_switch_mdi_to_nic(struct net_device *dev);
-unsigned int rtl8168_hw_fiber_link_ok(struct net_device *dev);
-void rtl8168_check_fiber_link_status(struct net_device *dev);
-void rtl8168_check_hw_fiber_mode_support(struct net_device *dev);
-void rtl8168_set_fiber_mode_software_variable(struct net_device *dev);
-
+void rtl8168_hw_init_fiber_nic(struct rtl8168_private *tp);
+void rtl8168_hw_fiber_nic_d3_para(struct rtl8168_private *tp);
+void rtl8168_hw_fiber_phy_config(struct rtl8168_private *tp);
+void rtl8168_hw_switch_mdi_to_fiber(struct rtl8168_private *tp);
+void rtl8168_hw_switch_mdi_to_nic(struct rtl8168_private *tp);
+unsigned int rtl8168_hw_fiber_link_ok(struct rtl8168_private *tp);
+void rtl8168_check_fiber_link_status(struct rtl8168_private *tp);
+void rtl8168_check_hw_fiber_mode_support(struct rtl8168_private *tp);
+void rtl8168_set_fiber_mode_software_variable(struct rtl8168_private *tp);
 
 #endif /* _LINUX_R8168_FIBER_H */
​

r8168-8.049.02.tar.gz/src/r8168_firmware.c -> r8168-8.050.00.tar.gz/src/r8168_firmware.c Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/r8168_firmware.h -> r8168-8.050.00.tar.gz/src/r8168_firmware.h Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/r8168_n.c -> r8168-8.050.00.tar.gz/src/r8168_n.c Changed

@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
@@ -112,6 +112,7 @@
 #define FIRMWARE_8168EP_3   "rtl_nic/rtl8168ep-3.fw"
 #define FIRMWARE_8168H_1    "rtl_nic/rtl8168h-1.fw"
 #define FIRMWARE_8168H_2    "rtl_nic/rtl8168h-2.fw"
+#define FIRMWARE_8168H_3    "rtl_nic/rtl8168h-3.fw"
 #define FIRMWARE_8168FP_3   "rtl_nic/rtl8168fp-3.fw"
 #define FIRMWARE_8168FP_4   "rtl_nic/rtl8168fp-4.fw"
 
@@ -157,6 +158,8 @@
         CFG_METHOD_31 = {"RTL8168FP/8111FP",      },
         CFG_METHOD_32 = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_3},
         CFG_METHOD_33 = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
+        CFG_METHOD_34 = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
+        CFG_METHOD_35 = {"RTL8168H/8111H",        FIRMWARE_8168H_3},
         CFG_METHOD_DEFAULT = {"Unknown",          },
 };
 
@@ -368,6 +371,18 @@
         0xff7e5880,
         Jumbo_Frame_9k),
 
+        _R("RTL8168FP/8111FP",
+        CFG_METHOD_34,
+        RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168H/8111H",
+        CFG_METHOD_35,
+        RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
         _R("Unknown",
         CFG_METHOD_DEFAULT,
         (RX_DMA_BURST << RxCfgDMAShift),
@@ -517,6 +532,7 @@
 MODULE_FIRMWARE(FIRMWARE_8168EP_3);
 MODULE_FIRMWARE(FIRMWARE_8168H_1);
 MODULE_FIRMWARE(FIRMWARE_8168H_2);
+MODULE_FIRMWARE(FIRMWARE_8168H_3);
 MODULE_FIRMWARE(FIRMWARE_8168FP_3);
 MODULE_FIRMWARE(FIRMWARE_8168FP_4);
 #endif
@@ -563,7 +579,7 @@
 static void rtl8168_down(struct net_device *dev);
 
 static int rtl8168_set_mac_address(struct net_device *dev, void *p);
-void rtl8168_rar_set(struct rtl8168_private *tp, uint8_t *addr);
+void rtl8168_rar_set(struct rtl8168_private *tp, const u8 *addr);
 static void rtl8168_desc_addr_fill(struct rtl8168_private *);
 static void rtl8168_tx_desc_init(struct rtl8168_private *tp);
 static void rtl8168_rx_desc_init(struct rtl8168_private *tp);
@@ -946,10 +962,10 @@
         seq_printf(m, "chipset\t%d\n", tp->chipset);
         seq_printf(m, "chipset_name\t%s\n", rtl_chip_infotp->chipset.name);
         seq_printf(m, "mtu\t%d\n", dev->mtu);
-        seq_printf(m, "NUM_RX_DESC\t0x%x\n", NUM_RX_DESC);
+        seq_printf(m, "NUM_RX_DESC\t0x%x\n", tp->num_rx_desc);
         seq_printf(m, "cur_rx\t0x%x\n", tp->cur_rx);
         seq_printf(m, "dirty_rx\t0x%x\n", tp->dirty_rx);
-        seq_printf(m, "NUM_TX_DESC\t0x%x\n", NUM_TX_DESC);
+        seq_printf(m, "NUM_TX_DESC\t0x%x\n", tp->num_tx_desc);
         seq_printf(m, "cur_tx\t0x%x\n", tp->cur_tx);
         seq_printf(m, "dirty_tx\t0x%x\n", tp->dirty_tx);
         seq_printf(m, "rx_buf_sz\t0x%x\n", tp->rx_buf_sz);
@@ -1340,10 +1356,10 @@
                         tp->chipset,
                         rtl_chip_infotp->chipset.name,
                         dev->mtu,
-                        NUM_RX_DESC,
+                        tp->num_rx_desc,
                         tp->cur_rx,
                         tp->dirty_rx,
-                        NUM_TX_DESC,
+                        tp->num_tx_desc,
                         tp->cur_tx,
                         tp->dirty_tx,
                         tp->rx_buf_sz,
@@ -1733,7 +1749,11 @@
 static int rtl8168_proc_open(struct inode *inode, struct file *file)
 {
         struct net_device *dev = proc_get_parent_data(inode);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+        int (*show)(struct seq_file *, void *) = pde_data(inode);
+#else
         int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
 
         return single_open(file, show, dev);
 }
@@ -2253,7 +2273,6 @@
         rtl8168_mac_ocp_write(tp, addr, RegValue);
 }
 
-/*
 static void
 rtl8168_clear_mcu_ocp_bit(
         struct rtl8168_private *tp,
@@ -2267,7 +2286,6 @@
                                           0
                                          );
 }
-*/
 
 static void
 rtl8168_set_mcu_ocp_bit(
@@ -2432,6 +2450,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
         default:
                 ocp_reg_mutex_oob = 0x110;
                 ocp_reg_mutex_ib = 0x114;
@@ -2494,6 +2513,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
         default:
                 ocp_reg_mutex_oob = 0x110;
                 ocp_reg_mutex_ib = 0x114;
@@ -2685,7 +2705,8 @@
         if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
             tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
             tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
-            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33) {
+            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 &&
+            tp->mcfg != CFG_METHOD_34) {
                 multi_fun_sel_bit = 0;
         }
 
@@ -2726,7 +2747,8 @@
         if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
             tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
             tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
-            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33) {
+            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 &&
+            tp->mcfg != CFG_METHOD_34) {
                 multi_fun_sel_bit = 0;
         }
 
@@ -2758,7 +2780,8 @@
         if (tp->mcfg == CFG_METHOD_20)
                 multi_fun_sel_bit = 2;
         else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
-                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
+                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                 tp->mcfg == CFG_METHOD_34)
                 multi_fun_sel_bit = 1;
         else
                 multi_fun_sel_bit = 0;
@@ -2776,7 +2799,8 @@
         if (tp->mcfg == CFG_METHOD_20)
                 multi_fun_sel_bit = 2;
         else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
-                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
+                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                 tp->mcfg == CFG_METHOD_34)
                 multi_fun_sel_bit = 1;
         else
                 multi_fun_sel_bit = 0;
@@ -2792,7 +2816,7 @@
 
         if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
                 u32 TmpUlong;
                 u16 RegAlignAddr;
                 u8 ShiftByte;
@@ -2820,7 +2844,7 @@
 {
         if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
                 u32 TmpUlong;
                 u16 RegAlignAddr;
                 u8 ShiftByte;
@@ -2887,6 +2911,7 @@
                         case CFG_METHOD_31:
                         case CFG_METHOD_32:
                         case CFG_METHOD_33:
+                        case CFG_METHOD_34:
                                 //0: BMC, 1: NIC, 2: TCR, 3: VGA/PCIE_TO_USB, 4: EHCI, 5: WIFI, 6: WIFI, 7: KCS
                                 if (i == 5 || i == 6) {
                                         if (tp->DASH) {
@@ -3126,6 +3151,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3);
                 mdelay(2);
                 break;
@@ -3151,6 +3178,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3);
                 mdelay(2);
                 break;
@@ -3239,6 +3268,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 for (i = 0; i < 10; i++) {
                         udelay(100);
                         if (RTL_R32(tp, TxConfig) & BIT_11)
@@ -3269,6 +3300,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0xFC);
                 rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFC);
                 break;
@@ -3369,6 +3401,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFD);
                 break;
         }
@@ -3516,6 +3549,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 mdelay(2);
                 break;
         default:
@@ -3597,6 +3632,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W32(tp, TimeInt1, 0x0000);
                 RTL_W32(tp, TimeInt2, 0x0000);
                 RTL_W32(tp, TimeInt3, 0x0000);
@@ -3823,6 +3860,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1EA, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
                 rtl8168_eri_write(tp, 0x1EA, 1, csi_tmp, ERIAR_ExGMAC);
@@ -3861,7 +3900,7 @@
                 csi_tmp |= (BIT_10 | BIT_11);
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
                 break;
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
@@ -3888,7 +3927,7 @@
                 csi_tmp &= ~(BIT_10 | BIT_11);
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
                 break;
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
@@ -3937,7 +3976,7 @@
         int link_status_on;
 
 #ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_check_fiber_link_status(dev);
+        rtl8168_check_fiber_link_status(tp);
 #endif //ENABLE_FIBER_SUPPORT
 
         link_status_on = tp->link_ok(dev);
@@ -3997,7 +4036,9 @@
                                     tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
                                     tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
                                     tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                                    tp->mcfg == CFG_METHOD_33) && netif_running(dev)) {
+                                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                                    tp->mcfg == CFG_METHOD_35) &&
+                                   netif_running(dev)) {
                                 if (RTL_R8(tp, PHYstatus)&FullDup)
                                         RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19);
                                 else
@@ -4007,7 +4048,7 @@
                         if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
                             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                            tp->mcfg == CFG_METHOD_33) {
+                            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
                                 /*half mode*/
                                 if (!(RTL_R8(tp, PHYstatus)&FullDup)) {
                                         rtl8168_mdio_write(tp, 0x1F, 0x0000);
@@ -4016,7 +4057,8 @@
                         }
 
                         if ((tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                             tp->mcfg == CFG_METHOD_33) && (RTL_R8(tp, PHYstatus) & _10bps)) {
+                             tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) &&
+                            (RTL_R8(tp, PHYstatus) & _10bps)) {
                                 u32 csi_tmp;
 
                                 csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
@@ -4073,6 +4115,10 @@
                         case CFG_METHOD_25:
                         case CFG_METHOD_27:
                         case CFG_METHOD_28:
+                        case CFG_METHOD_31:
+                        case CFG_METHOD_32:
+                        case CFG_METHOD_33:
+                        case CFG_METHOD_34:
                                 if (tp->org_pci_offset_99 & BIT_2)
                                         tp->issue_offset_99_event = TRUE;
                                 break;
@@ -4095,6 +4141,10 @@
                 case CFG_METHOD_25:
                 case CFG_METHOD_27:
                 case CFG_METHOD_28:
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
                         if (tp->issue_offset_99_event) {
                                 if (!(RTL_R8(tp, PHYstatus) & PowerSaveStatus)) {
                                         tp->issue_offset_99_event = FALSE;
@@ -4157,7 +4207,8 @@
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
                 if (val != 0x0050) {
                         rtl8168_set_phy_mcu_patch_request(tp);
@@ -4178,7 +4229,8 @@
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
                 if (val != 0x0500) {
                         rtl8168_set_phy_mcu_patch_request(tp);
@@ -4221,6 +4273,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_0 | BIT_1);
                 rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
@@ -4236,6 +4290,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_csi_fun0_write_byte(tp, 0x99, 0x00);
                 break;
         }
@@ -4255,6 +4311,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99);
                 break;
         }
@@ -4273,6 +4331,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_0 | BIT_1);
                 if (tp->org_pci_offset_99 & (BIT_5 | BIT_6))
@@ -4313,6 +4373,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~( BIT_8 | BIT_9  | BIT_10 | BIT_11  | BIT_12  | BIT_13  | BIT_14 | BIT_15 );
                 csi_tmp |= ( BIT_9 | BIT_10 | BIT_13  | BIT_14 | BIT_15 );
@@ -4344,6 +4406,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 if (tp->org_pci_offset_99 & BIT_2)
                         rtl8168_mac_ocp_write(tp, 0xE0A2,  rtl8168_mac_ocp_read(tp, 0xE0A2) | BIT_0);
                 break;
@@ -4370,6 +4434,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_eri_write(tp, 0x2E8, 2, 0x9003, ERIAR_ExGMAC);
                 rtl8168_eri_write(tp, 0x2EA, 2, 0x9003, ERIAR_ExGMAC);
                 rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
@@ -4397,6 +4463,7 @@
         case CFG_METHOD_26:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 if (tp->org_pci_offset_99 & BIT_2)
                         RTL_W8(tp, 0xB6, RTL_R8(tp, 0xB6) | BIT_0);
                 break;
@@ -4421,6 +4488,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_2;
                 rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
@@ -4454,6 +4523,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(0x0000FFF0);
                 csi_tmp |= (0x00000640);
@@ -4466,6 +4536,19 @@
         }
 
         switch (tp->mcfg) {
+        case CFG_METHOD_35:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(0xFFF0);
+                csi_tmp |= 0x0640;
+                rtl8168_eri_write(tp,0x1E8, 2, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(0xFF00);
+                rtl8168_eri_write(tp, 0x1E4, 2, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
         case CFG_METHOD_24:
         case CFG_METHOD_25:
         case CFG_METHOD_26:
@@ -4473,6 +4556,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_2;
                 rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
@@ -4515,27 +4599,14 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
-                rtl8168_issue_offset_99_event(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+                if (tp->org_pci_offset_99 & BIT_2)
+                        rtl8168_issue_offset_99_event(tp);
                 rtl8168_disable_pci_offset_99(tp);
                 break;
         }
+
         switch (tp->mcfg) {
         case CFG_METHOD_24:
         case CFG_METHOD_25:
@@ -4547,6 +4618,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_disable_pci_offset_180(tp);
                 break;
         }
@@ -4583,11 +4656,8 @@
         if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
             tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
             tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28)
                 rtl8168_eri_write(tp, 0x2F8, 2, 0x0064, ERIAR_ExGMAC);
-        }
 
         if (tp->bios_setting & BIT_28) {
                 if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 ||
@@ -4615,12 +4685,22 @@
 
         rtl8168_set_pci_99_180_exit_driver_para(dev);
 
+        switch (tp->mcfg) {
+        case CFG_METHOD_35:
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_3);
+                rtl8168_set_mcu_ocp_bit(tp, 0xDE38, BIT_2);
+                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0));
+                break;
+        }
+
         /*disable ocp phy power saving*/
         if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33)
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35)
                 if (!tp->dash_printer_enabled)
                         rtl8168_disable_ocp_phy_power_saving(dev);
 
@@ -4926,7 +5006,8 @@
                     tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
                     tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
                     tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                    tp->mcfg == CFG_METHOD_33) {
+                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                    tp->mcfg == CFG_METHOD_35) {
                         rtl8168_enable_cfg9346_write(tp);
                         RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En);
                         rtl8168_disable_cfg9346_write(tp);
@@ -4977,6 +5058,8 @@
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
                 case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                case CFG_METHOD_35:
                         RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7);
                         break;
                 }
@@ -4986,7 +5069,7 @@
         case CFG_METHOD_14 ... CFG_METHOD_15:
                 RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
                 break;
-        case CFG_METHOD_16 ... CFG_METHOD_33:
+        case CFG_METHOD_16 ... CFG_METHOD_34:
                 RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
                 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
                 break;
@@ -5020,6 +5103,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6);
                 break;
         }
@@ -5119,12 +5204,13 @@
 
         if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 //Disable Giga Lite
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
                 rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_9);
                 if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                    tp->mcfg == CFG_METHOD_33)
+                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34)
                         rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A40);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
@@ -5161,7 +5247,7 @@
                         giga_ctrl |= ADVERTISE_1000FULL;
 
                 //flow control
-                if (dev->mtu <= ETH_DATA_LEN)
+                if (dev->mtu <= ETH_DATA_LEN && tp->fcpause == rtl8168_fc_full)
                         auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM;
 
                 tp->phy_auto_nego_reg = auto_nego;
@@ -5697,6 +5783,45 @@
         spin_unlock_irqrestore(&tp->lock, flags);
 }
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+static void rtl8168_get_pauseparam(struct net_device *dev,
+                                   struct ethtool_pauseparam *pause)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        pause->autoneg = (tp->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
+        if (tp->fcpause == rtl8168_fc_rx_pause)
+                pause->rx_pause = 1;
+        else if (tp->fcpause == rtl8168_fc_tx_pause)
+                pause->tx_pause = 1;
+        else if (tp->fcpause == rtl8168_fc_full) {
+                pause->rx_pause = 1;
+                pause->tx_pause = 1;
+        }
+}
+
+static int rtl8168_set_pauseparam(struct net_device *dev,
+                                  struct ethtool_pauseparam *pause)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        enum rtl8168_fc_mode newfc;
+
+        if (pause->tx_pause || pause->rx_pause)
+                newfc = rtl8168_fc_full;
+        else
+                newfc = rtl8168_fc_none;
+
+        if (tp->fcpause != newfc) {
+                tp->fcpause = newfc;
+
+                rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+        }
+
+        return 0;
+
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+
 static u32
 rtl8168_get_msglevel(struct net_device *dev)
 {
@@ -5748,7 +5873,93 @@
                 return -EOPNOTSUPP;
         }
 }
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+
+static void
+rtl8168_wait_for_quiescence(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        synchronize_irq(dev->irq);
+
+        /* Wait for any pending NAPI task to complete */
+#ifdef CONFIG_R8168_NAPI
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        RTL_NAPI_DISABLE(dev, &tp->napi);
 #endif
+#endif //CONFIG_R8168_NAPI
+
+        rtl8168_irq_mask_and_ack(tp);
+
+#ifdef CONFIG_R8168_NAPI
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        RTL_NAPI_ENABLE(dev, &tp->napi);
+#endif
+#endif //CONFIG_R8168_NAPI
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+static void rtl8168_get_ringparam(struct net_device *dev,
+                                  struct ethtool_ringparam *ring,
+                                  struct kernel_ethtool_ringparam *kernel_ring,
+                                  struct netlink_ext_ack *extack)
+#else
+static void rtl8168_get_ringparam(struct net_device *dev,
+                                  struct ethtool_ringparam *ring)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        ring->rx_max_pending = MAX_NUM_TX_DESC;
+        ring->tx_max_pending = MAX_NUM_RX_DESC;;
+        ring->rx_pending = tp->num_rx_desc;
+        ring->tx_pending = tp->num_tx_desc;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+static int rtl8168_set_ringparam(struct net_device *dev,
+                                 struct ethtool_ringparam *ring,
+                                 struct kernel_ethtool_ringparam *kernel_ring,
+                                 struct netlink_ext_ack *extack)
+#else
+static int rtl8168_set_ringparam(struct net_device *dev,
+                                 struct ethtool_ringparam *ring)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 new_rx_count, new_tx_count;
+        int rc = 0;
+
+        if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
+                return -EINVAL;
+
+        new_tx_count = clamp_t(u32, ring->tx_pending,
+                               MIN_NUM_TX_DESC, MAX_NUM_TX_DESC);
+
+        new_rx_count = clamp_t(u32, ring->rx_pending,
+                               MIN_NUM_RX_DESC, MAX_NUM_RX_DESC);
+
+        if ((new_rx_count == tp->num_rx_desc) &&
+            (new_tx_count == tp->num_tx_desc)) {
+                /* nothing to do */
+                return 0;
+        }
+
+        if (netif_running(dev)) {
+                rtl8168_wait_for_quiescence(dev);
+                rtl8168_close(dev);
+        }
+
+        tp->num_rx_desc = new_rx_count;
+        tp->num_tx_desc = new_tx_count;
+
+        if (netif_running(dev))
+                rc = rtl8168_open(dev);
+
+        return rc;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
 static void
@@ -5808,11 +6019,11 @@
 {
         switch (stringset) {
         case ETH_SS_STATS:
-                memcpy(data, *rtl8168_gstrings, sizeof(rtl8168_gstrings));
+                memcpy(data, rtl8168_gstrings, sizeof(rtl8168_gstrings));
                 break;
         }
 }
-#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
 
 static int rtl_get_eeprom_len(struct net_device *dev)
 {
@@ -6030,6 +6241,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp |= BIT_1 | BIT_0;
                 rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
@@ -6053,6 +6266,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
                 rtl8168_set_eth_phy_bit(tp, 0x11, BIT_9);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
@@ -6069,6 +6284,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_oob_mutex_lock(tp);
                 break;
         }
@@ -6082,6 +6298,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_set_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6141,6 +6359,7 @@
                 break;
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
                 data &= ~(BIT_0);
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
@@ -6158,11 +6377,12 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
-                /*
+        case CFG_METHOD_34:
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data |= BIT_0;
+                data &= ~(BIT_0);
+                if (tp->HwPkgDet == 0x0F)
+                        data |= BIT_0;
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
-                */
 
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 data = rtl8168_mdio_read(tp, 0x10) | BIT_15;
@@ -6185,6 +6405,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_clear_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6196,6 +6418,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_oob_mutex_unlock(tp);
                 break;
         }
@@ -6301,6 +6524,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_1 | BIT_0);
                 rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
@@ -6321,6 +6546,7 @@
         switch (tp->mcfg) {
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
                 rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
@@ -6337,6 +6563,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_oob_mutex_lock(tp);
                 break;
         }
@@ -6350,6 +6577,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_set_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6386,6 +6615,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
                 data &= ~(BIT_0);
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
@@ -6410,6 +6641,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_clear_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6421,6 +6654,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_oob_mutex_unlock(tp);
                 break;
         }
@@ -6468,7 +6702,7 @@
         u16 val;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 break;
         default:
                 return -EOPNOTSUPP;
@@ -6515,7 +6749,7 @@
         unsigned long flags;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 break;
         default:
                 return -EOPNOTSUPP;
@@ -6553,14 +6787,22 @@
 static const struct ethtool_ops rtl8168_ethtool_ops = {
         .get_drvinfo        = rtl8168_get_drvinfo,
         .get_regs_len       = rtl8168_get_regs_len,
-        .get_link       = ethtool_op_get_link,
+        .get_link           = ethtool_op_get_link,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        .get_ringparam      = rtl8168_get_ringparam,
+        .set_ringparam      = rtl8168_set_ringparam,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
         .get_settings       = rtl8168_get_settings,
         .set_settings       = rtl8168_set_settings,
 #else
         .get_link_ksettings       = rtl8168_get_settings,
         .set_link_ksettings       = rtl8168_set_settings,
-#endif
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        .get_pauseparam     = rtl8168_get_pauseparam,
+        .set_pauseparam     = rtl8168_set_pauseparam,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
         .get_msglevel       = rtl8168_get_msglevel,
         .set_msglevel       = rtl8168_set_msglevel,
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
@@ -6573,8 +6815,8 @@
 #ifdef NETIF_F_TSO
         .get_tso        = ethtool_op_get_tso,
         .set_tso        = ethtool_op_set_tso,
-#endif
-#endif
+#endif //NETIF_F_TSO
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
         .get_regs       = rtl8168_get_regs,
         .get_wol        = rtl8168_get_wol,
         .set_wol        = rtl8168_set_wol,
@@ -6583,7 +6825,7 @@
         .get_stats_count    = rtl8168_get_stats_count,
 #else
         .get_sset_count     = rtl8168_get_sset_count,
-#endif
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
         .get_ethtool_stats  = rtl8168_get_ethtool_stats,
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
 #ifdef ETHTOOL_GPERMADDR
@@ -6663,6 +6905,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x8045);
                 rtl8168_mdio_write(tp, 0x14, 0x0000);
@@ -6741,6 +6985,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x8045);
                 rtl8168_mdio_write(tp, 0x14, 0x2444);
@@ -6936,6 +7182,10 @@
                         tp->HwIcVerUnknown = TRUE;
                 }
 
+                if (tp->mcfg == CFG_METHOD_30 &&
+                    (rtl8168_mac_ocp_read(tp, 0xD006) & 0xFF00) == 0x0100)
+                        tp->mcfg = CFG_METHOD_35;
+
                 tp->efuse_ver = EFUSE_SUPPORT_V3;
                 break;
         case 0x54800000:
@@ -6945,8 +7195,10 @@
                         tp->mcfg = CFG_METHOD_32;
                 } else if (ICVerID == 0x00300000) {
                         tp->mcfg = CFG_METHOD_33;
+                } else if (ICVerID == 0x00400000) {
+                        tp->mcfg = CFG_METHOD_34;
                 } else {
-                        tp->mcfg = CFG_METHOD_33;
+                        tp->mcfg = CFG_METHOD_34;
                         tp->HwIcVerUnknown = TRUE;
                 }
 
@@ -7184,73 +7436,191 @@
 
 static
 bool
-rtl8168_test_phy_ocp(struct rtl8168_private *tp)
+rtl8168_test_phy_ocp_v2(struct rtl8168_private *tp)
 {
         bool RestorePhyOcpReg = FALSE;
 
-        if (tp->TestPhyOcpReg == FALSE) goto exit;
+        u16 PhyRegValue;
+        u8 ResetPhyType = 0;
 
-        if (tp->HwSuppEsdVer == 2) {
-                u16 PhyRegValue;
-                u8 ResetPhyType = 0;
+        if (HW_PHY_STATUS_INI == rtl8168_get_phy_state(tp)) {
+                ResetPhyType = 1;
+        } else {
+                rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                if ((PhyRegValue & 0x03) != 0x00) {
+                        ResetPhyType = 2;
+                }
+        }
 
-                if (HW_PHY_STATUS_INI == rtl8168_get_phy_state(tp)) {
-                        ResetPhyType = 1;
-                } else {
+        if (ResetPhyType == 0) goto exit;
+
+        netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
+                  ResetPhyType);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        mdelay(24); //24ms
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+        if ((PhyRegValue & 0x03) != 0x00) {
+                u32 WaitCnt = 0;
+                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        mdelay(100);
                         rtl8168_mdio_write(tp, 0x1F, 0x0C40);
                         PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        if ((PhyRegValue & 0x03) != 0x00) {
-                                ResetPhyType = 2;
-                        }
+                        WaitCnt++;
                 }
+        }
 
-                if (ResetPhyType > 0) {
-                        u32 WaitCnt;
-                        struct net_device *dev = tp->dev;
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        printk(KERN_ERR "%s: test_phy_ocp ResetPhyType = 0x%02x\n.\n", dev->name, ResetPhyType);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
+        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
+        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
-                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        mdelay(24); //24ms
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
+
+        tp->HwHasWrRamCodeToMicroP = FALSE;
+
+        RestorePhyOcpReg = TRUE;
+
+exit:
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        return RestorePhyOcpReg;
+}
+
+static
+bool
+rtl8168_test_phy_ocp_v3(struct rtl8168_private *tp)
+{
+        bool RestorePhyOcpReg = FALSE;
+
+        u16 PhyRegValue;
+        u8 ResetPhyType = 0;
+        u8 watch_dog = 0;
+        u8 uc_response;
+        u8 nctl_pc_range_fail;
+        u8 nctl_pc_stuck_fail;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0B82);
+        uc_response = !!(rtl8168_mdio_read(tp, 0x10) & BIT_5);
+        rtl8168_mdio_write(tp, 0x1F, 0x0B84);
+        nctl_pc_range_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_1);
+        nctl_pc_stuck_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_2);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        if (uc_response || nctl_pc_range_fail || nctl_pc_stuck_fail) {
+                ResetPhyType = 3;
+        } else {
+                rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                if ((PhyRegValue & 0x03) != 0x00) {
+                        watch_dog = (u8)(PhyRegValue & 0x03);
+                        ResetPhyType = 2;
+                }
+        }
+
+        if (ResetPhyType == 0) goto exit;
+
+        netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
+                  ResetPhyType);
 
+        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        mdelay(24000); //24ms
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+        if ((PhyRegValue & 0x03) != 0x00) {
+                u32 WaitCnt = 0;
+                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        mdelay(100000);
                         rtl8168_mdio_write(tp, 0x1F, 0x0C40);
                         PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                        if ((PhyRegValue & 0x03) != 0x00) {
-                                WaitCnt = 0;
-                                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
-                                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
-                                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
-                                        mdelay(100);
-                                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                                        WaitCnt++;
-                                }
-                        }
+                        WaitCnt++;
+                }
+        }
 
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-                        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
-                        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
-                        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        //issue9
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
+        rtl8168_mdio_write(tp, 0x11, tp->BackupPhyFuseDout_31_16);
+        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
+        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
 
-                        tp->HwHasWrRamCodeToMicroP = FALSE;
+        //record fail case
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x801C);
+        PhyRegValue = 0;
+        PhyRegValue = watch_dog & 0x03;
+        PhyRegValue <<= 14;
+        if (uc_response) PhyRegValue |= BIT_13;
+        if (nctl_pc_range_fail) PhyRegValue |= BIT_12;
+        if (nctl_pc_stuck_fail) PhyRegValue |= BIT_11;
+        ClearAndSetEthPhyBit(tp,
+                             0x14,
+                             0xF800,
+                             PhyRegValue);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        RestorePhyOcpReg = TRUE;
-                }
+        tp->HwHasWrRamCodeToMicroP = FALSE;
 
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        RestorePhyOcpReg = TRUE;
+
+exit:
+        //set uc_response to 1 and gphy should auto clear it.
+        rtl8168_mdio_write(tp, 0x1F, 0x0B82);
+        rtl8168_set_eth_phy_bit(tp, 0x10, BIT_5);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        return RestorePhyOcpReg;
+}
+
+static
+bool
+rtl8168_test_phy_ocp(struct rtl8168_private *tp)
+{
+        bool RestorePhyOcpReg = FALSE;
+
+        if (tp->TestPhyOcpReg == FALSE) goto exit;
+
+        switch (tp->HwSuppEsdVer) {
+        case 2:
+                RestorePhyOcpReg = rtl8168_test_phy_ocp_v2(tp);
+                break;
+        case 3:
+                RestorePhyOcpReg = rtl8168_test_phy_ocp_v3(tp);
+                break;
+        default:
+                break;
         }
 
 exit:
@@ -7387,11 +7757,13 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_eri_write(tp, 0x174, 2, 0x00FF, ERIAR_ExGMAC);
                 rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
                 break;
         case CFG_METHOD_29:
-        case CFG_METHOD_30: {
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:	{
                 u32 csi_tmp;
                 csi_tmp = rtl8168_eri_read(tp, 0x174, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_8);
@@ -7427,6 +7799,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_disable_now_is_oob(tp);
 
                 data16 = rtl8168_mac_ocp_read(tp, 0xE8DE) & ~BIT_14;
@@ -7449,7 +7823,7 @@
 
 #ifdef ENABLE_FIBER_SUPPORT
         if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_hw_init_fiber_nic(dev);
+                rtl8168_hw_init_fiber_nic(tp);
 #endif //ENABLE_FIBER_SUPPORT
 }
 
@@ -7470,6 +7844,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
                 break;
         }
@@ -7488,6 +7864,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
                 rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0000);
                 rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
@@ -8469,13 +8847,23 @@
         rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0763);
 }
 
+static bool
+rtl8168_check_dash_other_fun_present(struct rtl8168_private *tp)
+{
+        //check if func 2 exist
+        if (rtl8168_csi_other_fun_read(tp, 2, 0x00) != 0xffffffff)
+                return true;
+
+        return false;
+}
+
 static void
 rtl8168_set_mac_mcu_8168ep_2(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
         u16 i;
         static const u16 mcu_patch_code_8168ep_2 = {
-                0xE008, 0xE017, 0xE052, 0xE056, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xC50F,
+                0xE008, 0xE017, 0xE052, 0xE057, 0xE059, 0xE05B, 0xE05D, 0xE05F, 0xC50F,
                 0x76A4, 0x49E3, 0xF007, 0x49C0, 0xF103, 0xC607, 0xBE00, 0xC606, 0xBE00,
                 0xC602, 0xBE00, 0x0BDA, 0x0BB6, 0x0BBA, 0xDC00, 0xB400, 0xB401, 0xB402,
                 0xB403, 0xB404, 0xC02E, 0x7206, 0x49AE, 0xF1FE, 0xC12B, 0x9904, 0xC12A,
@@ -8484,9 +8872,9 @@
                 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x990A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE,
                 0xF1FE, 0xFF80, 0xB004, 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002,
                 0xB800, 0x1FC8, 0xE000, 0xE8E0, 0xF128, 0x0002, 0xFFFF, 0xF000, 0x8001,
-                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x0490, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x0490,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
         };
 
         rtl8168_hw_disable_mac_mcu_bps(dev);
@@ -8498,17 +8886,24 @@
         rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
 
         rtl8168_mac_ocp_write(tp, 0xFC28, 0x0BB3);
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x1FC7);
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0485);
+        if (false == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x1FC7);
+        //rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0485);
 }
 
 static void
 rtl8168_set_mac_mcu_8168h_1(struct net_device *dev)
 {
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_2(struct net_device *dev)
+{
         struct rtl8168_private *tp = netdev_priv(dev);
         u16 i;
         static const u16 mcu_patch_code_8168h_1 = {
-                0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE079, 0xC707,
+                0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE07A, 0xC707,
                 0x1D00, 0x8DE2, 0x48C1, 0xC502, 0xBD00, 0x00E4, 0xE0C0, 0xC502, 0xBD00,
                 0x0216, 0xC634, 0x75C0, 0x49D3, 0xF027, 0xC631, 0x75C0, 0x49D3, 0xF123,
                 0xC627, 0x75C0, 0xB405, 0xC525, 0x9DC0, 0xC621, 0x75C8, 0x49D5, 0xF00A,
@@ -8521,8 +8916,8 @@
                 0xC71C, 0xC419, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE,
                 0xC412, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE, 0xC70C,
                 0x74F8, 0x48C3, 0x8CF8, 0xB004, 0xB007, 0xC502, 0xBD00, 0x0F24, 0x0481,
-                0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0xC502,
-                0xBD00, 0x0578, 0xC602, 0xBE00, 0x0000
+                0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0x9C46,
+                0xC402, 0xBC00, 0x0578, 0xC602, 0xBE00, 0x0000
         };
 
         rtl8168_hw_disable_mac_mcu_bps(dev);
@@ -8539,9 +8934,15 @@
         rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0B26);
         rtl8168_mac_ocp_write(tp, 0xFC30, 0x0F02);
         rtl8168_mac_ocp_write(tp, 0xFC32, 0x0CA0);
-        rtl8168_mac_ocp_write(tp, 0xFC34, 0x056C);
+        //rtl8168_mac_ocp_write(tp, 0xFC34, 0x056C);
+
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x003F);
+}
 
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x007F);
+static void
+rtl8168_set_mac_mcu_8168h_3(struct net_device *dev)
+{
+        rtl8168_hw_disable_mac_mcu_bps(dev);
 }
 
 static void
@@ -8679,13 +9080,41 @@
 }
 
 static void
-rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
+rtl8168_set_mac_mcu_8168fp_8116as_2(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
         u16 i;
-        static const u16 mcu_patch_code_8168fp_2 = {
-                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE063, 0xE065, 0xE067, 0xC602,
+        static const u16 mcu_patch_code_8168fp_8116as_2 = {
+                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE016, 0xE018, 0xE01A, 0xE01C, 0xC602,
                 0xBE00, 0x2AB2, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
+                0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xC602, 0xBE00, 0x0000, 0xC602,
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+                0xBE00, 0x0000
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_8116as_2); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_8116as_2i);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC);
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
+
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0007);
+}
+
+static void
+_rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168fp_2 = {
+                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE064, 0xE066, 0xE068, 0xC602,
+                0xBE00, 0x0000, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
                 0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xB400, 0xB401, 0xB402, 0xB403,
                 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE, 0xC137, 0x9904, 0xC136,
                 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF10B, 0xC52F, 0xC12E,
@@ -8695,8 +9124,8 @@
                 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004, 0xB003, 0xB002, 0xB001,
                 0xB000, 0xC604, 0xC002, 0xB800, 0x2A5E, 0xE000, 0xE8E0, 0xF128, 0x3DC2,
                 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000, 0x8002, 0x8004, 0x8007,
-                0x48C1, 0x48C2, 0xC502, 0xBD00, 0x07BC, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+                0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC, 0xC602, 0xBE00, 0x0000,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
         };
 
         rtl8168_hw_disable_mac_mcu_bps(dev);
@@ -8711,13 +9140,21 @@
         rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
         rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
         rtl8168_mac_ocp_write(tp, 0xFC2E, 0x2A5C);
-        rtl8168_mac_ocp_write(tp, 0xFC30, 0x07B0);
+        //rtl8168_mac_ocp_write(tp, 0xFC30, 0x07B0);
 
-        if (tp->HwSuppSerDesPhyVer == 1)
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x001F);
+        if (true == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0006);
         else
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x001E);
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x000E);
+}
 
+static void
+rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->HwSuppSerDesPhyVer == 1) rtl8168_set_mac_mcu_8168fp_8116as_2(dev);
+        else _rtl8168_set_mac_mcu_8168fp_2(dev);
 }
 
 static void
@@ -8726,7 +9163,7 @@
         struct rtl8168_private *tp = netdev_priv(dev);
         u16 i;
         static const u16 mcu_patch_code_8168fp_3 = {
-                0xE008, 0xE053, 0xE057, 0xE059, 0xE05B, 0xE05D, 0xE05F, 0xE061, 0xB400,
+                0xE008, 0xE053, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xB400,
                 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE,
                 0xC137, 0x9904, 0xC136, 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0,
                 0xF10B, 0xC52F, 0xC12E, 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330,
@@ -8735,9 +9172,9 @@
                 0x9D0A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004,
                 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002, 0xB800, 0x2B16, 0xE000,
                 0xE8E0, 0xF128, 0x3DC2, 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000,
-                0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x07BC, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+                0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
         };
 
         rtl8168_hw_disable_mac_mcu_bps(dev);
@@ -8749,9 +9186,12 @@
         rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
 
         rtl8168_mac_ocp_write(tp, 0xFC28, 0x2B14);
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x07B0);
+        //rtl8168_mac_ocp_write(tp, 0xFC2A, 0x07B0);
 
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0003);
+        if (true == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
+        else
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0001);
 }
 
 static void
@@ -8781,9 +9221,11 @@
                 rtl8168_set_mac_mcu_8168ep_2(dev);
                 break;
         case CFG_METHOD_29:
-        case CFG_METHOD_30:
                 rtl8168_set_mac_mcu_8168h_1(dev);
                 break;
+        case CFG_METHOD_30:
+                rtl8168_set_mac_mcu_8168h_2(dev);
+                break;
         case CFG_METHOD_31:
                 rtl8168_set_mac_mcu_8168fp_1(dev);
                 break;
@@ -8791,8 +9233,12 @@
                 rtl8168_set_mac_mcu_8168fp_2(dev);
                 break;
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_set_mac_mcu_8168fp_3(dev);
                 break;
+        case CFG_METHOD_35:
+                rtl8168_set_mac_mcu_8168h_3(dev);
+                break;
         }
 }
 #endif
@@ -8852,6 +9298,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_3 | BIT_2 | BIT_1));
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) | (BIT_0));
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_0));
@@ -8893,6 +9341,7 @@
         case CFG_METHOD_22:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 if (aspm) {
                         if ((rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3) || (RTL_R8(tp, Config0) & 0x07)) {
                                 RTL_W8(tp, 0x6E, RTL_R8(tp, 0x6E) | BIT_6);
@@ -8915,7 +9364,8 @@
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33)
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35)
                 if (!tp->dash_printer_enabled)
                         rtl8168_disable_ocp_phy_power_saving(dev);
 
@@ -9283,6 +9733,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 ClearAndSetPCIePhyBit(tp,
                                       0x19,
                                       BIT_6,
@@ -9299,6 +9750,12 @@
                 ClearPCIePhyBit(tp, 0x0B, BIT_0);
 
                 break;
+        case CFG_METHOD_35:
+                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
+
+                rtl8168_set_mcu_ocp_bit(tp, 0xDE38, (BIT_2));
+
+                break;
         }
 }
 
@@ -9310,7 +9767,7 @@
         int retval = TRUE;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 rtl8168_mdio_write(tp,0x1f, 0x0B82);
                 rtl8168_set_eth_phy_bit(tp, 0x10, BIT_4);
 
@@ -9339,7 +9796,7 @@
         int retval = TRUE;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 rtl8168_mdio_write(tp, 0x1f, 0x0B82);
                 rtl8168_clear_eth_phy_bit(tp, 0x10, BIT_4);
 
@@ -9396,6 +9853,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x801E);
                 hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14);
@@ -9502,6 +9961,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x801E);
                 rtl8168_mdio_write(tp, 0x14, tp->sw_ram_code_ver);
@@ -20756,6 +21217,536 @@
 }
 
 static void
+rtl8168_set_phy_mcu_8168h_3(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8042);
+        rtl8168_mdio_write(tp, 0x14, 0x3800);
+        rtl8168_mdio_write(tp, 0x13, 0xB82E);
+        rtl8168_mdio_write(tp, 0x14, 0x0001);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0090);
+        rtl8168_mdio_write(tp, 0x13, 0xA016);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA012);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA014);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8002);
+        rtl8168_mdio_write(tp, 0x14, 0x2b5d);
+        rtl8168_mdio_write(tp, 0x14, 0x0c68);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x0b3c);
+        rtl8168_mdio_write(tp, 0x13, 0xA000);
+        rtl8168_mdio_write(tp, 0x14, 0x0b3a);
+        rtl8168_mdio_write(tp, 0x13, 0xA008);
+        rtl8168_mdio_write(tp, 0x14, 0x0100);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0010);
+
+
+        rtl8168_mdio_write(tp, 0x13, 0x83f3);
+        rtl8168_mdio_write(tp, 0x14, 0xaf84);
+        rtl8168_mdio_write(tp, 0x14, 0x0baf);
+        rtl8168_mdio_write(tp, 0x14, 0x8466);
+        rtl8168_mdio_write(tp, 0x14, 0xaf84);
+        rtl8168_mdio_write(tp, 0x14, 0xcdaf);
+        rtl8168_mdio_write(tp, 0x14, 0x8736);
+        rtl8168_mdio_write(tp, 0x14, 0xaf87);
+        rtl8168_mdio_write(tp, 0x14, 0x39af);
+        rtl8168_mdio_write(tp, 0x14, 0x8739);
+        rtl8168_mdio_write(tp, 0x14, 0xaf87);
+        rtl8168_mdio_write(tp, 0x14, 0x39af);
+        rtl8168_mdio_write(tp, 0x14, 0x8739);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfb89);
+        rtl8168_mdio_write(tp, 0x14, 0xe987);
+        rtl8168_mdio_write(tp, 0x14, 0xffd7);
+        rtl8168_mdio_write(tp, 0x14, 0x0017);
+        rtl8168_mdio_write(tp, 0x14, 0xd400);
+        rtl8168_mdio_write(tp, 0x14, 0x051c);
+        rtl8168_mdio_write(tp, 0x14, 0x421a);
+        rtl8168_mdio_write(tp, 0x14, 0x741b);
+        rtl8168_mdio_write(tp, 0x14, 0x97e9);
+        rtl8168_mdio_write(tp, 0x14, 0x87fe);
+        rtl8168_mdio_write(tp, 0x14, 0xffef);
+        rtl8168_mdio_write(tp, 0x14, 0x97e0);
+        rtl8168_mdio_write(tp, 0x14, 0x82aa);
+        rtl8168_mdio_write(tp, 0x14, 0xa000);
+        rtl8168_mdio_write(tp, 0x14, 0x08ef);
+        rtl8168_mdio_write(tp, 0x14, 0x46dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x37a0);
+        rtl8168_mdio_write(tp, 0x14, 0x012d);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0xa7ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2013);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xffe1);
+        rtl8168_mdio_write(tp, 0x14, 0x87fe);
+        rtl8168_mdio_write(tp, 0x14, 0xac27);
+        rtl8168_mdio_write(tp, 0x14, 0x05a1);
+        rtl8168_mdio_write(tp, 0x14, 0x0807);
+        rtl8168_mdio_write(tp, 0x14, 0xae0f);
+        rtl8168_mdio_write(tp, 0x14, 0xa107);
+        rtl8168_mdio_write(tp, 0x14, 0x02ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0aef);
+        rtl8168_mdio_write(tp, 0x14, 0x4619);
+        rtl8168_mdio_write(tp, 0x14, 0x19dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x37d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x19dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x3719);
+        rtl8168_mdio_write(tp, 0x14, 0x19ae);
+        rtl8168_mdio_write(tp, 0x14, 0xcfbf);
+        rtl8168_mdio_write(tp, 0x14, 0x8763);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc3c);
+        rtl8168_mdio_write(tp, 0x14, 0x0005);
+        rtl8168_mdio_write(tp, 0x14, 0xaaf5);
+        rtl8168_mdio_write(tp, 0x14, 0x0249);
+        rtl8168_mdio_write(tp, 0x14, 0xcaef);
+        rtl8168_mdio_write(tp, 0x14, 0x67d7);
+        rtl8168_mdio_write(tp, 0x14, 0x0014);
+        rtl8168_mdio_write(tp, 0x14, 0x0249);
+        rtl8168_mdio_write(tp, 0x14, 0xe5ad);
+        rtl8168_mdio_write(tp, 0x14, 0x50f7);
+        rtl8168_mdio_write(tp, 0x14, 0xd400);
+        rtl8168_mdio_write(tp, 0x14, 0x01bf);
+        rtl8168_mdio_write(tp, 0x14, 0x46a7);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0x98bf);
+        rtl8168_mdio_write(tp, 0x14, 0x465c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fd4);
+        rtl8168_mdio_write(tp, 0x14, 0x0003);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x7502);
+        rtl8168_mdio_write(tp, 0x14, 0x4498);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x7202);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6602);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6902);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0xf7bf);
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcad);
+        rtl8168_mdio_write(tp, 0x14, 0x28f7);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xbf46);
+        rtl8168_mdio_write(tp, 0x14, 0x5c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x21af);
+        rtl8168_mdio_write(tp, 0x14, 0x020e);
+        rtl8168_mdio_write(tp, 0x14, 0xee82);
+        rtl8168_mdio_write(tp, 0x14, 0x5000);
+        rtl8168_mdio_write(tp, 0x14, 0x0284);
+        rtl8168_mdio_write(tp, 0x14, 0xdd02);
+        rtl8168_mdio_write(tp, 0x14, 0x8521);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0x36af);
+        rtl8168_mdio_write(tp, 0x14, 0x03d2);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef59);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x3002);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0x3c00);
+        rtl8168_mdio_write(tp, 0x14, 0x03aa);
+        rtl8168_mdio_write(tp, 0x14, 0x2cbf);
+        rtl8168_mdio_write(tp, 0x14, 0x8769);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcad);
+        rtl8168_mdio_write(tp, 0x14, 0x2823);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6f02);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0x1a02);
+        rtl8168_mdio_write(tp, 0x14, 0x49ca);
+        rtl8168_mdio_write(tp, 0x14, 0xef67);
+        rtl8168_mdio_write(tp, 0x14, 0xd700);
+        rtl8168_mdio_write(tp, 0x14, 0x0202);
+        rtl8168_mdio_write(tp, 0x14, 0x49e5);
+        rtl8168_mdio_write(tp, 0x14, 0xad50);
+        rtl8168_mdio_write(tp, 0x14, 0xf7bf);
+        rtl8168_mdio_write(tp, 0x14, 0x876c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fbf);
+        rtl8168_mdio_write(tp, 0x14, 0x876c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x56ef);
+        rtl8168_mdio_write(tp, 0x14, 0x95ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x15ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2406);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6002);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xf9e1);
+        rtl8168_mdio_write(tp, 0x14, 0x87fa);
+        rtl8168_mdio_write(tp, 0x14, 0x1b10);
+        rtl8168_mdio_write(tp, 0x14, 0x9f1e);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xf900);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x15ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2606);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xf700);
+        rtl8168_mdio_write(tp, 0x14, 0xae12);
+        rtl8168_mdio_write(tp, 0x14, 0x0286);
+        rtl8168_mdio_write(tp, 0x14, 0x9702);
+        rtl8168_mdio_write(tp, 0x14, 0x8565);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0x9d02);
+        rtl8168_mdio_write(tp, 0x14, 0x865a);
+        rtl8168_mdio_write(tp, 0x14, 0xae04);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69fa);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x3002);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xa103);
+        rtl8168_mdio_write(tp, 0x14, 0x22e0);
+        rtl8168_mdio_write(tp, 0x14, 0x87eb);
+        rtl8168_mdio_write(tp, 0x14, 0xe187);
+        rtl8168_mdio_write(tp, 0x14, 0xecef);
+        rtl8168_mdio_write(tp, 0x14, 0x64bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8748);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46aa);
+        rtl8168_mdio_write(tp, 0x14, 0x0abf);
+        rtl8168_mdio_write(tp, 0x14, 0x874b);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46ab);
+        rtl8168_mdio_write(tp, 0x14, 0x06bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8745);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5ffe);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xef59);
+        rtl8168_mdio_write(tp, 0x14, 0xf9bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4530);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdca1);
+        rtl8168_mdio_write(tp, 0x14, 0x0310);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2605);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0xc9ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0d02);
+        rtl8168_mdio_write(tp, 0x14, 0x860d);
+        rtl8168_mdio_write(tp, 0x14, 0xae08);
+        rtl8168_mdio_write(tp, 0x14, 0xe287);
+        rtl8168_mdio_write(tp, 0x14, 0xf7f6);
+        rtl8168_mdio_write(tp, 0x14, 0x36e6);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xfdef);
+        rtl8168_mdio_write(tp, 0x14, 0x95fd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfbbf);
+        rtl8168_mdio_write(tp, 0x14, 0x8748);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x64e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xea1b);
+        rtl8168_mdio_write(tp, 0x14, 0x659e);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe587);
+        rtl8168_mdio_write(tp, 0x14, 0xeae2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf636);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ae);
+        rtl8168_mdio_write(tp, 0x14, 0x13e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf736);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf702);
+        rtl8168_mdio_write(tp, 0x14, 0x49ca);
+        rtl8168_mdio_write(tp, 0x14, 0xef57);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xe7e7);
+        rtl8168_mdio_write(tp, 0x14, 0x87e8);
+        rtl8168_mdio_write(tp, 0x14, 0xffef);
+        rtl8168_mdio_write(tp, 0x14, 0x97ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfbe2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e7);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xe8ef);
+        rtl8168_mdio_write(tp, 0x14, 0x65e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87fb);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xfcef);
+        rtl8168_mdio_write(tp, 0x14, 0x7502);
+        rtl8168_mdio_write(tp, 0x14, 0x49e5);
+        rtl8168_mdio_write(tp, 0x14, 0xac50);
+        rtl8168_mdio_write(tp, 0x14, 0x1abf);
+        rtl8168_mdio_write(tp, 0x14, 0x8748);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x64e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xea1b);
+        rtl8168_mdio_write(tp, 0x14, 0x659e);
+        rtl8168_mdio_write(tp, 0x14, 0x16e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe587);
+        rtl8168_mdio_write(tp, 0x14, 0xeaae);
+        rtl8168_mdio_write(tp, 0x14, 0x06bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8745);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fe2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf636);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ff);
+        rtl8168_mdio_write(tp, 0x14, 0xef97);
+        rtl8168_mdio_write(tp, 0x14, 0xfffe);
+        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x3f02);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0x29bf);
+        rtl8168_mdio_write(tp, 0x14, 0x873c);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x54bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8739);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcac);
+        rtl8168_mdio_write(tp, 0x14, 0x290d);
+        rtl8168_mdio_write(tp, 0x14, 0xac28);
+        rtl8168_mdio_write(tp, 0x14, 0x05a3);
+        rtl8168_mdio_write(tp, 0x14, 0x020c);
+        rtl8168_mdio_write(tp, 0x14, 0xae10);
+        rtl8168_mdio_write(tp, 0x14, 0xa303);
+        rtl8168_mdio_write(tp, 0x14, 0x07ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0ba3);
+        rtl8168_mdio_write(tp, 0x14, 0x0402);
+        rtl8168_mdio_write(tp, 0x14, 0xae06);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x4502);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xfae0);
+        rtl8168_mdio_write(tp, 0x14, 0x8015);
+        rtl8168_mdio_write(tp, 0x14, 0xad25);
+        rtl8168_mdio_write(tp, 0x14, 0x41d2);
+        rtl8168_mdio_write(tp, 0x14, 0x0002);
+        rtl8168_mdio_write(tp, 0x14, 0x86ed);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xebe1);
+        rtl8168_mdio_write(tp, 0x14, 0x87ec);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xab26);
+        rtl8168_mdio_write(tp, 0x14, 0xd40b);
+        rtl8168_mdio_write(tp, 0x14, 0xff1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46aa);
+        rtl8168_mdio_write(tp, 0x14, 0x1fac);
+        rtl8168_mdio_write(tp, 0x14, 0x3204);
+        rtl8168_mdio_write(tp, 0x14, 0xef32);
+        rtl8168_mdio_write(tp, 0x14, 0xae02);
+        rtl8168_mdio_write(tp, 0x14, 0xd304);
+        rtl8168_mdio_write(tp, 0x14, 0x0c31);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0xeb1a);
+        rtl8168_mdio_write(tp, 0x14, 0x93d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xab0e);
+        rtl8168_mdio_write(tp, 0x14, 0x19d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xaa06);
+        rtl8168_mdio_write(tp, 0x14, 0x12a2);
+        rtl8168_mdio_write(tp, 0x14, 0x08c9);
+        rtl8168_mdio_write(tp, 0x14, 0xae06);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x4202);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xfeef);
+        rtl8168_mdio_write(tp, 0x14, 0x96ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xa200);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8748);
+        rtl8168_mdio_write(tp, 0x14, 0xae33);
+        rtl8168_mdio_write(tp, 0x14, 0xa201);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x874b);
+        rtl8168_mdio_write(tp, 0x14, 0xae2b);
+        rtl8168_mdio_write(tp, 0x14, 0xa202);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x874e);
+        rtl8168_mdio_write(tp, 0x14, 0xae23);
+        rtl8168_mdio_write(tp, 0x14, 0xa203);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8751);
+        rtl8168_mdio_write(tp, 0x14, 0xae1b);
+        rtl8168_mdio_write(tp, 0x14, 0xa204);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8754);
+        rtl8168_mdio_write(tp, 0x14, 0xae13);
+        rtl8168_mdio_write(tp, 0x14, 0xa205);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8757);
+        rtl8168_mdio_write(tp, 0x14, 0xae0b);
+        rtl8168_mdio_write(tp, 0x14, 0xa206);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x875a);
+        rtl8168_mdio_write(tp, 0x14, 0xae03);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x5d02);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xef64);
+        rtl8168_mdio_write(tp, 0x14, 0xef97);
+        rtl8168_mdio_write(tp, 0x14, 0xfffc);
+        rtl8168_mdio_write(tp, 0x14, 0x04af);
+        rtl8168_mdio_write(tp, 0x14, 0x00ed);
+        rtl8168_mdio_write(tp, 0x14, 0x54a4);
+        rtl8168_mdio_write(tp, 0x14, 0x3474);
+        rtl8168_mdio_write(tp, 0x14, 0xa600);
+        rtl8168_mdio_write(tp, 0x14, 0x22a4);
+        rtl8168_mdio_write(tp, 0x14, 0x3411);
+        rtl8168_mdio_write(tp, 0x14, 0xb842);
+        rtl8168_mdio_write(tp, 0x14, 0x22b8);
+        rtl8168_mdio_write(tp, 0x14, 0x42f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa200);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x02f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa204);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x06f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa208);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x0af0);
+        rtl8168_mdio_write(tp, 0x14, 0xa20c);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x0e55);
+        rtl8168_mdio_write(tp, 0x14, 0xb820);
+        rtl8168_mdio_write(tp, 0x14, 0xd9c6);
+        rtl8168_mdio_write(tp, 0x14, 0x08aa);
+        rtl8168_mdio_write(tp, 0x14, 0xc430);
+        rtl8168_mdio_write(tp, 0x14, 0x00c6);
+        rtl8168_mdio_write(tp, 0x14, 0x1433);
+        rtl8168_mdio_write(tp, 0x14, 0xc41a);
+        rtl8168_mdio_write(tp, 0x14, 0x88c4);
+        rtl8168_mdio_write(tp, 0x14, 0x2e22);
+        rtl8168_mdio_write(tp, 0x14, 0xc42e);
+        rtl8168_mdio_write(tp, 0x14, 0x54c4);
+        rtl8168_mdio_write(tp, 0x14, 0x1a00);
+        rtl8168_mdio_write(tp, 0x13, 0xb818);
+        rtl8168_mdio_write(tp, 0x14, 0x1a01);
+        rtl8168_mdio_write(tp, 0x13, 0xb81a);
+        rtl8168_mdio_write(tp, 0x14, 0x020b);
+        rtl8168_mdio_write(tp, 0x13, 0xb81c);
+        rtl8168_mdio_write(tp, 0x14, 0x03ce);
+        rtl8168_mdio_write(tp, 0x13, 0xb81e);
+        rtl8168_mdio_write(tp, 0x14, 0x00e7);
+        rtl8168_mdio_write(tp, 0x13, 0xb846);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb848);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb84a);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb84c);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb832);
+        rtl8168_mdio_write(tp, 0x14, 0x000f);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8042);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+
+        if (tp->RequiredSecLanDonglePatch) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                gphy_val = rtl8168_mdio_read(tp, 0x11);
+                gphy_val &= ~BIT_6;
+                rtl8168_mdio_write(tp, 0x11, gphy_val);
+        }
+}
+
+static void
 rtl8168_init_hw_phy_mcu(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
@@ -20815,6 +21806,9 @@
         case CFG_METHOD_30:
                 rtl8168_set_phy_mcu_8168h_2(dev);
                 break;
+        case CFG_METHOD_35:
+                rtl8168_set_phy_mcu_8168h_3(dev);
+                break;
         }
 
         if (require_disable_phy_disable_mode)
@@ -23148,7 +24142,7 @@
                         }
                 }
         } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33) {
+                   tp->mcfg == CFG_METHOD_33 ||  tp->mcfg == CFG_METHOD_34) {
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x808E);
                 ClearAndSetEthPhyBit( tp,
@@ -23302,11 +24296,134 @@
                                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
                         }
                 }
+        } else if (tp->mcfg == CFG_METHOD_35) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A4C);
+                rtl8168_clear_eth_phy_bit(tp, 0x15, (BIT_14 | BIT_13));
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x81B9);
+                rtl8168_mdio_write(tp, 0x14, 0x2000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x81D4);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x6600);
+                rtl8168_mdio_write(tp, 0x13, 0x81CB);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x3500);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A80);
+                ClearAndSetEthPhyBit(tp,
+                                     0x16,
+                                     0x000F,
+                                     0x0005);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8016);
+                rtl8168_set_eth_phy_bit(tp, 0x14, BIT_13);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x811E);
+                rtl8168_mdio_write(tp, 0x14, 0xDECA);
+
+                rtl8168_mdio_write(tp, 0x13, 0x811C);
+                rtl8168_mdio_write(tp, 0x14, 0x8008);
+                rtl8168_mdio_write(tp, 0x13, 0x8118);
+                rtl8168_mdio_write(tp, 0x14, 0xF8B4);
+                rtl8168_mdio_write(tp, 0x13, 0x811A);
+                rtl8168_mdio_write(tp, 0x14, 0x1A04);
+
+                rtl8168_mdio_write(tp, 0x13, 0x8134);
+                rtl8168_mdio_write(tp, 0x14, 0xDECA);
+                rtl8168_mdio_write(tp, 0x13, 0x8132);
+                rtl8168_mdio_write(tp, 0x14, 0xA008);
+                rtl8168_mdio_write(tp, 0x13, 0x812E);
+                rtl8168_mdio_write(tp, 0x14, 0x00B5);
+                rtl8168_mdio_write(tp, 0x13, 0x8130);
+                rtl8168_mdio_write(tp, 0x14, 0x1A04);
+
+                rtl8168_mdio_write(tp, 0x13, 0x8112);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x7300);
+                rtl8168_mdio_write(tp, 0x13, 0x8106);
+                rtl8168_mdio_write(tp, 0x14, 0xA209);
+                rtl8168_mdio_write(tp, 0x13, 0x8108);
+                rtl8168_mdio_write(tp, 0x14, 0x13B0);
+                rtl8168_mdio_write(tp, 0x13, 0x8103);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xF800,
+                                     0xB800);
+                rtl8168_mdio_write(tp, 0x13, 0x8105);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x0A00);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x87EB);
+                rtl8168_mdio_write(tp, 0x14, 0x0018);
+                rtl8168_mdio_write(tp, 0x13, 0x87EB);
+                rtl8168_mdio_write(tp, 0x14, 0x0018);
+                rtl8168_mdio_write(tp, 0x13, 0x87ED);
+                rtl8168_mdio_write(tp, 0x14, 0x0733);
+                rtl8168_mdio_write(tp, 0x13, 0x87EF);
+                rtl8168_mdio_write(tp, 0x14, 0x08DC);
+                rtl8168_mdio_write(tp, 0x13, 0x87F1);
+                rtl8168_mdio_write(tp, 0x14, 0x08DF);
+                rtl8168_mdio_write(tp, 0x13, 0x87F3);
+                rtl8168_mdio_write(tp, 0x14, 0x0C79);
+                rtl8168_mdio_write(tp, 0x13, 0x87F5);
+                rtl8168_mdio_write(tp, 0x14, 0x0D93);
+                rtl8168_mdio_write(tp, 0x13, 0x87F9);
+                rtl8168_mdio_write(tp, 0x14, 0x0010);
+                rtl8168_mdio_write(tp, 0x13, 0x87FB);
+                rtl8168_mdio_write(tp, 0x14, 0x0800);
+                rtl8168_mdio_write(tp, 0x13, 0x8015);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0x7000,
+                                     0x7000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8111);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x7C00);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
+                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        }
+                }
         }
 
 #ifdef ENABLE_FIBER_SUPPORT
         if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_hw_fiber_phy_config(dev);
+                rtl8168_hw_fiber_phy_config(tp);
 #endif //ENABLE_FIBER_SUPPORT
 
         //EthPhyPPSW
@@ -23326,7 +24443,8 @@
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
         } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33) {
+                   tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                   tp->mcfg == CFG_METHOD_35) {
                 //enable EthPhyPPSW
                 rtl8168_mdio_write(tp, 0x1F, 0x0A44);
                 rtl8168_set_eth_phy_bit( tp, 0x11, BIT_7 );
@@ -23338,7 +24456,8 @@
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 if (aspm)
                         rtl8168_enable_ocp_phy_power_saving(dev);
         }
@@ -23441,6 +24560,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->bios_setting = RTL_R32(tp, 0x8c);
                 break;
         }
@@ -23477,6 +24598,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W32(tp, 0x8C, tp->bios_setting);
                 break;
         }
@@ -23490,6 +24613,9 @@
 
         rtl8168_get_bios_setting(dev);
 
+        tp->num_rx_desc = NUM_RX_DESC;
+        tp->num_tx_desc = NUM_TX_DESC;
+
         switch (tp->mcfg) {
         case CFG_METHOD_11:
         case CFG_METHOD_12:
@@ -23504,6 +24630,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->HwSuppDashVer = 3;
                 break;
         default:
@@ -23515,6 +24642,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->HwPkgDet = rtl8168_mac_ocp_read(tp, 0xDC00);
                 tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x0F;
                 break;
@@ -23537,6 +24665,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppNowIsOobVer = 1;
                 break;
         }
@@ -23555,6 +24685,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppPhyOcpVer = 1;
                 break;
         }
@@ -23565,6 +24697,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppUpsVer = 1;
                 break;
         }
@@ -23573,6 +24707,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->HwPcieSNOffset = 0x16C;
                 break;
         case CFG_METHOD_DEFAULT:
@@ -23604,6 +24739,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppAspmClkIntrLock = 1;
                 break;
         }
@@ -23707,6 +24844,8 @@
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
                 case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                case CFG_METHOD_35:
                         tp->org_pci_offset_99 = rtl8168_csi_fun0_read_byte(tp, 0x99);
                         tp->org_pci_offset_99 &= ~(BIT_5|BIT_6);
                         break;
@@ -23719,11 +24858,13 @@
                 case CFG_METHOD_28:
                 case CFG_METHOD_29:
                 case CFG_METHOD_30:
+                case CFG_METHOD_35:
                         tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x180);
                         break;
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
                 case CFG_METHOD_33:
+                case CFG_METHOD_34:
                         tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x214);
                         break;
                 }
@@ -23736,6 +24877,10 @@
                 case CFG_METHOD_25:
                 case CFG_METHOD_27:
                 case CFG_METHOD_28:
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
                         if (tp->org_pci_offset_99 & BIT_2)
                                 tp->issue_offset_99_event = TRUE;
                         break;
@@ -23819,7 +24964,8 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-        case CFG_METHOD_33: {
+        case CFG_METHOD_33:
+        case CFG_METHOD_34: {
                 u16 rg_saw_cnt;
 
                 rtl8168_mdio_write(tp, 0x1F, 0x0C42);
@@ -23827,7 +24973,7 @@
                 rg_saw_cnt &= ~(BIT_15|BIT_14);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                if ( rg_saw_cnt > 0) {
+                if (rg_saw_cnt > 0) {
                         tp->SwrCnt1msIni = 16000000/rg_saw_cnt;
                         tp->SwrCnt1msIni &= 0x0FFF;
 
@@ -23838,12 +24984,13 @@
         }
 
 #ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_check_hw_fiber_mode_support(dev);
+        rtl8168_check_hw_fiber_mode_support(tp);
 #endif //ENABLE_FIBER_SUPPORT
 
         switch(tp->mcfg) {
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 if (tp->HwPkgDet == 0x06) {
                         u8 tmpUchar = rtl8168_eri_read(tp, 0xE6, 1, ERIAR_ExGMAC);
                         if (tmpUchar == 0x02)
@@ -23861,6 +25008,10 @@
                         hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
         }
 
+#ifdef CONFIG_CTAP_SHORT_OFF
+        hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
+#endif //CONFIG_CTAP_SHORT_OFF
+
         if (hwoptimize & HW_PATCH_SAMSUNG_LAN_DONGLE) {
                 switch (tp->mcfg) {
                 case CFG_METHOD_14:
@@ -23894,6 +25045,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V2;
                 break;
         case CFG_METHOD_DEFAULT:
@@ -23909,14 +25062,19 @@
         case CFG_METHOD_30:
                 tp->HwSuppEsdVer = 2;
                 break;
+        case CFG_METHOD_35:
+                tp->HwSuppEsdVer = 3;
+                break;
         default:
                 tp->HwSuppEsdVer = 1;
                 break;
         }
 
-        if (tp->HwSuppEsdVer == 2) {
+        if (tp->HwSuppEsdVer == 2 ||
+            tp->HwSuppEsdVer == 3) {
                 rtl8168_mdio_write(tp, 0x1F, 0x0A46);
                 tp->BackupPhyFuseDout_15_0 = rtl8168_mdio_read(tp, 0x10);
+                tp->BackupPhyFuseDout_31_16 = rtl8168_mdio_read(tp, 0x11);
                 tp->BackupPhyFuseDout_47_32 = rtl8168_mdio_read(tp, 0x12);
                 tp->BackupPhyFuseDout_63_48 = rtl8168_mdio_read(tp, 0x13);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
@@ -23938,6 +25096,7 @@
         case CFG_METHOD_26:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 tp->HwSuppCheckPhyDisableModeVer = 2;
                 break;
         case CFG_METHOD_23:
@@ -23946,6 +25105,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->HwSuppCheckPhyDisableModeVer = 3;
                 break;
         }
@@ -23991,8 +25151,12 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_31;
                 break;
+        case CFG_METHOD_35:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_35;
+                break;
         }
 
         if (tp->HwIcVerUnknown) {
@@ -24010,6 +25174,7 @@
         tp->speed = speed_mode;
         tp->duplex = duplex_mode;
         tp->advertising = advertising_mode;
+        tp->fcpause = rtl8168_fc_full;
 
         tp->max_jumbo_frame_size = rtl_chip_infotp->chipset.jumbo_frame_sz;
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
@@ -24022,7 +25187,7 @@
 
 #ifdef ENABLE_FIBER_SUPPORT
         if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_set_fiber_mode_software_variable(dev);
+                rtl8168_set_fiber_mode_software_variable(tp);
 #endif //ENABLE_FIBER_SUPPORT
 }
 
@@ -24055,6 +25220,16 @@
         free_netdev(dev);
 }
 
+static void
+rtl8168_hw_address_set(struct net_device *dev, u8 mac_addrMAC_ADDR_LEN)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+        eth_hw_addr_set(dev, mac_addr);
+#else
+        memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+}
+
 static int
 rtl8168_get_mac_address(struct net_device *dev)
 {
@@ -24080,7 +25255,9 @@
             tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 ||
             tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 ||
+            tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 *(u32*)&mac_addr0 = rtl8168_eri_read(tp, 0xE0, 4, ERIAR_ExGMAC);
                 *(u16*)&mac_addr4 = rtl8168_eri_read(tp, 0xE4, 2, ERIAR_ExGMAC);
         } else {
@@ -24104,7 +25281,9 @@
                             tp->mcfg == CFG_METHOD_30 ||
                             tp->mcfg == CFG_METHOD_31 ||
                             tp->mcfg == CFG_METHOD_32 ||
-                            tp->mcfg == CFG_METHOD_33) {
+                            tp->mcfg == CFG_METHOD_33 ||
+                            tp->mcfg == CFG_METHOD_34 ||
+                            tp->mcfg == CFG_METHOD_35) {
                                 *pUshort++ = rtl8168_eeprom_read_sc(tp, 1);
                                 *pUshort++ = rtl8168_eeprom_read_sc(tp, 2);
                                 *pUshort = rtl8168_eeprom_read_sc(tp, 3);
@@ -24119,24 +25298,21 @@
         if (!is_valid_ether_addr(mac_addr)) {
                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
                           mac_addr);
-                eth_hw_addr_random(dev);
-                ether_addr_copy(mac_addr, dev->dev_addr);
+                eth_random_addr(mac_addr);
+                dev->addr_assign_type = NET_ADDR_RANDOM;
                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
                            mac_addr);
                 tp->random_mac = 1;
         }
 
+        rtl8168_hw_address_set(dev, mac_addr);
         rtl8168_rar_set(tp, mac_addr);
 
-        for (i = 0; i < MAC_ADDR_LEN; i++) {
-                dev->dev_addri = RTL_R8(tp, MAC0 + i);
-                tp->org_mac_addri = dev->dev_addri; /* keep the original MAC address */
-        }
+        /* keep the original MAC address */
+        memcpy(tp->org_mac_addr, dev->dev_addr, MAC_ADDR_LEN);
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 #endif
-//  memcpy(dev->dev_addr, dev->dev_addr, dev->addr_len);
-
         return 0;
 }
 
@@ -24160,7 +25336,7 @@
 
         spin_lock_irqsave(&tp->lock, flags);
 
-        memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
+        rtl8168_hw_address_set(dev, addr->sa_data);
 
         rtl8168_rar_set(tp, dev->dev_addr);
 
@@ -24177,7 +25353,7 @@
  *****************************************************************************/
 void
 rtl8168_rar_set(struct rtl8168_private *tp,
-                uint8_t *addr)
+                const u8 *addr)
 {
         uint32_t rar_low = 0;
         uint32_t rar_high = 0;
@@ -24870,6 +26046,72 @@
 }
 #endif //ETHTOOL_OPS_COMPAT
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
+static int rtl8168_siocdevprivate(struct net_device *dev, struct ifreq *ifr,
+                                  void __user *data, int cmd)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ret = 0;
+
+        switch (cmd) {
+        case SIOCDEVPRIVATE_RTLASF:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                ret = rtl8168_asf_ioctl(dev, ifr);
+                break;
+
+#ifdef ENABLE_DASH_SUPPORT
+        case SIOCDEVPRIVATE_RTLDASH:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_dash_ioctl(dev, ifr);
+                break;
+#endif
+
+#ifdef ENABLE_REALWOW_SUPPORT
+        case SIOCDEVPRIVATE_RTLREALWOW:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_realwow_ioctl(dev, ifr);
+                break;
+#endif
+
+        case SIOCRTLTOOL:
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_tool_ioctl(tp, ifr);
+                break;
+
+        default:
+                ret = -EOPNOTSUPP;
+        }
+
+        return ret;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
+
 static int
 rtl8168_do_ioctl(struct net_device *dev,
                  struct ifreq *ifr,
@@ -24938,11 +26180,21 @@
                         break;
                 }
 
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
                 ret = rtl8168_realwow_ioctl(dev, ifr);
                 break;
 #endif
 
         case SIOCRTLTOOL:
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
                 ret = rtl8168_tool_ioctl(tp, ifr);
                 break;
 
@@ -25035,6 +26287,7 @@
         case CFG_METHOD_15:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
                 break;
         case CFG_METHOD_21:
@@ -25262,6 +26515,12 @@
                 printk(KERN_ERR "%s: cmd = 0x%02x, should be 0x%02x \n.", dev->name, cmd, tp->pci_cfg_space.cmd);
                 pci_write_config_byte(pdev, PCI_COMMAND, tp->pci_cfg_space.cmd);
                 tp->esd_flag |= BIT_0;
+
+                pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
+                if (cmd == 0xff) {
+                        printk(KERN_ERR "%s: pci link is down \n.", dev->name);
+                        goto out_unlock;
+                }
         }
 
         pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &io_base_l);
@@ -25383,6 +26642,8 @@
                 rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
                 tp->esd_flag = 0;
         }
+
+out_unlock:
         spin_unlock_irqrestore(&tp->lock, flags);
 
         mod_timer(timer, jiffies + timeout);
@@ -25461,7 +26722,12 @@
         .ndo_tx_timeout     = rtl8168_tx_timeout,
         .ndo_change_mtu     = rtl8168_change_mtu,
         .ndo_set_mac_address    = rtl8168_set_mac_address,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
         .ndo_do_ioctl       = rtl8168_do_ioctl,
+#else
+        .ndo_siocdevprivate = rtl8168_siocdevprivate,
+        .ndo_eth_ioctl      = rtl8168_do_ioctl,
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
         .ndo_set_multicast_list = rtl8168_set_rx_mode,
 #else
@@ -25614,7 +26880,8 @@
         /* Get production from EEPROM */
         if (((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
               tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_29 ||
-              tp->mcfg == CFG_METHOD_30) && (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3)) ||
+              tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35) &&
+             (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3)) ||
             ((tp->mcfg == CFG_METHOD_26) && (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_4)))
                 tp->eeprom_type = EEPROM_TYPE_NONE;
         else
@@ -25764,12 +27031,14 @@
         * Rx and Tx descriptors needs 256 bytes alignment.
         * pci_alloc_consistent provides more.
         */
-        tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8168_TX_RING_BYTES,
+        tp->TxDescArray = dma_alloc_coherent(&pdev->dev,
+                                             (tp->num_tx_desc * sizeof(struct TxDesc)),
                                              &tp->TxPhyAddr, GFP_KERNEL);
         if (!tp->TxDescArray)
                 goto err_free_all_allocated_mem;
 
-        tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8168_RX_RING_BYTES,
+        tp->RxDescArray = dma_alloc_coherent(&pdev->dev,
+                                             (tp->num_rx_desc * sizeof(struct RxDesc)),
                                              &tp->RxPhyAddr, GFP_KERNEL);
         if (!tp->RxDescArray)
                 goto err_free_all_allocated_mem;
@@ -25843,13 +27112,17 @@
 
 err_free_all_allocated_mem:
         if (tp->RxDescArray != NULL) {
-                dma_free_coherent(&pdev->dev, R8168_RX_RING_BYTES, tp->RxDescArray,
+                dma_free_coherent(&pdev->dev,
+                                  (tp->num_rx_desc * sizeof(struct RxDesc)),
+                                  tp->RxDescArray,
                                   tp->RxPhyAddr);
                 tp->RxDescArray = NULL;
         }
 
         if (tp->TxDescArray != NULL) {
-                dma_free_coherent(&pdev->dev, R8168_TX_RING_BYTES, tp->TxDescArray,
+                dma_free_coherent(&pdev->dev,
+                                  (tp->num_tx_desc * sizeof(struct TxDesc)),
+                                  tp->TxDescArray,
                                   tp->TxPhyAddr);
                 tp->TxDescArray = NULL;
         }
@@ -26054,6 +27327,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1);
                 break;
         }
@@ -26078,6 +27353,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
                 csi_tmp &= BIT_0;
                 rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
@@ -26470,7 +27747,7 @@
         } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                    tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
                    tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_29 ||
-                   tp->mcfg == CFG_METHOD_30) {
+                   tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
                 if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22)
@@ -26489,6 +27766,9 @@
                 csi_tmp |= BIT_0;
                 rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
 
+                if (tp->mcfg == CFG_METHOD_35)
+                        rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0));
+
                 if (tp->mcfg == CFG_METHOD_26) {
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C0);
                         mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
@@ -26500,7 +27780,8 @@
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C4);
                         mac_ocp_data |= BIT_0;
                         rtl8168_mac_ocp_write(tp, 0xD3C4, mac_ocp_data);
-                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                           tp->mcfg == CFG_METHOD_35) {
 
                         if (tp->RequireAdjustUpsTxLinkPulseTiming) {
                                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD412);
@@ -26555,7 +27836,8 @@
                 rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
 
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35) {
                         rtl8168_mac_ocp_write(tp, 0xE054, 0x0000);
 
                         rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
@@ -26563,7 +27845,8 @@
                         rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
                 }
 
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35) {
                         csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC);
                         csi_tmp |= (BIT_2 | BIT_3 | BIT_4);
                         rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
@@ -26572,7 +27855,8 @@
                 if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                     tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25) {
                         rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
-                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                           tp->mcfg == CFG_METHOD_35) {
                         rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
                         rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
                 }
@@ -26581,7 +27865,8 @@
                 csi_tmp &= ~BIT_12;
                 rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
 
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35) {
                         csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
                         csi_tmp &= ~(BIT_2);
                         rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
@@ -26671,7 +27956,7 @@
                         rtl8168_mac_ocp_write(tp, 0xE860, mac_ocp_data);
                 }
         } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33) {
+                   tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
 
@@ -26697,8 +27982,10 @@
 
                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056);
                 mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                if (tp->HwPkgDet == 0x0F)
+                        mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
                 rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data);
-                if (FALSE == HW_SUPP_SERDES_PHY(tp))
+                if (tp->HwPkgDet == 0x0F)
                         rtl8168_mac_ocp_write(tp, 0xEA80, 0x0003);
                 else
                         rtl8168_mac_ocp_write(tp, 0xEA80, 0x0000);
@@ -26706,6 +27993,8 @@
                 rtl8168_oob_mutex_lock(tp);
                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
                 mac_ocp_data &= ~(BIT_3 | BIT_0);
+                if (tp->HwPkgDet == 0x0F)
+                        mac_ocp_data |= BIT_0;
                 rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data);
                 rtl8168_oob_mutex_unlock(tp);
 
@@ -26744,10 +28033,14 @@
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
 
                 rtl8168_oob_mutex_lock(tp);
-                rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
+                if (tp->HwPkgDet == 0x0F)
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F00, ERIAR_ExGMAC);
+                else
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
                 rtl8168_oob_mutex_unlock(tp);
 
-                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33) {
+                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                    tp->mcfg == CFG_METHOD_34) {
                         csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                         csi_tmp |= BIT_4;
                         rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
@@ -26872,11 +28165,13 @@
                 break;
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 rtl8168_mac_ocp_write(tp, 0xE098, 0x0AA2);
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_mac_ocp_write(tp, 0xE098, 0xC302);
                 break;
         }
@@ -26895,6 +28190,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 if (aspm) {
                         rtl8168_init_pci_offset_99(tp);
                 }
@@ -26911,6 +28208,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 if (aspm) {
                         rtl8168_init_pci_offset_180(tp);
                 }
@@ -26945,7 +28244,9 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-        case CFG_METHOD_33: {
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35: {
                 int timeout;
                 for (timeout = 0; timeout < 10; timeout++) {
                         if ((rtl8168_eri_read(tp, 0x1AE, 2, ERIAR_ExGMAC) & BIT_13)==0)
@@ -27058,10 +28359,11 @@
         netif_stop_queue(dev);
         netif_carrier_off(dev);
         rtl8168_hw_config(dev);
-        spin_unlock_irqrestore(&tp->lock, flags);
 
         rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
 
+        spin_unlock_irqrestore(&tp->lock, flags);
+
         mod_timer(&tp->esd_timer, jiffies + RTL8168_ESD_TIMEOUT);
         mod_timer(&tp->link_timer, jiffies + RTL8168_LINK_TIMEOUT);
 out:
@@ -27160,7 +28462,7 @@
 {
         int i;
 
-        for (i = 0; i < NUM_RX_DESC; i++) {
+        for (i = 0; i < tp->num_rx_desc; i++) {
                 if (tp->Rx_skbuffi)
                         rtl8168_free_rx_skb(tp, tp->Rx_skbuff + i,
                                             tp->RxDescArray + i);
@@ -27177,7 +28479,7 @@
         u32 cur;
 
         for (cur = start; end - cur > 0; cur++) {
-                int ret, i = cur % NUM_RX_DESC;
+                int ret, i = cur % tp->num_rx_desc;
 
                 if (tp->Rx_skbuffi)
                         continue;
@@ -27215,10 +28517,10 @@
 {
         int i = 0;
 
-        memset(tp->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc));
+        memset(tp->TxDescArray, 0x0, tp->num_tx_desc * sizeof(struct TxDesc));
 
-        for (i = 0; i < NUM_TX_DESC; i++) {
-                if (i == (NUM_TX_DESC - 1))
+        for (i = 0; i < tp->num_tx_desc; i++) {
+                if (i == (tp->num_tx_desc - 1))
                         tp->TxDescArrayi.opts1 = cpu_to_le32(RingEnd);
         }
 }
@@ -27234,8 +28536,8 @@
         if (own)
                 ownbit = DescOwn;
 
-        for (i = 0; i < NUM_RX_DESC; i++) {
-                if (i == (NUM_RX_DESC - 1))
+        for (i = 0; i < tp->num_rx_desc; i++) {
+                if (i == (tp->num_rx_desc - 1))
                         tp->RxDescArrayi.opts1 = cpu_to_le32((ownbit | RingEnd) | (unsigned long)tp->rx_buf_sz);
                 else
                         tp->RxDescArrayi.opts1 = cpu_to_le32(ownbit | (unsigned long)tp->rx_buf_sz);
@@ -27245,7 +28547,7 @@
 static void
 rtl8168_rx_desc_init(struct rtl8168_private *tp)
 {
-        memset(tp->RxDescArray, 0x0, NUM_RX_DESC * sizeof(struct RxDesc));
+        memset(tp->RxDescArray, 0x0, tp->num_rx_desc * sizeof(struct RxDesc));
 }
 
 static int
@@ -27255,16 +28557,16 @@
 
         rtl8168_init_ring_indexes(tp);
 
-        memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
-        memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
+        memset(tp->tx_skb, 0x0, sizeof(tp->tx_skb));
+        memset(tp->Rx_skbuff, 0x0, sizeof(tp->Rx_skbuff));
 
         rtl8168_tx_desc_init(tp);
         rtl8168_rx_desc_init(tp);
 
-        if (rtl8168_rx_fill(tp, dev, 0, NUM_RX_DESC, 0) != NUM_RX_DESC)
+        if (rtl8168_rx_fill(tp, dev, 0, tp->num_rx_desc, 0) != tp->num_rx_desc)
                 goto err_out;
 
-        rtl8168_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
+        rtl8168_mark_as_last_descriptor(tp->RxDescArray + tp->num_rx_desc - 1);
 
         return 0;
 
@@ -27297,7 +28599,7 @@
 #endif
 
         for (i = 0; i < n; i++) {
-                unsigned int entry = (start + i) % NUM_TX_DESC;
+                unsigned int entry = (start + i) % tp->num_tx_desc;
                 struct ring_info *tx_skb = tp->tx_skb + entry;
                 unsigned int len = tx_skb->len;
 
@@ -27318,7 +28620,7 @@
 static void
 rtl8168_tx_clear(struct rtl8168_private *tp)
 {
-        rtl8168_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC);
+        rtl8168_tx_clear_range(tp, tp->dirty_tx, tp->num_tx_desc);
         tp->cur_tx = tp->dirty_tx = 0;
 }
 
@@ -27355,29 +28657,6 @@
 }
 #endif
 
-static void
-rtl8168_wait_for_quiescence(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        synchronize_irq(dev->irq);
-
-        /* Wait for any pending NAPI task to complete */
-#ifdef CONFIG_R8168_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        RTL_NAPI_DISABLE(dev, &tp->napi);
-#endif
-#endif//CONFIG_R8168_NAPI
-
-        rtl8168_irq_mask_and_ack(tp);
-
-#ifdef CONFIG_R8168_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        RTL_NAPI_ENABLE(dev, &tp->napi);
-#endif
-#endif//CONFIG_R8168_NAPI
-}
-
 #if 0
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 static void rtl8168_reinit_task(void *_data)
@@ -27486,11 +28765,14 @@
 }
 
 static u32
-rtl8168_get_txd_opts1(u32 opts1, u32 len, unsigned int entry)
+rtl8168_get_txd_opts1(struct rtl8168_private *tp,
+                      u32 opts1,
+                      u32 len,
+                      unsigned int entry)
 {
         u32 status = opts1 | len;
 
-        if (entry == NUM_TX_DESC - 1)
+        if (entry == tp->num_tx_desc - 1)
                 status |= RingEnd;
 
         return status;
@@ -27513,7 +28795,7 @@
                 u32 status, len;
                 void *addr;
 
-                entry = (entry + 1) % NUM_TX_DESC;
+                entry = (entry + 1) % tp->num_tx_desc;
 
                 txd = tp->TxDescArray + entry;
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)
@@ -27533,7 +28815,7 @@
                 }
 
                 /* anti gcc 2.95.3 bugware (sic) */
-                status = rtl8168_get_txd_opts1(opts0, len, entry);
+                status = rtl8168_get_txd_opts1(tp, opts0, len, entry);
                 if (cur_frag == (nr_frags - 1)) {
                         tp->tx_skbentry.skb = skb;
                         status |= LastFrag;
@@ -27741,7 +29023,7 @@
 static bool rtl8168_tx_slots_avail(struct rtl8168_private *tp,
                                    unsigned int nr_frags)
 {
-        unsigned int slots_avail = tp->dirty_tx + NUM_TX_DESC - tp->cur_tx;
+        unsigned int slots_avail = tp->dirty_tx + tp->num_tx_desc - tp->cur_tx;
 
         /* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */
         return slots_avail > nr_frags;
@@ -27772,7 +29054,7 @@
                 goto err_stop;
         }
 
-        entry = tp->cur_tx % NUM_TX_DESC;
+        entry = tp->cur_tx % tp->num_tx_desc;
         txd = tp->TxDescArray + entry;
 
         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) {
@@ -27861,7 +29143,7 @@
                 opts0 |= FirstFrag | LastFrag;
         }
 
-        opts0 = rtl8168_get_txd_opts1(opts0, len, entry);
+        opts0 = rtl8168_get_txd_opts1(tp, opts0, len, entry);
         mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
         if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
                 if (unlikely(net_ratelimit()))
@@ -27929,7 +29211,7 @@
         tp->dynamic_aspm_packet_count += tx_left;
 
         while (tx_left > 0) {
-                unsigned int entry = dirty_tx % NUM_TX_DESC;
+                unsigned int entry = dirty_tx % tp->num_tx_desc;
                 struct ring_info *tx_skb = tp->tx_skb + entry;
                 u32 len = tx_skb->len;
                 u32 status;
@@ -28076,9 +29358,9 @@
 
         rx_quota = RTL_RX_QUOTA(budget);
         cur_rx = tp->cur_rx;
-        entry = cur_rx % NUM_RX_DESC;
+        entry = cur_rx % tp->num_rx_desc;
         desc = tp->RxDescArray + entry;
-        rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
+        rx_left = tp->num_rx_desc + tp->dirty_rx - cur_rx;
         rx_left = rtl8168_rx_quota(rx_left, (u32)rx_quota);
 
         for (; rx_left > 0; rx_left--) {
@@ -28161,7 +29443,7 @@
                 }
 
                 cur_rx++;
-                entry = cur_rx % NUM_RX_DESC;
+                entry = cur_rx % tp->num_rx_desc;
                 desc = tp->RxDescArray + entry;
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
                 prefetch(desc);
@@ -28185,7 +29467,7 @@
          *   after refill ?
          * - how do others driver handle this condition (Uh oh...).
          */
-        if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
+        if ((tp->dirty_rx + tp->num_rx_desc == tp->cur_rx) && netif_msg_intr(tp))
                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
 
 rx_out:
@@ -28249,6 +29531,8 @@
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
                 case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                case CFG_METHOD_35:
                         /* RX_OVERFLOW RE-START mechanism now HW handles it automatically*/
                         RTL_W16(tp, IntrStatus, status&~RxFIFOOver);
                         break;
@@ -28326,12 +29610,14 @@
 
                         if (status & tp->intr_mask)
                                 tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
+
+                        rtl8168_tx_interrupt(dev, tp);
+
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
                         rtl8168_rx_interrupt(dev, tp, &budget);
 #else
                         rtl8168_rx_interrupt(dev, tp, budget);
 #endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                        rtl8168_tx_interrupt(dev, tp);
 
 #ifdef ENABLE_DASH_SUPPORT
                         if ( tp->DASH ) {
@@ -28362,12 +29648,12 @@
         unsigned int work_done;
         unsigned long flags;
 
-        work_done = rtl8168_rx_interrupt(dev, tp, budget);
-
         spin_lock_irqsave(&tp->lock, flags);
         rtl8168_tx_interrupt(dev, tp);
         spin_unlock_irqrestore(&tp->lock, flags);
 
+        work_done = rtl8168_rx_interrupt(dev, tp, budget);
+
         RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
 
         if (work_done < work_to_do) {
@@ -28485,9 +29771,13 @@
 
                 free_irq(dev->irq, dev);
 
-                dma_free_coherent(&pdev->dev, R8168_RX_RING_BYTES, tp->RxDescArray,
+                dma_free_coherent(&pdev->dev,
+                                  (tp->num_rx_desc * sizeof(struct RxDesc)),
+                                  tp->RxDescArray,
                                   tp->RxPhyAddr);
-                dma_free_coherent(&pdev->dev, R8168_TX_RING_BYTES, tp->TxDescArray,
+                dma_free_coherent(&pdev->dev,
+                                  (tp->num_tx_desc * sizeof(struct TxDesc)),
+                                  tp->TxDescArray,
                                   tp->TxPhyAddr);
                 tp->TxDescArray = NULL;
                 tp->RxDescArray = NULL;
@@ -28518,7 +29808,7 @@
                 rtl8168_rar_set(tp, tp->org_mac_addr);
 
 #ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_hw_fiber_nic_d3_para(dev);
+        rtl8168_hw_fiber_nic_d3_para(tp);
 #endif  //ENABLE_FIBER_SUPPORT
 
         if (s5wol == 0)
@@ -28599,7 +29889,7 @@
         rtl8168_hw_d3_para(dev);
 
 #ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_hw_fiber_nic_d3_para(dev);
+        rtl8168_hw_fiber_nic_d3_para(tp);
 #endif  //ENABLE_FIBER_SUPPORT
 
         rtl8168_powerdown_pll(dev);

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
@@ -112,6 +112,7 @@
 #define FIRMWARE_8168EP_3   "rtl_nic/rtl8168ep-3.fw"
 #define FIRMWARE_8168H_1    "rtl_nic/rtl8168h-1.fw"
 #define FIRMWARE_8168H_2    "rtl_nic/rtl8168h-2.fw"
+#define FIRMWARE_8168H_3    "rtl_nic/rtl8168h-3.fw"
 #define FIRMWARE_8168FP_3   "rtl_nic/rtl8168fp-3.fw"
 #define FIRMWARE_8168FP_4   "rtl_nic/rtl8168fp-4.fw"
 
@@ -157,6 +158,8 @@
         CFG_METHOD_31 = {"RTL8168FP/8111FP",      },
         CFG_METHOD_32 = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_3},
         CFG_METHOD_33 = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
+        CFG_METHOD_34 = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
+        CFG_METHOD_35 = {"RTL8168H/8111H",        FIRMWARE_8168H_3},
         CFG_METHOD_DEFAULT = {"Unknown",          },
 };
 
@@ -368,6 +371,18 @@
         0xff7e5880,
         Jumbo_Frame_9k),
 
+        _R("RTL8168FP/8111FP",
+        CFG_METHOD_34,
+        RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168H/8111H",
+        CFG_METHOD_35,
+        RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
         _R("Unknown",
         CFG_METHOD_DEFAULT,
         (RX_DMA_BURST << RxCfgDMAShift),
@@ -517,6 +532,7 @@
 MODULE_FIRMWARE(FIRMWARE_8168EP_3);
 MODULE_FIRMWARE(FIRMWARE_8168H_1);
 MODULE_FIRMWARE(FIRMWARE_8168H_2);
+MODULE_FIRMWARE(FIRMWARE_8168H_3);
 MODULE_FIRMWARE(FIRMWARE_8168FP_3);
 MODULE_FIRMWARE(FIRMWARE_8168FP_4);
 #endif
@@ -563,7 +579,7 @@
 static void rtl8168_down(struct net_device *dev);
 
 static int rtl8168_set_mac_address(struct net_device *dev, void *p);
-void rtl8168_rar_set(struct rtl8168_private *tp, uint8_t *addr);
+void rtl8168_rar_set(struct rtl8168_private *tp, const u8 *addr);
 static void rtl8168_desc_addr_fill(struct rtl8168_private *);
 static void rtl8168_tx_desc_init(struct rtl8168_private *tp);
 static void rtl8168_rx_desc_init(struct rtl8168_private *tp);
@@ -946,10 +962,10 @@
         seq_printf(m, "chipset\t%d\n", tp->chipset);
         seq_printf(m, "chipset_name\t%s\n", rtl_chip_infotp->chipset.name);
         seq_printf(m, "mtu\t%d\n", dev->mtu);
-        seq_printf(m, "NUM_RX_DESC\t0x%x\n", NUM_RX_DESC);
+        seq_printf(m, "NUM_RX_DESC\t0x%x\n", tp->num_rx_desc);
         seq_printf(m, "cur_rx\t0x%x\n", tp->cur_rx);
         seq_printf(m, "dirty_rx\t0x%x\n", tp->dirty_rx);
-        seq_printf(m, "NUM_TX_DESC\t0x%x\n", NUM_TX_DESC);
+        seq_printf(m, "NUM_TX_DESC\t0x%x\n", tp->num_tx_desc);
         seq_printf(m, "cur_tx\t0x%x\n", tp->cur_tx);
         seq_printf(m, "dirty_tx\t0x%x\n", tp->dirty_tx);
         seq_printf(m, "rx_buf_sz\t0x%x\n", tp->rx_buf_sz);
@@ -1340,10 +1356,10 @@
                         tp->chipset,
                         rtl_chip_infotp->chipset.name,
                         dev->mtu,
-                        NUM_RX_DESC,
+                        tp->num_rx_desc,
                         tp->cur_rx,
                         tp->dirty_rx,
-                        NUM_TX_DESC,
+                        tp->num_tx_desc,
                         tp->cur_tx,
                         tp->dirty_tx,
                         tp->rx_buf_sz,
@@ -1733,7 +1749,11 @@
 static int rtl8168_proc_open(struct inode *inode, struct file *file)
 {
         struct net_device *dev = proc_get_parent_data(inode);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+        int (*show)(struct seq_file *, void *) = pde_data(inode);
+#else
         int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
 
         return single_open(file, show, dev);
 }
@@ -2253,7 +2273,6 @@
         rtl8168_mac_ocp_write(tp, addr, RegValue);
 }
 
-/*
 static void
 rtl8168_clear_mcu_ocp_bit(
         struct rtl8168_private *tp,
@@ -2267,7 +2286,6 @@
                                           0
                                          );
 }
-*/
 
 static void
 rtl8168_set_mcu_ocp_bit(
@@ -2432,6 +2450,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
         default:
                 ocp_reg_mutex_oob = 0x110;
                 ocp_reg_mutex_ib = 0x114;
@@ -2494,6 +2513,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
         default:
                 ocp_reg_mutex_oob = 0x110;
                 ocp_reg_mutex_ib = 0x114;
@@ -2685,7 +2705,8 @@
         if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
             tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
             tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
-            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33) {
+            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 &&
+            tp->mcfg != CFG_METHOD_34) {
                 multi_fun_sel_bit = 0;
         }
 
@@ -2726,7 +2747,8 @@
         if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
             tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
             tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
-            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33) {
+            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 &&
+            tp->mcfg != CFG_METHOD_34) {
                 multi_fun_sel_bit = 0;
         }
 
@@ -2758,7 +2780,8 @@
         if (tp->mcfg == CFG_METHOD_20)
                 multi_fun_sel_bit = 2;
         else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
-                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
+                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                 tp->mcfg == CFG_METHOD_34)
                 multi_fun_sel_bit = 1;
         else
                 multi_fun_sel_bit = 0;
@@ -2776,7 +2799,8 @@
         if (tp->mcfg == CFG_METHOD_20)
                 multi_fun_sel_bit = 2;
         else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
-                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
+                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                 tp->mcfg == CFG_METHOD_34)
                 multi_fun_sel_bit = 1;
         else
                 multi_fun_sel_bit = 0;
@@ -2792,7 +2816,7 @@
 
         if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
                 u32 TmpUlong;
                 u16 RegAlignAddr;
                 u8 ShiftByte;
@@ -2820,7 +2844,7 @@
 {
         if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
                 u32 TmpUlong;
                 u16 RegAlignAddr;
                 u8 ShiftByte;
@@ -2887,6 +2911,7 @@
                         case CFG_METHOD_31:
                         case CFG_METHOD_32:
                         case CFG_METHOD_33:
+                        case CFG_METHOD_34:
                                 //0: BMC, 1: NIC, 2: TCR, 3: VGA/PCIE_TO_USB, 4: EHCI, 5: WIFI, 6: WIFI, 7: KCS
                                 if (i == 5 || i == 6) {
                                         if (tp->DASH) {
@@ -3126,6 +3151,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3);
                 mdelay(2);
                 break;
@@ -3151,6 +3178,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3);
                 mdelay(2);
                 break;
@@ -3239,6 +3268,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 for (i = 0; i < 10; i++) {
                         udelay(100);
                         if (RTL_R32(tp, TxConfig) & BIT_11)
@@ -3269,6 +3300,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0xFC);
                 rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFC);
                 break;
@@ -3369,6 +3401,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFD);
                 break;
         }
@@ -3516,6 +3549,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 mdelay(2);
                 break;
         default:
@@ -3597,6 +3632,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W32(tp, TimeInt1, 0x0000);
                 RTL_W32(tp, TimeInt2, 0x0000);
                 RTL_W32(tp, TimeInt3, 0x0000);
@@ -3823,6 +3860,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1EA, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
                 rtl8168_eri_write(tp, 0x1EA, 1, csi_tmp, ERIAR_ExGMAC);
@@ -3861,7 +3900,7 @@
                 csi_tmp |= (BIT_10 | BIT_11);
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
                 break;
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
@@ -3888,7 +3927,7 @@
                 csi_tmp &= ~(BIT_10 | BIT_11);
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
                 break;
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
                 rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
@@ -3937,7 +3976,7 @@
         int link_status_on;
 
 #ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_check_fiber_link_status(dev);
+        rtl8168_check_fiber_link_status(tp);
 #endif //ENABLE_FIBER_SUPPORT
 
         link_status_on = tp->link_ok(dev);
@@ -3997,7 +4036,9 @@
                                     tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
                                     tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
                                     tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                                    tp->mcfg == CFG_METHOD_33) && netif_running(dev)) {
+                                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                                    tp->mcfg == CFG_METHOD_35) &&
+                                   netif_running(dev)) {
                                 if (RTL_R8(tp, PHYstatus)&FullDup)
                                         RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19);
                                 else
@@ -4007,7 +4048,7 @@
                         if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
                             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                            tp->mcfg == CFG_METHOD_33) {
+                            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
                                 /*half mode*/
                                 if (!(RTL_R8(tp, PHYstatus)&FullDup)) {
                                         rtl8168_mdio_write(tp, 0x1F, 0x0000);
@@ -4016,7 +4057,8 @@
                         }
 
                         if ((tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                             tp->mcfg == CFG_METHOD_33) && (RTL_R8(tp, PHYstatus) & _10bps)) {
+                             tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) &&
+                            (RTL_R8(tp, PHYstatus) & _10bps)) {
                                 u32 csi_tmp;
 
                                 csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
@@ -4073,6 +4115,10 @@
                         case CFG_METHOD_25:
                         case CFG_METHOD_27:
                         case CFG_METHOD_28:
+                        case CFG_METHOD_31:
+                        case CFG_METHOD_32:
+                        case CFG_METHOD_33:
+                        case CFG_METHOD_34:
                                 if (tp->org_pci_offset_99 & BIT_2)
                                         tp->issue_offset_99_event = TRUE;
                                 break;
@@ -4095,6 +4141,10 @@
                 case CFG_METHOD_25:
                 case CFG_METHOD_27:
                 case CFG_METHOD_28:
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
                         if (tp->issue_offset_99_event) {
                                 if (!(RTL_R8(tp, PHYstatus) & PowerSaveStatus)) {
                                         tp->issue_offset_99_event = FALSE;
@@ -4157,7 +4207,8 @@
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
                 if (val != 0x0050) {
                         rtl8168_set_phy_mcu_patch_request(tp);
@@ -4178,7 +4229,8 @@
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
                 if (val != 0x0500) {
                         rtl8168_set_phy_mcu_patch_request(tp);
@@ -4221,6 +4273,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_0 | BIT_1);
                 rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
@@ -4236,6 +4290,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_csi_fun0_write_byte(tp, 0x99, 0x00);
                 break;
         }
@@ -4255,6 +4311,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99);
                 break;
         }
@@ -4273,6 +4331,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_0 | BIT_1);
                 if (tp->org_pci_offset_99 & (BIT_5 | BIT_6))
@@ -4313,6 +4373,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~( BIT_8 | BIT_9  | BIT_10 | BIT_11  | BIT_12  | BIT_13  | BIT_14 | BIT_15 );
                 csi_tmp |= ( BIT_9 | BIT_10 | BIT_13  | BIT_14 | BIT_15 );
@@ -4344,6 +4406,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 if (tp->org_pci_offset_99 & BIT_2)
                         rtl8168_mac_ocp_write(tp, 0xE0A2,  rtl8168_mac_ocp_read(tp, 0xE0A2) | BIT_0);
                 break;
@@ -4370,6 +4434,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_eri_write(tp, 0x2E8, 2, 0x9003, ERIAR_ExGMAC);
                 rtl8168_eri_write(tp, 0x2EA, 2, 0x9003, ERIAR_ExGMAC);
                 rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
@@ -4397,6 +4463,7 @@
         case CFG_METHOD_26:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 if (tp->org_pci_offset_99 & BIT_2)
                         RTL_W8(tp, 0xB6, RTL_R8(tp, 0xB6) | BIT_0);
                 break;
@@ -4421,6 +4488,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_2;
                 rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
@@ -4454,6 +4523,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(0x0000FFF0);
                 csi_tmp |= (0x00000640);
@@ -4466,6 +4536,19 @@
         }
 
         switch (tp->mcfg) {
+        case CFG_METHOD_35:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(0xFFF0);
+                csi_tmp |= 0x0640;
+                rtl8168_eri_write(tp,0x1E8, 2, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(0xFF00);
+                rtl8168_eri_write(tp, 0x1E4, 2, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
         case CFG_METHOD_24:
         case CFG_METHOD_25:
         case CFG_METHOD_26:
@@ -4473,6 +4556,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_2;
                 rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
@@ -4515,27 +4599,14 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
-                rtl8168_issue_offset_99_event(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+                if (tp->org_pci_offset_99 & BIT_2)
+                        rtl8168_issue_offset_99_event(tp);
                 rtl8168_disable_pci_offset_99(tp);
                 break;
         }
+
         switch (tp->mcfg) {
         case CFG_METHOD_24:
         case CFG_METHOD_25:
@@ -4547,6 +4618,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_disable_pci_offset_180(tp);
                 break;
         }
@@ -4583,11 +4656,8 @@
         if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
             tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
             tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28)
                 rtl8168_eri_write(tp, 0x2F8, 2, 0x0064, ERIAR_ExGMAC);
-        }
 
         if (tp->bios_setting & BIT_28) {
                 if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 ||
@@ -4615,12 +4685,22 @@
 
         rtl8168_set_pci_99_180_exit_driver_para(dev);
 
+        switch (tp->mcfg) {
+        case CFG_METHOD_35:
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_3);
+                rtl8168_set_mcu_ocp_bit(tp, 0xDE38, BIT_2);
+                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0));
+                break;
+        }
+
         /*disable ocp phy power saving*/
         if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33)
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35)
                 if (!tp->dash_printer_enabled)
                         rtl8168_disable_ocp_phy_power_saving(dev);
 
@@ -4926,7 +5006,8 @@
                     tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
                     tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
                     tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                    tp->mcfg == CFG_METHOD_33) {
+                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                    tp->mcfg == CFG_METHOD_35) {
                         rtl8168_enable_cfg9346_write(tp);
                         RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En);
                         rtl8168_disable_cfg9346_write(tp);
@@ -4977,6 +5058,8 @@
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
                 case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                case CFG_METHOD_35:
                         RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7);
                         break;
                 }
@@ -4986,7 +5069,7 @@
         case CFG_METHOD_14 ... CFG_METHOD_15:
                 RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
                 break;
-        case CFG_METHOD_16 ... CFG_METHOD_33:
+        case CFG_METHOD_16 ... CFG_METHOD_34:
                 RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
                 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
                 break;
@@ -5020,6 +5103,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6);
                 break;
         }
@@ -5119,12 +5204,13 @@
 
         if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 //Disable Giga Lite
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
                 rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_9);
                 if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                    tp->mcfg == CFG_METHOD_33)
+                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34)
                         rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A40);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
@@ -5161,7 +5247,7 @@
                         giga_ctrl |= ADVERTISE_1000FULL;
 
                 //flow control
-                if (dev->mtu <= ETH_DATA_LEN)
+                if (dev->mtu <= ETH_DATA_LEN && tp->fcpause == rtl8168_fc_full)
                         auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM;
 
                 tp->phy_auto_nego_reg = auto_nego;
@@ -5697,6 +5783,45 @@
         spin_unlock_irqrestore(&tp->lock, flags);
 }
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+static void rtl8168_get_pauseparam(struct net_device *dev,
+                                   struct ethtool_pauseparam *pause)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        pause->autoneg = (tp->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
+        if (tp->fcpause == rtl8168_fc_rx_pause)
+                pause->rx_pause = 1;
+        else if (tp->fcpause == rtl8168_fc_tx_pause)
+                pause->tx_pause = 1;
+        else if (tp->fcpause == rtl8168_fc_full) {
+                pause->rx_pause = 1;
+                pause->tx_pause = 1;
+        }
+}
+
+static int rtl8168_set_pauseparam(struct net_device *dev,
+                                  struct ethtool_pauseparam *pause)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        enum rtl8168_fc_mode newfc;
+
+        if (pause->tx_pause || pause->rx_pause)
+                newfc = rtl8168_fc_full;
+        else
+                newfc = rtl8168_fc_none;
+
+        if (tp->fcpause != newfc) {
+                tp->fcpause = newfc;
+
+                rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+        }
+
+        return 0;
+
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+
 static u32
 rtl8168_get_msglevel(struct net_device *dev)
 {
@@ -5748,7 +5873,93 @@
                 return -EOPNOTSUPP;
         }
 }
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+
+static void
+rtl8168_wait_for_quiescence(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        synchronize_irq(dev->irq);
+
+        /* Wait for any pending NAPI task to complete */
+#ifdef CONFIG_R8168_NAPI
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        RTL_NAPI_DISABLE(dev, &tp->napi);
 #endif
+#endif //CONFIG_R8168_NAPI
+
+        rtl8168_irq_mask_and_ack(tp);
+
+#ifdef CONFIG_R8168_NAPI
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        RTL_NAPI_ENABLE(dev, &tp->napi);
+#endif
+#endif //CONFIG_R8168_NAPI
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+static void rtl8168_get_ringparam(struct net_device *dev,
+                                  struct ethtool_ringparam *ring,
+                                  struct kernel_ethtool_ringparam *kernel_ring,
+                                  struct netlink_ext_ack *extack)
+#else
+static void rtl8168_get_ringparam(struct net_device *dev,
+                                  struct ethtool_ringparam *ring)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        ring->rx_max_pending = MAX_NUM_TX_DESC;
+        ring->tx_max_pending = MAX_NUM_RX_DESC;;
+        ring->rx_pending = tp->num_rx_desc;
+        ring->tx_pending = tp->num_tx_desc;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+static int rtl8168_set_ringparam(struct net_device *dev,
+                                 struct ethtool_ringparam *ring,
+                                 struct kernel_ethtool_ringparam *kernel_ring,
+                                 struct netlink_ext_ack *extack)
+#else
+static int rtl8168_set_ringparam(struct net_device *dev,
+                                 struct ethtool_ringparam *ring)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 new_rx_count, new_tx_count;
+        int rc = 0;
+
+        if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
+                return -EINVAL;
+
+        new_tx_count = clamp_t(u32, ring->tx_pending,
+                               MIN_NUM_TX_DESC, MAX_NUM_TX_DESC);
+
+        new_rx_count = clamp_t(u32, ring->rx_pending,
+                               MIN_NUM_RX_DESC, MAX_NUM_RX_DESC);
+
+        if ((new_rx_count == tp->num_rx_desc) &&
+            (new_tx_count == tp->num_tx_desc)) {
+                /* nothing to do */
+                return 0;
+        }
+
+        if (netif_running(dev)) {
+                rtl8168_wait_for_quiescence(dev);
+                rtl8168_close(dev);
+        }
+
+        tp->num_rx_desc = new_rx_count;
+        tp->num_tx_desc = new_tx_count;
+
+        if (netif_running(dev))
+                rc = rtl8168_open(dev);
+
+        return rc;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
 static void
@@ -5808,11 +6019,11 @@
 {
         switch (stringset) {
         case ETH_SS_STATS:
-                memcpy(data, *rtl8168_gstrings, sizeof(rtl8168_gstrings));
+                memcpy(data, rtl8168_gstrings, sizeof(rtl8168_gstrings));
                 break;
         }
 }
-#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
 
 static int rtl_get_eeprom_len(struct net_device *dev)
 {
@@ -6030,6 +6241,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp |= BIT_1 | BIT_0;
                 rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
@@ -6053,6 +6266,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
                 rtl8168_set_eth_phy_bit(tp, 0x11, BIT_9);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
@@ -6069,6 +6284,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_oob_mutex_lock(tp);
                 break;
         }
@@ -6082,6 +6298,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_set_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6141,6 +6359,7 @@
                 break;
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
                 data &= ~(BIT_0);
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
@@ -6158,11 +6377,12 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
-                /*
+        case CFG_METHOD_34:
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data |= BIT_0;
+                data &= ~(BIT_0);
+                if (tp->HwPkgDet == 0x0F)
+                        data |= BIT_0;
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
-                */
 
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 data = rtl8168_mdio_read(tp, 0x10) | BIT_15;
@@ -6185,6 +6405,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_clear_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6196,6 +6418,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_oob_mutex_unlock(tp);
                 break;
         }
@@ -6301,6 +6524,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_1 | BIT_0);
                 rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
@@ -6321,6 +6546,7 @@
         switch (tp->mcfg) {
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
                 rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
@@ -6337,6 +6563,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_oob_mutex_lock(tp);
                 break;
         }
@@ -6350,6 +6577,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_set_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6386,6 +6615,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
                 data &= ~(BIT_0);
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
@@ -6410,6 +6641,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_clear_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6421,6 +6654,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_oob_mutex_unlock(tp);
                 break;
         }
@@ -6468,7 +6702,7 @@
         u16 val;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 break;
         default:
                 return -EOPNOTSUPP;
@@ -6515,7 +6749,7 @@
         unsigned long flags;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 break;
         default:
                 return -EOPNOTSUPP;
@@ -6553,14 +6787,22 @@
 static const struct ethtool_ops rtl8168_ethtool_ops = {
         .get_drvinfo        = rtl8168_get_drvinfo,
         .get_regs_len       = rtl8168_get_regs_len,
-        .get_link       = ethtool_op_get_link,
+        .get_link           = ethtool_op_get_link,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        .get_ringparam      = rtl8168_get_ringparam,
+        .set_ringparam      = rtl8168_set_ringparam,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
         .get_settings       = rtl8168_get_settings,
         .set_settings       = rtl8168_set_settings,
 #else
         .get_link_ksettings       = rtl8168_get_settings,
         .set_link_ksettings       = rtl8168_set_settings,
-#endif
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        .get_pauseparam     = rtl8168_get_pauseparam,
+        .set_pauseparam     = rtl8168_set_pauseparam,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
         .get_msglevel       = rtl8168_get_msglevel,
         .set_msglevel       = rtl8168_set_msglevel,
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
@@ -6573,8 +6815,8 @@
 #ifdef NETIF_F_TSO
         .get_tso        = ethtool_op_get_tso,
         .set_tso        = ethtool_op_set_tso,
-#endif
-#endif
+#endif //NETIF_F_TSO
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
         .get_regs       = rtl8168_get_regs,
         .get_wol        = rtl8168_get_wol,
         .set_wol        = rtl8168_set_wol,
@@ -6583,7 +6825,7 @@
         .get_stats_count    = rtl8168_get_stats_count,
 #else
         .get_sset_count     = rtl8168_get_sset_count,
-#endif
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
         .get_ethtool_stats  = rtl8168_get_ethtool_stats,
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
 #ifdef ETHTOOL_GPERMADDR
@@ -6663,6 +6905,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x8045);
                 rtl8168_mdio_write(tp, 0x14, 0x0000);
@@ -6741,6 +6985,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x8045);
                 rtl8168_mdio_write(tp, 0x14, 0x2444);
@@ -6936,6 +7182,10 @@
                         tp->HwIcVerUnknown = TRUE;
                 }
 
+                if (tp->mcfg == CFG_METHOD_30 &&
+                    (rtl8168_mac_ocp_read(tp, 0xD006) & 0xFF00) == 0x0100)
+                        tp->mcfg = CFG_METHOD_35;
+
                 tp->efuse_ver = EFUSE_SUPPORT_V3;
                 break;
         case 0x54800000:
@@ -6945,8 +7195,10 @@
                         tp->mcfg = CFG_METHOD_32;
                 } else if (ICVerID == 0x00300000) {
                         tp->mcfg = CFG_METHOD_33;
+                } else if (ICVerID == 0x00400000) {
+                        tp->mcfg = CFG_METHOD_34;
                 } else {
-                        tp->mcfg = CFG_METHOD_33;
+                        tp->mcfg = CFG_METHOD_34;
                         tp->HwIcVerUnknown = TRUE;
                 }
 
@@ -7184,73 +7436,191 @@
 
 static
 bool
-rtl8168_test_phy_ocp(struct rtl8168_private *tp)
+rtl8168_test_phy_ocp_v2(struct rtl8168_private *tp)
 {
         bool RestorePhyOcpReg = FALSE;
 
-        if (tp->TestPhyOcpReg == FALSE) goto exit;
+        u16 PhyRegValue;
+        u8 ResetPhyType = 0;
 
-        if (tp->HwSuppEsdVer == 2) {
-                u16 PhyRegValue;
-                u8 ResetPhyType = 0;
+        if (HW_PHY_STATUS_INI == rtl8168_get_phy_state(tp)) {
+                ResetPhyType = 1;
+        } else {
+                rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                if ((PhyRegValue & 0x03) != 0x00) {
+                        ResetPhyType = 2;
+                }
+        }
 
-                if (HW_PHY_STATUS_INI == rtl8168_get_phy_state(tp)) {
-                        ResetPhyType = 1;
-                } else {
+        if (ResetPhyType == 0) goto exit;
+
+        netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
+                  ResetPhyType);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        mdelay(24); //24ms
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+        if ((PhyRegValue & 0x03) != 0x00) {
+                u32 WaitCnt = 0;
+                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        mdelay(100);
                         rtl8168_mdio_write(tp, 0x1F, 0x0C40);
                         PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        if ((PhyRegValue & 0x03) != 0x00) {
-                                ResetPhyType = 2;
-                        }
+                        WaitCnt++;
                 }
+        }
 
-                if (ResetPhyType > 0) {
-                        u32 WaitCnt;
-                        struct net_device *dev = tp->dev;
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        printk(KERN_ERR "%s: test_phy_ocp ResetPhyType = 0x%02x\n.\n", dev->name, ResetPhyType);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
+        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
+        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
-                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        mdelay(24); //24ms
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
+
+        tp->HwHasWrRamCodeToMicroP = FALSE;
+
+        RestorePhyOcpReg = TRUE;
+
+exit:
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        return RestorePhyOcpReg;
+}
+
+static
+bool
+rtl8168_test_phy_ocp_v3(struct rtl8168_private *tp)
+{
+        bool RestorePhyOcpReg = FALSE;
+
+        u16 PhyRegValue;
+        u8 ResetPhyType = 0;
+        u8 watch_dog = 0;
+        u8 uc_response;
+        u8 nctl_pc_range_fail;
+        u8 nctl_pc_stuck_fail;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0B82);
+        uc_response = !!(rtl8168_mdio_read(tp, 0x10) & BIT_5);
+        rtl8168_mdio_write(tp, 0x1F, 0x0B84);
+        nctl_pc_range_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_1);
+        nctl_pc_stuck_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_2);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        if (uc_response || nctl_pc_range_fail || nctl_pc_stuck_fail) {
+                ResetPhyType = 3;
+        } else {
+                rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                if ((PhyRegValue & 0x03) != 0x00) {
+                        watch_dog = (u8)(PhyRegValue & 0x03);
+                        ResetPhyType = 2;
+                }
+        }
+
+        if (ResetPhyType == 0) goto exit;
+
+        netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
+                  ResetPhyType);
 
+        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        mdelay(24000); //24ms
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+        if ((PhyRegValue & 0x03) != 0x00) {
+                u32 WaitCnt = 0;
+                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        mdelay(100000);
                         rtl8168_mdio_write(tp, 0x1F, 0x0C40);
                         PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                        if ((PhyRegValue & 0x03) != 0x00) {
-                                WaitCnt = 0;
-                                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
-                                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
-                                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
-                                        mdelay(100);
-                                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                                        WaitCnt++;
-                                }
-                        }
+                        WaitCnt++;
+                }
+        }
 
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-                        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
-                        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
-                        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        //issue9
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
+        rtl8168_mdio_write(tp, 0x11, tp->BackupPhyFuseDout_31_16);
+        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
+        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
 
-                        tp->HwHasWrRamCodeToMicroP = FALSE;
+        //record fail case
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x801C);
+        PhyRegValue = 0;
+        PhyRegValue = watch_dog & 0x03;
+        PhyRegValue <<= 14;
+        if (uc_response) PhyRegValue |= BIT_13;
+        if (nctl_pc_range_fail) PhyRegValue |= BIT_12;
+        if (nctl_pc_stuck_fail) PhyRegValue |= BIT_11;
+        ClearAndSetEthPhyBit(tp,
+                             0x14,
+                             0xF800,
+                             PhyRegValue);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                        RestorePhyOcpReg = TRUE;
-                }
+        tp->HwHasWrRamCodeToMicroP = FALSE;
 
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        RestorePhyOcpReg = TRUE;
+
+exit:
+        //set uc_response to 1 and gphy should auto clear it.
+        rtl8168_mdio_write(tp, 0x1F, 0x0B82);
+        rtl8168_set_eth_phy_bit(tp, 0x10, BIT_5);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        return RestorePhyOcpReg;
+}
+
+static
+bool
+rtl8168_test_phy_ocp(struct rtl8168_private *tp)
+{
+        bool RestorePhyOcpReg = FALSE;
+
+        if (tp->TestPhyOcpReg == FALSE) goto exit;
+
+        switch (tp->HwSuppEsdVer) {
+        case 2:
+                RestorePhyOcpReg = rtl8168_test_phy_ocp_v2(tp);
+                break;
+        case 3:
+                RestorePhyOcpReg = rtl8168_test_phy_ocp_v3(tp);
+                break;
+        default:
+                break;
         }
 
 exit:
@@ -7387,11 +7757,13 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_eri_write(tp, 0x174, 2, 0x00FF, ERIAR_ExGMAC);
                 rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
                 break;
         case CFG_METHOD_29:
-        case CFG_METHOD_30: {
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:    {
                 u32 csi_tmp;
                 csi_tmp = rtl8168_eri_read(tp, 0x174, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_8);
@@ -7427,6 +7799,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_disable_now_is_oob(tp);
 
                 data16 = rtl8168_mac_ocp_read(tp, 0xE8DE) & ~BIT_14;
@@ -7449,7 +7823,7 @@
 
 #ifdef ENABLE_FIBER_SUPPORT
         if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_hw_init_fiber_nic(dev);
+                rtl8168_hw_init_fiber_nic(tp);
 #endif //ENABLE_FIBER_SUPPORT
 }
 
@@ -7470,6 +7844,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
                 break;
         }
@@ -7488,6 +7864,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
                 rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0000);
                 rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
@@ -8469,13 +8847,23 @@
         rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0763);
 }
 
+static bool
+rtl8168_check_dash_other_fun_present(struct rtl8168_private *tp)
+{
+        //check if func 2 exist
+        if (rtl8168_csi_other_fun_read(tp, 2, 0x00) != 0xffffffff)
+                return true;
+
+        return false;
+}
+
 static void
 rtl8168_set_mac_mcu_8168ep_2(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
         u16 i;
         static const u16 mcu_patch_code_8168ep_2 = {
-                0xE008, 0xE017, 0xE052, 0xE056, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xC50F,
+                0xE008, 0xE017, 0xE052, 0xE057, 0xE059, 0xE05B, 0xE05D, 0xE05F, 0xC50F,
                 0x76A4, 0x49E3, 0xF007, 0x49C0, 0xF103, 0xC607, 0xBE00, 0xC606, 0xBE00,
                 0xC602, 0xBE00, 0x0BDA, 0x0BB6, 0x0BBA, 0xDC00, 0xB400, 0xB401, 0xB402,
                 0xB403, 0xB404, 0xC02E, 0x7206, 0x49AE, 0xF1FE, 0xC12B, 0x9904, 0xC12A,
@@ -8484,9 +8872,9 @@
                 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x990A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE,
                 0xF1FE, 0xFF80, 0xB004, 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002,
                 0xB800, 0x1FC8, 0xE000, 0xE8E0, 0xF128, 0x0002, 0xFFFF, 0xF000, 0x8001,
-                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x0490, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x0490,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
         };
 
         rtl8168_hw_disable_mac_mcu_bps(dev);
@@ -8498,17 +8886,24 @@
         rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
 
         rtl8168_mac_ocp_write(tp, 0xFC28, 0x0BB3);
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x1FC7);
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0485);
+        if (false == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x1FC7);
+        //rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0485);
 }
 
 static void
 rtl8168_set_mac_mcu_8168h_1(struct net_device *dev)
 {
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_2(struct net_device *dev)
+{
         struct rtl8168_private *tp = netdev_priv(dev);
         u16 i;
         static const u16 mcu_patch_code_8168h_1 = {
-                0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE079, 0xC707,
+                0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE07A, 0xC707,
                 0x1D00, 0x8DE2, 0x48C1, 0xC502, 0xBD00, 0x00E4, 0xE0C0, 0xC502, 0xBD00,
                 0x0216, 0xC634, 0x75C0, 0x49D3, 0xF027, 0xC631, 0x75C0, 0x49D3, 0xF123,
                 0xC627, 0x75C0, 0xB405, 0xC525, 0x9DC0, 0xC621, 0x75C8, 0x49D5, 0xF00A,
@@ -8521,8 +8916,8 @@
                 0xC71C, 0xC419, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE,
                 0xC412, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE, 0xC70C,
                 0x74F8, 0x48C3, 0x8CF8, 0xB004, 0xB007, 0xC502, 0xBD00, 0x0F24, 0x0481,
-                0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0xC502,
-                0xBD00, 0x0578, 0xC602, 0xBE00, 0x0000
+                0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0x9C46,
+                0xC402, 0xBC00, 0x0578, 0xC602, 0xBE00, 0x0000
         };
 
         rtl8168_hw_disable_mac_mcu_bps(dev);
@@ -8539,9 +8934,15 @@
         rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0B26);
         rtl8168_mac_ocp_write(tp, 0xFC30, 0x0F02);
         rtl8168_mac_ocp_write(tp, 0xFC32, 0x0CA0);
-        rtl8168_mac_ocp_write(tp, 0xFC34, 0x056C);
+        //rtl8168_mac_ocp_write(tp, 0xFC34, 0x056C);
+
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x003F);
+}
 
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x007F);
+static void
+rtl8168_set_mac_mcu_8168h_3(struct net_device *dev)
+{
+        rtl8168_hw_disable_mac_mcu_bps(dev);
 }
 
 static void
@@ -8679,13 +9080,41 @@
 }
 
 static void
-rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
+rtl8168_set_mac_mcu_8168fp_8116as_2(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
         u16 i;
-        static const u16 mcu_patch_code_8168fp_2 = {
-                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE063, 0xE065, 0xE067, 0xC602,
+        static const u16 mcu_patch_code_8168fp_8116as_2 = {
+                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE016, 0xE018, 0xE01A, 0xE01C, 0xC602,
                 0xBE00, 0x2AB2, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
+                0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xC602, 0xBE00, 0x0000, 0xC602,
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+                0xBE00, 0x0000
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_8116as_2); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_8116as_2i);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC);
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
+
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0007);
+}
+
+static void
+_rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168fp_2 = {
+                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE064, 0xE066, 0xE068, 0xC602,
+                0xBE00, 0x0000, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
                 0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xB400, 0xB401, 0xB402, 0xB403,
                 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE, 0xC137, 0x9904, 0xC136,
                 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF10B, 0xC52F, 0xC12E,
@@ -8695,8 +9124,8 @@
                 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004, 0xB003, 0xB002, 0xB001,
                 0xB000, 0xC604, 0xC002, 0xB800, 0x2A5E, 0xE000, 0xE8E0, 0xF128, 0x3DC2,
                 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000, 0x8002, 0x8004, 0x8007,
-                0x48C1, 0x48C2, 0xC502, 0xBD00, 0x07BC, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+                0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC, 0xC602, 0xBE00, 0x0000,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
         };
 
         rtl8168_hw_disable_mac_mcu_bps(dev);
@@ -8711,13 +9140,21 @@
         rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
         rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
         rtl8168_mac_ocp_write(tp, 0xFC2E, 0x2A5C);
-        rtl8168_mac_ocp_write(tp, 0xFC30, 0x07B0);
+        //rtl8168_mac_ocp_write(tp, 0xFC30, 0x07B0);
 
-        if (tp->HwSuppSerDesPhyVer == 1)
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x001F);
+        if (true == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0006);
         else
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x001E);
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x000E);
+}
 
+static void
+rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->HwSuppSerDesPhyVer == 1) rtl8168_set_mac_mcu_8168fp_8116as_2(dev);
+        else _rtl8168_set_mac_mcu_8168fp_2(dev);
 }
 
 static void
@@ -8726,7 +9163,7 @@
         struct rtl8168_private *tp = netdev_priv(dev);
         u16 i;
         static const u16 mcu_patch_code_8168fp_3 = {
-                0xE008, 0xE053, 0xE057, 0xE059, 0xE05B, 0xE05D, 0xE05F, 0xE061, 0xB400,
+                0xE008, 0xE053, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xB400,
                 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE,
                 0xC137, 0x9904, 0xC136, 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0,
                 0xF10B, 0xC52F, 0xC12E, 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330,
@@ -8735,9 +9172,9 @@
                 0x9D0A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004,
                 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002, 0xB800, 0x2B16, 0xE000,
                 0xE8E0, 0xF128, 0x3DC2, 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000,
-                0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x07BC, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+                0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
         };
 
         rtl8168_hw_disable_mac_mcu_bps(dev);
@@ -8749,9 +9186,12 @@
         rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
 
         rtl8168_mac_ocp_write(tp, 0xFC28, 0x2B14);
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x07B0);
+        //rtl8168_mac_ocp_write(tp, 0xFC2A, 0x07B0);
 
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0003);
+        if (true == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
+        else
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0001);
 }
 
 static void
@@ -8781,9 +9221,11 @@
                 rtl8168_set_mac_mcu_8168ep_2(dev);
                 break;
         case CFG_METHOD_29:
-        case CFG_METHOD_30:
                 rtl8168_set_mac_mcu_8168h_1(dev);
                 break;
+        case CFG_METHOD_30:
+                rtl8168_set_mac_mcu_8168h_2(dev);
+                break;
         case CFG_METHOD_31:
                 rtl8168_set_mac_mcu_8168fp_1(dev);
                 break;
@@ -8791,8 +9233,12 @@
                 rtl8168_set_mac_mcu_8168fp_2(dev);
                 break;
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_set_mac_mcu_8168fp_3(dev);
                 break;
+        case CFG_METHOD_35:
+                rtl8168_set_mac_mcu_8168h_3(dev);
+                break;
         }
 }
 #endif
@@ -8852,6 +9298,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_3 | BIT_2 | BIT_1));
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) | (BIT_0));
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_0));
@@ -8893,6 +9341,7 @@
         case CFG_METHOD_22:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 if (aspm) {
                         if ((rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3) || (RTL_R8(tp, Config0) & 0x07)) {
                                 RTL_W8(tp, 0x6E, RTL_R8(tp, 0x6E) | BIT_6);
@@ -8915,7 +9364,8 @@
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33)
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35)
                 if (!tp->dash_printer_enabled)
                         rtl8168_disable_ocp_phy_power_saving(dev);
 
@@ -9283,6 +9733,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 ClearAndSetPCIePhyBit(tp,
                                       0x19,
                                       BIT_6,
@@ -9299,6 +9750,12 @@
                 ClearPCIePhyBit(tp, 0x0B, BIT_0);
 
                 break;
+        case CFG_METHOD_35:
+                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
+
+                rtl8168_set_mcu_ocp_bit(tp, 0xDE38, (BIT_2));
+
+                break;
         }
 }
 
@@ -9310,7 +9767,7 @@
         int retval = TRUE;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 rtl8168_mdio_write(tp,0x1f, 0x0B82);
                 rtl8168_set_eth_phy_bit(tp, 0x10, BIT_4);
 
@@ -9339,7 +9796,7 @@
         int retval = TRUE;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_33:
+        case CFG_METHOD_21 ... CFG_METHOD_34:
                 rtl8168_mdio_write(tp, 0x1f, 0x0B82);
                 rtl8168_clear_eth_phy_bit(tp, 0x10, BIT_4);
 
@@ -9396,6 +9853,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x801E);
                 hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14);
@@ -9502,6 +9961,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x801E);
                 rtl8168_mdio_write(tp, 0x14, tp->sw_ram_code_ver);
@@ -20756,6 +21217,536 @@
 }
 
 static void
+rtl8168_set_phy_mcu_8168h_3(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8042);
+        rtl8168_mdio_write(tp, 0x14, 0x3800);
+        rtl8168_mdio_write(tp, 0x13, 0xB82E);
+        rtl8168_mdio_write(tp, 0x14, 0x0001);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0090);
+        rtl8168_mdio_write(tp, 0x13, 0xA016);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA012);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA014);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8002);
+        rtl8168_mdio_write(tp, 0x14, 0x2b5d);
+        rtl8168_mdio_write(tp, 0x14, 0x0c68);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x0b3c);
+        rtl8168_mdio_write(tp, 0x13, 0xA000);
+        rtl8168_mdio_write(tp, 0x14, 0x0b3a);
+        rtl8168_mdio_write(tp, 0x13, 0xA008);
+        rtl8168_mdio_write(tp, 0x14, 0x0100);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0010);
+
+
+        rtl8168_mdio_write(tp, 0x13, 0x83f3);
+        rtl8168_mdio_write(tp, 0x14, 0xaf84);
+        rtl8168_mdio_write(tp, 0x14, 0x0baf);
+        rtl8168_mdio_write(tp, 0x14, 0x8466);
+        rtl8168_mdio_write(tp, 0x14, 0xaf84);
+        rtl8168_mdio_write(tp, 0x14, 0xcdaf);
+        rtl8168_mdio_write(tp, 0x14, 0x8736);
+        rtl8168_mdio_write(tp, 0x14, 0xaf87);
+        rtl8168_mdio_write(tp, 0x14, 0x39af);
+        rtl8168_mdio_write(tp, 0x14, 0x8739);
+        rtl8168_mdio_write(tp, 0x14, 0xaf87);
+        rtl8168_mdio_write(tp, 0x14, 0x39af);
+        rtl8168_mdio_write(tp, 0x14, 0x8739);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfb89);
+        rtl8168_mdio_write(tp, 0x14, 0xe987);
+        rtl8168_mdio_write(tp, 0x14, 0xffd7);
+        rtl8168_mdio_write(tp, 0x14, 0x0017);
+        rtl8168_mdio_write(tp, 0x14, 0xd400);
+        rtl8168_mdio_write(tp, 0x14, 0x051c);
+        rtl8168_mdio_write(tp, 0x14, 0x421a);
+        rtl8168_mdio_write(tp, 0x14, 0x741b);
+        rtl8168_mdio_write(tp, 0x14, 0x97e9);
+        rtl8168_mdio_write(tp, 0x14, 0x87fe);
+        rtl8168_mdio_write(tp, 0x14, 0xffef);
+        rtl8168_mdio_write(tp, 0x14, 0x97e0);
+        rtl8168_mdio_write(tp, 0x14, 0x82aa);
+        rtl8168_mdio_write(tp, 0x14, 0xa000);
+        rtl8168_mdio_write(tp, 0x14, 0x08ef);
+        rtl8168_mdio_write(tp, 0x14, 0x46dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x37a0);
+        rtl8168_mdio_write(tp, 0x14, 0x012d);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0xa7ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2013);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xffe1);
+        rtl8168_mdio_write(tp, 0x14, 0x87fe);
+        rtl8168_mdio_write(tp, 0x14, 0xac27);
+        rtl8168_mdio_write(tp, 0x14, 0x05a1);
+        rtl8168_mdio_write(tp, 0x14, 0x0807);
+        rtl8168_mdio_write(tp, 0x14, 0xae0f);
+        rtl8168_mdio_write(tp, 0x14, 0xa107);
+        rtl8168_mdio_write(tp, 0x14, 0x02ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0aef);
+        rtl8168_mdio_write(tp, 0x14, 0x4619);
+        rtl8168_mdio_write(tp, 0x14, 0x19dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x37d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x19dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x3719);
+        rtl8168_mdio_write(tp, 0x14, 0x19ae);
+        rtl8168_mdio_write(tp, 0x14, 0xcfbf);
+        rtl8168_mdio_write(tp, 0x14, 0x8763);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc3c);
+        rtl8168_mdio_write(tp, 0x14, 0x0005);
+        rtl8168_mdio_write(tp, 0x14, 0xaaf5);
+        rtl8168_mdio_write(tp, 0x14, 0x0249);
+        rtl8168_mdio_write(tp, 0x14, 0xcaef);
+        rtl8168_mdio_write(tp, 0x14, 0x67d7);
+        rtl8168_mdio_write(tp, 0x14, 0x0014);
+        rtl8168_mdio_write(tp, 0x14, 0x0249);
+        rtl8168_mdio_write(tp, 0x14, 0xe5ad);
+        rtl8168_mdio_write(tp, 0x14, 0x50f7);
+        rtl8168_mdio_write(tp, 0x14, 0xd400);
+        rtl8168_mdio_write(tp, 0x14, 0x01bf);
+        rtl8168_mdio_write(tp, 0x14, 0x46a7);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0x98bf);
+        rtl8168_mdio_write(tp, 0x14, 0x465c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fd4);
+        rtl8168_mdio_write(tp, 0x14, 0x0003);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x7502);
+        rtl8168_mdio_write(tp, 0x14, 0x4498);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x7202);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6602);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6902);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0xf7bf);
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcad);
+        rtl8168_mdio_write(tp, 0x14, 0x28f7);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xbf46);
+        rtl8168_mdio_write(tp, 0x14, 0x5c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x21af);
+        rtl8168_mdio_write(tp, 0x14, 0x020e);
+        rtl8168_mdio_write(tp, 0x14, 0xee82);
+        rtl8168_mdio_write(tp, 0x14, 0x5000);
+        rtl8168_mdio_write(tp, 0x14, 0x0284);
+        rtl8168_mdio_write(tp, 0x14, 0xdd02);
+        rtl8168_mdio_write(tp, 0x14, 0x8521);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0x36af);
+        rtl8168_mdio_write(tp, 0x14, 0x03d2);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef59);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x3002);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0x3c00);
+        rtl8168_mdio_write(tp, 0x14, 0x03aa);
+        rtl8168_mdio_write(tp, 0x14, 0x2cbf);
+        rtl8168_mdio_write(tp, 0x14, 0x8769);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcad);
+        rtl8168_mdio_write(tp, 0x14, 0x2823);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6f02);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0x1a02);
+        rtl8168_mdio_write(tp, 0x14, 0x49ca);
+        rtl8168_mdio_write(tp, 0x14, 0xef67);
+        rtl8168_mdio_write(tp, 0x14, 0xd700);
+        rtl8168_mdio_write(tp, 0x14, 0x0202);
+        rtl8168_mdio_write(tp, 0x14, 0x49e5);
+        rtl8168_mdio_write(tp, 0x14, 0xad50);
+        rtl8168_mdio_write(tp, 0x14, 0xf7bf);
+        rtl8168_mdio_write(tp, 0x14, 0x876c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fbf);
+        rtl8168_mdio_write(tp, 0x14, 0x876c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x56ef);
+        rtl8168_mdio_write(tp, 0x14, 0x95ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x15ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2406);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6002);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xf9e1);
+        rtl8168_mdio_write(tp, 0x14, 0x87fa);
+        rtl8168_mdio_write(tp, 0x14, 0x1b10);
+        rtl8168_mdio_write(tp, 0x14, 0x9f1e);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xf900);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x15ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2606);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xf700);
+        rtl8168_mdio_write(tp, 0x14, 0xae12);
+        rtl8168_mdio_write(tp, 0x14, 0x0286);
+        rtl8168_mdio_write(tp, 0x14, 0x9702);
+        rtl8168_mdio_write(tp, 0x14, 0x8565);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0x9d02);
+        rtl8168_mdio_write(tp, 0x14, 0x865a);
+        rtl8168_mdio_write(tp, 0x14, 0xae04);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69fa);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x3002);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xa103);
+        rtl8168_mdio_write(tp, 0x14, 0x22e0);
+        rtl8168_mdio_write(tp, 0x14, 0x87eb);
+        rtl8168_mdio_write(tp, 0x14, 0xe187);
+        rtl8168_mdio_write(tp, 0x14, 0xecef);
+        rtl8168_mdio_write(tp, 0x14, 0x64bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8748);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46aa);
+        rtl8168_mdio_write(tp, 0x14, 0x0abf);
+        rtl8168_mdio_write(tp, 0x14, 0x874b);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46ab);
+        rtl8168_mdio_write(tp, 0x14, 0x06bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8745);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5ffe);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xef59);
+        rtl8168_mdio_write(tp, 0x14, 0xf9bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4530);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdca1);
+        rtl8168_mdio_write(tp, 0x14, 0x0310);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2605);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0xc9ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0d02);
+        rtl8168_mdio_write(tp, 0x14, 0x860d);
+        rtl8168_mdio_write(tp, 0x14, 0xae08);
+        rtl8168_mdio_write(tp, 0x14, 0xe287);
+        rtl8168_mdio_write(tp, 0x14, 0xf7f6);
+        rtl8168_mdio_write(tp, 0x14, 0x36e6);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xfdef);
+        rtl8168_mdio_write(tp, 0x14, 0x95fd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfbbf);
+        rtl8168_mdio_write(tp, 0x14, 0x8748);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x64e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xea1b);
+        rtl8168_mdio_write(tp, 0x14, 0x659e);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe587);
+        rtl8168_mdio_write(tp, 0x14, 0xeae2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf636);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ae);
+        rtl8168_mdio_write(tp, 0x14, 0x13e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf736);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf702);
+        rtl8168_mdio_write(tp, 0x14, 0x49ca);
+        rtl8168_mdio_write(tp, 0x14, 0xef57);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xe7e7);
+        rtl8168_mdio_write(tp, 0x14, 0x87e8);
+        rtl8168_mdio_write(tp, 0x14, 0xffef);
+        rtl8168_mdio_write(tp, 0x14, 0x97ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfbe2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e7);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xe8ef);
+        rtl8168_mdio_write(tp, 0x14, 0x65e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87fb);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xfcef);
+        rtl8168_mdio_write(tp, 0x14, 0x7502);
+        rtl8168_mdio_write(tp, 0x14, 0x49e5);
+        rtl8168_mdio_write(tp, 0x14, 0xac50);
+        rtl8168_mdio_write(tp, 0x14, 0x1abf);
+        rtl8168_mdio_write(tp, 0x14, 0x8748);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x64e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xea1b);
+        rtl8168_mdio_write(tp, 0x14, 0x659e);
+        rtl8168_mdio_write(tp, 0x14, 0x16e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe587);
+        rtl8168_mdio_write(tp, 0x14, 0xeaae);
+        rtl8168_mdio_write(tp, 0x14, 0x06bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8745);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fe2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf636);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ff);
+        rtl8168_mdio_write(tp, 0x14, 0xef97);
+        rtl8168_mdio_write(tp, 0x14, 0xfffe);
+        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x3f02);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0x29bf);
+        rtl8168_mdio_write(tp, 0x14, 0x873c);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x54bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8739);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcac);
+        rtl8168_mdio_write(tp, 0x14, 0x290d);
+        rtl8168_mdio_write(tp, 0x14, 0xac28);
+        rtl8168_mdio_write(tp, 0x14, 0x05a3);
+        rtl8168_mdio_write(tp, 0x14, 0x020c);
+        rtl8168_mdio_write(tp, 0x14, 0xae10);
+        rtl8168_mdio_write(tp, 0x14, 0xa303);
+        rtl8168_mdio_write(tp, 0x14, 0x07ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0ba3);
+        rtl8168_mdio_write(tp, 0x14, 0x0402);
+        rtl8168_mdio_write(tp, 0x14, 0xae06);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x4502);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xfae0);
+        rtl8168_mdio_write(tp, 0x14, 0x8015);
+        rtl8168_mdio_write(tp, 0x14, 0xad25);
+        rtl8168_mdio_write(tp, 0x14, 0x41d2);
+        rtl8168_mdio_write(tp, 0x14, 0x0002);
+        rtl8168_mdio_write(tp, 0x14, 0x86ed);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xebe1);
+        rtl8168_mdio_write(tp, 0x14, 0x87ec);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xab26);
+        rtl8168_mdio_write(tp, 0x14, 0xd40b);
+        rtl8168_mdio_write(tp, 0x14, 0xff1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46aa);
+        rtl8168_mdio_write(tp, 0x14, 0x1fac);
+        rtl8168_mdio_write(tp, 0x14, 0x3204);
+        rtl8168_mdio_write(tp, 0x14, 0xef32);
+        rtl8168_mdio_write(tp, 0x14, 0xae02);
+        rtl8168_mdio_write(tp, 0x14, 0xd304);
+        rtl8168_mdio_write(tp, 0x14, 0x0c31);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0xeb1a);
+        rtl8168_mdio_write(tp, 0x14, 0x93d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xab0e);
+        rtl8168_mdio_write(tp, 0x14, 0x19d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xaa06);
+        rtl8168_mdio_write(tp, 0x14, 0x12a2);
+        rtl8168_mdio_write(tp, 0x14, 0x08c9);
+        rtl8168_mdio_write(tp, 0x14, 0xae06);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x4202);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xfeef);
+        rtl8168_mdio_write(tp, 0x14, 0x96ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xa200);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8748);
+        rtl8168_mdio_write(tp, 0x14, 0xae33);
+        rtl8168_mdio_write(tp, 0x14, 0xa201);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x874b);
+        rtl8168_mdio_write(tp, 0x14, 0xae2b);
+        rtl8168_mdio_write(tp, 0x14, 0xa202);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x874e);
+        rtl8168_mdio_write(tp, 0x14, 0xae23);
+        rtl8168_mdio_write(tp, 0x14, 0xa203);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8751);
+        rtl8168_mdio_write(tp, 0x14, 0xae1b);
+        rtl8168_mdio_write(tp, 0x14, 0xa204);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8754);
+        rtl8168_mdio_write(tp, 0x14, 0xae13);
+        rtl8168_mdio_write(tp, 0x14, 0xa205);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8757);
+        rtl8168_mdio_write(tp, 0x14, 0xae0b);
+        rtl8168_mdio_write(tp, 0x14, 0xa206);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x875a);
+        rtl8168_mdio_write(tp, 0x14, 0xae03);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x5d02);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xef64);
+        rtl8168_mdio_write(tp, 0x14, 0xef97);
+        rtl8168_mdio_write(tp, 0x14, 0xfffc);
+        rtl8168_mdio_write(tp, 0x14, 0x04af);
+        rtl8168_mdio_write(tp, 0x14, 0x00ed);
+        rtl8168_mdio_write(tp, 0x14, 0x54a4);
+        rtl8168_mdio_write(tp, 0x14, 0x3474);
+        rtl8168_mdio_write(tp, 0x14, 0xa600);
+        rtl8168_mdio_write(tp, 0x14, 0x22a4);
+        rtl8168_mdio_write(tp, 0x14, 0x3411);
+        rtl8168_mdio_write(tp, 0x14, 0xb842);
+        rtl8168_mdio_write(tp, 0x14, 0x22b8);
+        rtl8168_mdio_write(tp, 0x14, 0x42f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa200);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x02f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa204);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x06f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa208);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x0af0);
+        rtl8168_mdio_write(tp, 0x14, 0xa20c);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x0e55);
+        rtl8168_mdio_write(tp, 0x14, 0xb820);
+        rtl8168_mdio_write(tp, 0x14, 0xd9c6);
+        rtl8168_mdio_write(tp, 0x14, 0x08aa);
+        rtl8168_mdio_write(tp, 0x14, 0xc430);
+        rtl8168_mdio_write(tp, 0x14, 0x00c6);
+        rtl8168_mdio_write(tp, 0x14, 0x1433);
+        rtl8168_mdio_write(tp, 0x14, 0xc41a);
+        rtl8168_mdio_write(tp, 0x14, 0x88c4);
+        rtl8168_mdio_write(tp, 0x14, 0x2e22);
+        rtl8168_mdio_write(tp, 0x14, 0xc42e);
+        rtl8168_mdio_write(tp, 0x14, 0x54c4);
+        rtl8168_mdio_write(tp, 0x14, 0x1a00);
+        rtl8168_mdio_write(tp, 0x13, 0xb818);
+        rtl8168_mdio_write(tp, 0x14, 0x1a01);
+        rtl8168_mdio_write(tp, 0x13, 0xb81a);
+        rtl8168_mdio_write(tp, 0x14, 0x020b);
+        rtl8168_mdio_write(tp, 0x13, 0xb81c);
+        rtl8168_mdio_write(tp, 0x14, 0x03ce);
+        rtl8168_mdio_write(tp, 0x13, 0xb81e);
+        rtl8168_mdio_write(tp, 0x14, 0x00e7);
+        rtl8168_mdio_write(tp, 0x13, 0xb846);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb848);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb84a);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb84c);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb832);
+        rtl8168_mdio_write(tp, 0x14, 0x000f);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8042);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+
+        if (tp->RequiredSecLanDonglePatch) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                gphy_val = rtl8168_mdio_read(tp, 0x11);
+                gphy_val &= ~BIT_6;
+                rtl8168_mdio_write(tp, 0x11, gphy_val);
+        }
+}
+
+static void
 rtl8168_init_hw_phy_mcu(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
@@ -20815,6 +21806,9 @@
         case CFG_METHOD_30:
                 rtl8168_set_phy_mcu_8168h_2(dev);
                 break;
+        case CFG_METHOD_35:
+                rtl8168_set_phy_mcu_8168h_3(dev);
+                break;
         }
 
         if (require_disable_phy_disable_mode)
@@ -23148,7 +24142,7 @@
                         }
                 }
         } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33) {
+                   tp->mcfg == CFG_METHOD_33 ||  tp->mcfg == CFG_METHOD_34) {
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x808E);
                 ClearAndSetEthPhyBit( tp,
@@ -23302,11 +24296,134 @@
                                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
                         }
                 }
+        } else if (tp->mcfg == CFG_METHOD_35) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A4C);
+                rtl8168_clear_eth_phy_bit(tp, 0x15, (BIT_14 | BIT_13));
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x81B9);
+                rtl8168_mdio_write(tp, 0x14, 0x2000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x81D4);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x6600);
+                rtl8168_mdio_write(tp, 0x13, 0x81CB);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x3500);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A80);
+                ClearAndSetEthPhyBit(tp,
+                                     0x16,
+                                     0x000F,
+                                     0x0005);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8016);
+                rtl8168_set_eth_phy_bit(tp, 0x14, BIT_13);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x811E);
+                rtl8168_mdio_write(tp, 0x14, 0xDECA);
+
+                rtl8168_mdio_write(tp, 0x13, 0x811C);
+                rtl8168_mdio_write(tp, 0x14, 0x8008);
+                rtl8168_mdio_write(tp, 0x13, 0x8118);
+                rtl8168_mdio_write(tp, 0x14, 0xF8B4);
+                rtl8168_mdio_write(tp, 0x13, 0x811A);
+                rtl8168_mdio_write(tp, 0x14, 0x1A04);
+
+                rtl8168_mdio_write(tp, 0x13, 0x8134);
+                rtl8168_mdio_write(tp, 0x14, 0xDECA);
+                rtl8168_mdio_write(tp, 0x13, 0x8132);
+                rtl8168_mdio_write(tp, 0x14, 0xA008);
+                rtl8168_mdio_write(tp, 0x13, 0x812E);
+                rtl8168_mdio_write(tp, 0x14, 0x00B5);
+                rtl8168_mdio_write(tp, 0x13, 0x8130);
+                rtl8168_mdio_write(tp, 0x14, 0x1A04);
+
+                rtl8168_mdio_write(tp, 0x13, 0x8112);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x7300);
+                rtl8168_mdio_write(tp, 0x13, 0x8106);
+                rtl8168_mdio_write(tp, 0x14, 0xA209);
+                rtl8168_mdio_write(tp, 0x13, 0x8108);
+                rtl8168_mdio_write(tp, 0x14, 0x13B0);
+                rtl8168_mdio_write(tp, 0x13, 0x8103);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xF800,
+                                     0xB800);
+                rtl8168_mdio_write(tp, 0x13, 0x8105);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x0A00);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x87EB);
+                rtl8168_mdio_write(tp, 0x14, 0x0018);
+                rtl8168_mdio_write(tp, 0x13, 0x87EB);
+                rtl8168_mdio_write(tp, 0x14, 0x0018);
+                rtl8168_mdio_write(tp, 0x13, 0x87ED);
+                rtl8168_mdio_write(tp, 0x14, 0x0733);
+                rtl8168_mdio_write(tp, 0x13, 0x87EF);
+                rtl8168_mdio_write(tp, 0x14, 0x08DC);
+                rtl8168_mdio_write(tp, 0x13, 0x87F1);
+                rtl8168_mdio_write(tp, 0x14, 0x08DF);
+                rtl8168_mdio_write(tp, 0x13, 0x87F3);
+                rtl8168_mdio_write(tp, 0x14, 0x0C79);
+                rtl8168_mdio_write(tp, 0x13, 0x87F5);
+                rtl8168_mdio_write(tp, 0x14, 0x0D93);
+                rtl8168_mdio_write(tp, 0x13, 0x87F9);
+                rtl8168_mdio_write(tp, 0x14, 0x0010);
+                rtl8168_mdio_write(tp, 0x13, 0x87FB);
+                rtl8168_mdio_write(tp, 0x14, 0x0800);
+                rtl8168_mdio_write(tp, 0x13, 0x8015);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0x7000,
+                                     0x7000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8111);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x7C00);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
+                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        }
+                }
         }
 
 #ifdef ENABLE_FIBER_SUPPORT
         if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_hw_fiber_phy_config(dev);
+                rtl8168_hw_fiber_phy_config(tp);
 #endif //ENABLE_FIBER_SUPPORT
 
         //EthPhyPPSW
@@ -23326,7 +24443,8 @@
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
         } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33) {
+                   tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                   tp->mcfg == CFG_METHOD_35) {
                 //enable EthPhyPPSW
                 rtl8168_mdio_write(tp, 0x1F, 0x0A44);
                 rtl8168_set_eth_phy_bit( tp, 0x11, BIT_7 );
@@ -23338,7 +24456,8 @@
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 if (aspm)
                         rtl8168_enable_ocp_phy_power_saving(dev);
         }
@@ -23441,6 +24560,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->bios_setting = RTL_R32(tp, 0x8c);
                 break;
         }
@@ -23477,6 +24598,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W32(tp, 0x8C, tp->bios_setting);
                 break;
         }
@@ -23490,6 +24613,9 @@
 
         rtl8168_get_bios_setting(dev);
 
+        tp->num_rx_desc = NUM_RX_DESC;
+        tp->num_tx_desc = NUM_TX_DESC;
+
         switch (tp->mcfg) {
         case CFG_METHOD_11:
         case CFG_METHOD_12:
@@ -23504,6 +24630,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->HwSuppDashVer = 3;
                 break;
         default:
@@ -23515,6 +24642,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->HwPkgDet = rtl8168_mac_ocp_read(tp, 0xDC00);
                 tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x0F;
                 break;
@@ -23537,6 +24665,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppNowIsOobVer = 1;
                 break;
         }
@@ -23555,6 +24685,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppPhyOcpVer = 1;
                 break;
         }
@@ -23565,6 +24697,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppUpsVer = 1;
                 break;
         }
@@ -23573,6 +24707,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->HwPcieSNOffset = 0x16C;
                 break;
         case CFG_METHOD_DEFAULT:
@@ -23604,6 +24739,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppAspmClkIntrLock = 1;
                 break;
         }
@@ -23707,6 +24844,8 @@
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
                 case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                case CFG_METHOD_35:
                         tp->org_pci_offset_99 = rtl8168_csi_fun0_read_byte(tp, 0x99);
                         tp->org_pci_offset_99 &= ~(BIT_5|BIT_6);
                         break;
@@ -23719,11 +24858,13 @@
                 case CFG_METHOD_28:
                 case CFG_METHOD_29:
                 case CFG_METHOD_30:
+                case CFG_METHOD_35:
                         tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x180);
                         break;
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
                 case CFG_METHOD_33:
+                case CFG_METHOD_34:
                         tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x214);
                         break;
                 }
@@ -23736,6 +24877,10 @@
                 case CFG_METHOD_25:
                 case CFG_METHOD_27:
                 case CFG_METHOD_28:
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
                         if (tp->org_pci_offset_99 & BIT_2)
                                 tp->issue_offset_99_event = TRUE;
                         break;
@@ -23819,7 +24964,8 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-        case CFG_METHOD_33: {
+        case CFG_METHOD_33:
+        case CFG_METHOD_34: {
                 u16 rg_saw_cnt;
 
                 rtl8168_mdio_write(tp, 0x1F, 0x0C42);
@@ -23827,7 +24973,7 @@
                 rg_saw_cnt &= ~(BIT_15|BIT_14);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
 
-                if ( rg_saw_cnt > 0) {
+                if (rg_saw_cnt > 0) {
                         tp->SwrCnt1msIni = 16000000/rg_saw_cnt;
                         tp->SwrCnt1msIni &= 0x0FFF;
 
@@ -23838,12 +24984,13 @@
         }
 
 #ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_check_hw_fiber_mode_support(dev);
+        rtl8168_check_hw_fiber_mode_support(tp);
 #endif //ENABLE_FIBER_SUPPORT
 
         switch(tp->mcfg) {
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 if (tp->HwPkgDet == 0x06) {
                         u8 tmpUchar = rtl8168_eri_read(tp, 0xE6, 1, ERIAR_ExGMAC);
                         if (tmpUchar == 0x02)
@@ -23861,6 +25008,10 @@
                         hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
         }
 
+#ifdef CONFIG_CTAP_SHORT_OFF
+        hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
+#endif //CONFIG_CTAP_SHORT_OFF
+
         if (hwoptimize & HW_PATCH_SAMSUNG_LAN_DONGLE) {
                 switch (tp->mcfg) {
                 case CFG_METHOD_14:
@@ -23894,6 +25045,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V2;
                 break;
         case CFG_METHOD_DEFAULT:
@@ -23909,14 +25062,19 @@
         case CFG_METHOD_30:
                 tp->HwSuppEsdVer = 2;
                 break;
+        case CFG_METHOD_35:
+                tp->HwSuppEsdVer = 3;
+                break;
         default:
                 tp->HwSuppEsdVer = 1;
                 break;
         }
 
-        if (tp->HwSuppEsdVer == 2) {
+        if (tp->HwSuppEsdVer == 2 ||
+            tp->HwSuppEsdVer == 3) {
                 rtl8168_mdio_write(tp, 0x1F, 0x0A46);
                 tp->BackupPhyFuseDout_15_0 = rtl8168_mdio_read(tp, 0x10);
+                tp->BackupPhyFuseDout_31_16 = rtl8168_mdio_read(tp, 0x11);
                 tp->BackupPhyFuseDout_47_32 = rtl8168_mdio_read(tp, 0x12);
                 tp->BackupPhyFuseDout_63_48 = rtl8168_mdio_read(tp, 0x13);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
@@ -23938,6 +25096,7 @@
         case CFG_METHOD_26:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 tp->HwSuppCheckPhyDisableModeVer = 2;
                 break;
         case CFG_METHOD_23:
@@ -23946,6 +25105,7 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->HwSuppCheckPhyDisableModeVer = 3;
                 break;
         }
@@ -23991,8 +25151,12 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_31;
                 break;
+        case CFG_METHOD_35:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_35;
+                break;
         }
 
         if (tp->HwIcVerUnknown) {
@@ -24010,6 +25174,7 @@
         tp->speed = speed_mode;
         tp->duplex = duplex_mode;
         tp->advertising = advertising_mode;
+        tp->fcpause = rtl8168_fc_full;
 
         tp->max_jumbo_frame_size = rtl_chip_infotp->chipset.jumbo_frame_sz;
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
@@ -24022,7 +25187,7 @@
 
 #ifdef ENABLE_FIBER_SUPPORT
         if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_set_fiber_mode_software_variable(dev);
+                rtl8168_set_fiber_mode_software_variable(tp);
 #endif //ENABLE_FIBER_SUPPORT
 }
 
@@ -24055,6 +25220,16 @@
         free_netdev(dev);
 }
 
+static void
+rtl8168_hw_address_set(struct net_device *dev, u8 mac_addrMAC_ADDR_LEN)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+        eth_hw_addr_set(dev, mac_addr);
+#else
+        memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+}
+
 static int
 rtl8168_get_mac_address(struct net_device *dev)
 {
@@ -24080,7 +25255,9 @@
             tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 ||
             tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33) {
+            tp->mcfg == CFG_METHOD_33 ||
+            tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35) {
                 *(u32*)&mac_addr0 = rtl8168_eri_read(tp, 0xE0, 4, ERIAR_ExGMAC);
                 *(u16*)&mac_addr4 = rtl8168_eri_read(tp, 0xE4, 2, ERIAR_ExGMAC);
         } else {
@@ -24104,7 +25281,9 @@
                             tp->mcfg == CFG_METHOD_30 ||
                             tp->mcfg == CFG_METHOD_31 ||
                             tp->mcfg == CFG_METHOD_32 ||
-                            tp->mcfg == CFG_METHOD_33) {
+                            tp->mcfg == CFG_METHOD_33 ||
+                            tp->mcfg == CFG_METHOD_34 ||
+                            tp->mcfg == CFG_METHOD_35) {
                                 *pUshort++ = rtl8168_eeprom_read_sc(tp, 1);
                                 *pUshort++ = rtl8168_eeprom_read_sc(tp, 2);
                                 *pUshort = rtl8168_eeprom_read_sc(tp, 3);
@@ -24119,24 +25298,21 @@
         if (!is_valid_ether_addr(mac_addr)) {
                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
                           mac_addr);
-                eth_hw_addr_random(dev);
-                ether_addr_copy(mac_addr, dev->dev_addr);
+                eth_random_addr(mac_addr);
+                dev->addr_assign_type = NET_ADDR_RANDOM;
                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
                            mac_addr);
                 tp->random_mac = 1;
         }
 
+        rtl8168_hw_address_set(dev, mac_addr);
         rtl8168_rar_set(tp, mac_addr);
 
-        for (i = 0; i < MAC_ADDR_LEN; i++) {
-                dev->dev_addri = RTL_R8(tp, MAC0 + i);
-                tp->org_mac_addri = dev->dev_addri; /* keep the original MAC address */
-        }
+        /* keep the original MAC address */
+        memcpy(tp->org_mac_addr, dev->dev_addr, MAC_ADDR_LEN);
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 #endif
-//  memcpy(dev->dev_addr, dev->dev_addr, dev->addr_len);
-
         return 0;
 }
 
@@ -24160,7 +25336,7 @@
 
         spin_lock_irqsave(&tp->lock, flags);
 
-        memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
+        rtl8168_hw_address_set(dev, addr->sa_data);
 
         rtl8168_rar_set(tp, dev->dev_addr);
 
@@ -24177,7 +25353,7 @@
  *****************************************************************************/
 void
 rtl8168_rar_set(struct rtl8168_private *tp,
-                uint8_t *addr)
+                const u8 *addr)
 {
         uint32_t rar_low = 0;
         uint32_t rar_high = 0;
@@ -24870,6 +26046,72 @@
 }
 #endif //ETHTOOL_OPS_COMPAT
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
+static int rtl8168_siocdevprivate(struct net_device *dev, struct ifreq *ifr,
+                                  void __user *data, int cmd)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ret = 0;
+
+        switch (cmd) {
+        case SIOCDEVPRIVATE_RTLASF:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                ret = rtl8168_asf_ioctl(dev, ifr);
+                break;
+
+#ifdef ENABLE_DASH_SUPPORT
+        case SIOCDEVPRIVATE_RTLDASH:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_dash_ioctl(dev, ifr);
+                break;
+#endif
+
+#ifdef ENABLE_REALWOW_SUPPORT
+        case SIOCDEVPRIVATE_RTLREALWOW:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_realwow_ioctl(dev, ifr);
+                break;
+#endif
+
+        case SIOCRTLTOOL:
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_tool_ioctl(tp, ifr);
+                break;
+
+        default:
+                ret = -EOPNOTSUPP;
+        }
+
+        return ret;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
+
 static int
 rtl8168_do_ioctl(struct net_device *dev,
                  struct ifreq *ifr,
@@ -24938,11 +26180,21 @@
                         break;
                 }
 
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
                 ret = rtl8168_realwow_ioctl(dev, ifr);
                 break;
 #endif
 
         case SIOCRTLTOOL:
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
                 ret = rtl8168_tool_ioctl(tp, ifr);
                 break;
 
@@ -25035,6 +26287,7 @@
         case CFG_METHOD_15:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
                 break;
         case CFG_METHOD_21:
@@ -25262,6 +26515,12 @@
                 printk(KERN_ERR "%s: cmd = 0x%02x, should be 0x%02x \n.", dev->name, cmd, tp->pci_cfg_space.cmd);
                 pci_write_config_byte(pdev, PCI_COMMAND, tp->pci_cfg_space.cmd);
                 tp->esd_flag |= BIT_0;
+
+                pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
+                if (cmd == 0xff) {
+                        printk(KERN_ERR "%s: pci link is down \n.", dev->name);
+                        goto out_unlock;
+                }
         }
 
         pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &io_base_l);
@@ -25383,6 +26642,8 @@
                 rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
                 tp->esd_flag = 0;
         }
+
+out_unlock:
         spin_unlock_irqrestore(&tp->lock, flags);
 
         mod_timer(timer, jiffies + timeout);
@@ -25461,7 +26722,12 @@
         .ndo_tx_timeout     = rtl8168_tx_timeout,
         .ndo_change_mtu     = rtl8168_change_mtu,
         .ndo_set_mac_address    = rtl8168_set_mac_address,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
         .ndo_do_ioctl       = rtl8168_do_ioctl,
+#else
+        .ndo_siocdevprivate = rtl8168_siocdevprivate,
+        .ndo_eth_ioctl      = rtl8168_do_ioctl,
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
         .ndo_set_multicast_list = rtl8168_set_rx_mode,
 #else
@@ -25614,7 +26880,8 @@
         /* Get production from EEPROM */
         if (((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
               tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_29 ||
-              tp->mcfg == CFG_METHOD_30) && (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3)) ||
+              tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35) &&
+             (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3)) ||
             ((tp->mcfg == CFG_METHOD_26) && (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_4)))
                 tp->eeprom_type = EEPROM_TYPE_NONE;
         else
@@ -25764,12 +27031,14 @@
         * Rx and Tx descriptors needs 256 bytes alignment.
         * pci_alloc_consistent provides more.
         */
-        tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8168_TX_RING_BYTES,
+        tp->TxDescArray = dma_alloc_coherent(&pdev->dev,
+                                             (tp->num_tx_desc * sizeof(struct TxDesc)),
                                              &tp->TxPhyAddr, GFP_KERNEL);
         if (!tp->TxDescArray)
                 goto err_free_all_allocated_mem;
 
-        tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8168_RX_RING_BYTES,
+        tp->RxDescArray = dma_alloc_coherent(&pdev->dev,
+                                             (tp->num_rx_desc * sizeof(struct RxDesc)),
                                              &tp->RxPhyAddr, GFP_KERNEL);
         if (!tp->RxDescArray)
                 goto err_free_all_allocated_mem;
@@ -25843,13 +27112,17 @@
 
 err_free_all_allocated_mem:
         if (tp->RxDescArray != NULL) {
-                dma_free_coherent(&pdev->dev, R8168_RX_RING_BYTES, tp->RxDescArray,
+                dma_free_coherent(&pdev->dev,
+                                  (tp->num_rx_desc * sizeof(struct RxDesc)),
+                                  tp->RxDescArray,
                                   tp->RxPhyAddr);
                 tp->RxDescArray = NULL;
         }
 
         if (tp->TxDescArray != NULL) {
-                dma_free_coherent(&pdev->dev, R8168_TX_RING_BYTES, tp->TxDescArray,
+                dma_free_coherent(&pdev->dev,
+                                  (tp->num_tx_desc * sizeof(struct TxDesc)),
+                                  tp->TxDescArray,
                                   tp->TxPhyAddr);
                 tp->TxDescArray = NULL;
         }
@@ -26054,6 +27327,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1);
                 break;
         }
@@ -26078,6 +27353,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
                 csi_tmp &= BIT_0;
                 rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
@@ -26470,7 +27747,7 @@
         } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                    tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
                    tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_29 ||
-                   tp->mcfg == CFG_METHOD_30) {
+                   tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
                 if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22)
@@ -26489,6 +27766,9 @@
                 csi_tmp |= BIT_0;
                 rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
 
+                if (tp->mcfg == CFG_METHOD_35)
+                        rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0));
+
                 if (tp->mcfg == CFG_METHOD_26) {
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C0);
                         mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
@@ -26500,7 +27780,8 @@
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C4);
                         mac_ocp_data |= BIT_0;
                         rtl8168_mac_ocp_write(tp, 0xD3C4, mac_ocp_data);
-                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                           tp->mcfg == CFG_METHOD_35) {
 
                         if (tp->RequireAdjustUpsTxLinkPulseTiming) {
                                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD412);
@@ -26555,7 +27836,8 @@
                 rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
 
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35) {
                         rtl8168_mac_ocp_write(tp, 0xE054, 0x0000);
 
                         rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
@@ -26563,7 +27845,8 @@
                         rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
                 }
 
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35) {
                         csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC);
                         csi_tmp |= (BIT_2 | BIT_3 | BIT_4);
                         rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
@@ -26572,7 +27855,8 @@
                 if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                     tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25) {
                         rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
-                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                           tp->mcfg == CFG_METHOD_35) {
                         rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
                         rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
                 }
@@ -26581,7 +27865,8 @@
                 csi_tmp &= ~BIT_12;
                 rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
 
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35) {
                         csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
                         csi_tmp &= ~(BIT_2);
                         rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
@@ -26671,7 +27956,7 @@
                         rtl8168_mac_ocp_write(tp, 0xE860, mac_ocp_data);
                 }
         } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33) {
+                   tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
 
@@ -26697,8 +27982,10 @@
 
                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056);
                 mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                if (tp->HwPkgDet == 0x0F)
+                        mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
                 rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data);
-                if (FALSE == HW_SUPP_SERDES_PHY(tp))
+                if (tp->HwPkgDet == 0x0F)
                         rtl8168_mac_ocp_write(tp, 0xEA80, 0x0003);
                 else
                         rtl8168_mac_ocp_write(tp, 0xEA80, 0x0000);
@@ -26706,6 +27993,8 @@
                 rtl8168_oob_mutex_lock(tp);
                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
                 mac_ocp_data &= ~(BIT_3 | BIT_0);
+                if (tp->HwPkgDet == 0x0F)
+                        mac_ocp_data |= BIT_0;
                 rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data);
                 rtl8168_oob_mutex_unlock(tp);
 
@@ -26744,10 +28033,14 @@
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
 
                 rtl8168_oob_mutex_lock(tp);
-                rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
+                if (tp->HwPkgDet == 0x0F)
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F00, ERIAR_ExGMAC);
+                else
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
                 rtl8168_oob_mutex_unlock(tp);
 
-                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33) {
+                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                    tp->mcfg == CFG_METHOD_34) {
                         csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                         csi_tmp |= BIT_4;
                         rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
@@ -26872,11 +28165,13 @@
                 break;
         case CFG_METHOD_29:
         case CFG_METHOD_30:
+        case CFG_METHOD_35:
                 rtl8168_mac_ocp_write(tp, 0xE098, 0x0AA2);
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
                 rtl8168_mac_ocp_write(tp, 0xE098, 0xC302);
                 break;
         }
@@ -26895,6 +28190,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 if (aspm) {
                         rtl8168_init_pci_offset_99(tp);
                 }
@@ -26911,6 +28208,8 @@
         case CFG_METHOD_31:
         case CFG_METHOD_32:
         case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
                 if (aspm) {
                         rtl8168_init_pci_offset_180(tp);
                 }
@@ -26945,7 +28244,9 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-        case CFG_METHOD_33: {
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35: {
                 int timeout;
                 for (timeout = 0; timeout < 10; timeout++) {
                         if ((rtl8168_eri_read(tp, 0x1AE, 2, ERIAR_ExGMAC) & BIT_13)==0)
@@ -27058,10 +28359,11 @@
         netif_stop_queue(dev);
         netif_carrier_off(dev);
         rtl8168_hw_config(dev);
-        spin_unlock_irqrestore(&tp->lock, flags);
 
         rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
 
+        spin_unlock_irqrestore(&tp->lock, flags);
+
         mod_timer(&tp->esd_timer, jiffies + RTL8168_ESD_TIMEOUT);
         mod_timer(&tp->link_timer, jiffies + RTL8168_LINK_TIMEOUT);
 out:
@@ -27160,7 +28462,7 @@
 {
         int i;
 
-        for (i = 0; i < NUM_RX_DESC; i++) {
+        for (i = 0; i < tp->num_rx_desc; i++) {
                 if (tp->Rx_skbuffi)
                         rtl8168_free_rx_skb(tp, tp->Rx_skbuff + i,
                                             tp->RxDescArray + i);
@@ -27177,7 +28479,7 @@
         u32 cur;
 
         for (cur = start; end - cur > 0; cur++) {
-                int ret, i = cur % NUM_RX_DESC;
+                int ret, i = cur % tp->num_rx_desc;
 
                 if (tp->Rx_skbuffi)
                         continue;
@@ -27215,10 +28517,10 @@
 {
         int i = 0;
 
-        memset(tp->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc));
+        memset(tp->TxDescArray, 0x0, tp->num_tx_desc * sizeof(struct TxDesc));
 
-        for (i = 0; i < NUM_TX_DESC; i++) {
-                if (i == (NUM_TX_DESC - 1))
+        for (i = 0; i < tp->num_tx_desc; i++) {
+                if (i == (tp->num_tx_desc - 1))
                         tp->TxDescArrayi.opts1 = cpu_to_le32(RingEnd);
         }
 }
@@ -27234,8 +28536,8 @@
         if (own)
                 ownbit = DescOwn;
 
-        for (i = 0; i < NUM_RX_DESC; i++) {
-                if (i == (NUM_RX_DESC - 1))
+        for (i = 0; i < tp->num_rx_desc; i++) {
+                if (i == (tp->num_rx_desc - 1))
                         tp->RxDescArrayi.opts1 = cpu_to_le32((ownbit | RingEnd) | (unsigned long)tp->rx_buf_sz);
                 else
                         tp->RxDescArrayi.opts1 = cpu_to_le32(ownbit | (unsigned long)tp->rx_buf_sz);
@@ -27245,7 +28547,7 @@
 static void
 rtl8168_rx_desc_init(struct rtl8168_private *tp)
 {
-        memset(tp->RxDescArray, 0x0, NUM_RX_DESC * sizeof(struct RxDesc));
+        memset(tp->RxDescArray, 0x0, tp->num_rx_desc * sizeof(struct RxDesc));
 }
 
 static int
@@ -27255,16 +28557,16 @@
 
         rtl8168_init_ring_indexes(tp);
 
-        memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
-        memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
+        memset(tp->tx_skb, 0x0, sizeof(tp->tx_skb));
+        memset(tp->Rx_skbuff, 0x0, sizeof(tp->Rx_skbuff));
 
         rtl8168_tx_desc_init(tp);
         rtl8168_rx_desc_init(tp);
 
-        if (rtl8168_rx_fill(tp, dev, 0, NUM_RX_DESC, 0) != NUM_RX_DESC)
+        if (rtl8168_rx_fill(tp, dev, 0, tp->num_rx_desc, 0) != tp->num_rx_desc)
                 goto err_out;
 
-        rtl8168_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
+        rtl8168_mark_as_last_descriptor(tp->RxDescArray + tp->num_rx_desc - 1);
 
         return 0;
 
@@ -27297,7 +28599,7 @@
 #endif
 
         for (i = 0; i < n; i++) {
-                unsigned int entry = (start + i) % NUM_TX_DESC;
+                unsigned int entry = (start + i) % tp->num_tx_desc;
                 struct ring_info *tx_skb = tp->tx_skb + entry;
                 unsigned int len = tx_skb->len;
 
@@ -27318,7 +28620,7 @@
 static void
 rtl8168_tx_clear(struct rtl8168_private *tp)
 {
-        rtl8168_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC);
+        rtl8168_tx_clear_range(tp, tp->dirty_tx, tp->num_tx_desc);
         tp->cur_tx = tp->dirty_tx = 0;
 }
 
@@ -27355,29 +28657,6 @@
 }
 #endif
 
-static void
-rtl8168_wait_for_quiescence(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        synchronize_irq(dev->irq);
-
-        /* Wait for any pending NAPI task to complete */
-#ifdef CONFIG_R8168_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        RTL_NAPI_DISABLE(dev, &tp->napi);
-#endif
-#endif//CONFIG_R8168_NAPI
-
-        rtl8168_irq_mask_and_ack(tp);
-
-#ifdef CONFIG_R8168_NAPI
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        RTL_NAPI_ENABLE(dev, &tp->napi);
-#endif
-#endif//CONFIG_R8168_NAPI
-}
-
 #if 0
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 static void rtl8168_reinit_task(void *_data)
@@ -27486,11 +28765,14 @@
 }
 
 static u32
-rtl8168_get_txd_opts1(u32 opts1, u32 len, unsigned int entry)
+rtl8168_get_txd_opts1(struct rtl8168_private *tp,
+                      u32 opts1,
+                      u32 len,
+                      unsigned int entry)
 {
         u32 status = opts1 | len;
 
-        if (entry == NUM_TX_DESC - 1)
+        if (entry == tp->num_tx_desc - 1)
                 status |= RingEnd;
 
         return status;
@@ -27513,7 +28795,7 @@
                 u32 status, len;
                 void *addr;
 
-                entry = (entry + 1) % NUM_TX_DESC;
+                entry = (entry + 1) % tp->num_tx_desc;
 
                 txd = tp->TxDescArray + entry;
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)
@@ -27533,7 +28815,7 @@
                 }
 
                 /* anti gcc 2.95.3 bugware (sic) */
-                status = rtl8168_get_txd_opts1(opts0, len, entry);
+                status = rtl8168_get_txd_opts1(tp, opts0, len, entry);
                 if (cur_frag == (nr_frags - 1)) {
                         tp->tx_skbentry.skb = skb;
                         status |= LastFrag;
@@ -27741,7 +29023,7 @@
 static bool rtl8168_tx_slots_avail(struct rtl8168_private *tp,
                                    unsigned int nr_frags)
 {
-        unsigned int slots_avail = tp->dirty_tx + NUM_TX_DESC - tp->cur_tx;
+        unsigned int slots_avail = tp->dirty_tx + tp->num_tx_desc - tp->cur_tx;
 
         /* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */
         return slots_avail > nr_frags;
@@ -27772,7 +29054,7 @@
                 goto err_stop;
         }
 
-        entry = tp->cur_tx % NUM_TX_DESC;
+        entry = tp->cur_tx % tp->num_tx_desc;
         txd = tp->TxDescArray + entry;
 
         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) {
@@ -27861,7 +29143,7 @@
                 opts0 |= FirstFrag | LastFrag;
         }
 
-        opts0 = rtl8168_get_txd_opts1(opts0, len, entry);
+        opts0 = rtl8168_get_txd_opts1(tp, opts0, len, entry);
         mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
         if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
                 if (unlikely(net_ratelimit()))
@@ -27929,7 +29211,7 @@
         tp->dynamic_aspm_packet_count += tx_left;
 
         while (tx_left > 0) {
-                unsigned int entry = dirty_tx % NUM_TX_DESC;
+                unsigned int entry = dirty_tx % tp->num_tx_desc;
                 struct ring_info *tx_skb = tp->tx_skb + entry;
                 u32 len = tx_skb->len;
                 u32 status;
@@ -28076,9 +29358,9 @@
 
         rx_quota = RTL_RX_QUOTA(budget);
         cur_rx = tp->cur_rx;
-        entry = cur_rx % NUM_RX_DESC;
+        entry = cur_rx % tp->num_rx_desc;
         desc = tp->RxDescArray + entry;
-        rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
+        rx_left = tp->num_rx_desc + tp->dirty_rx - cur_rx;
         rx_left = rtl8168_rx_quota(rx_left, (u32)rx_quota);
 
         for (; rx_left > 0; rx_left--) {
@@ -28161,7 +29443,7 @@
                 }
 
                 cur_rx++;
-                entry = cur_rx % NUM_RX_DESC;
+                entry = cur_rx % tp->num_rx_desc;
                 desc = tp->RxDescArray + entry;
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
                 prefetch(desc);
@@ -28185,7 +29467,7 @@
          *   after refill ?
          * - how do others driver handle this condition (Uh oh...).
          */
-        if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
+        if ((tp->dirty_rx + tp->num_rx_desc == tp->cur_rx) && netif_msg_intr(tp))
                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
 
 rx_out:
@@ -28249,6 +29531,8 @@
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
                 case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                case CFG_METHOD_35:
                         /* RX_OVERFLOW RE-START mechanism now HW handles it automatically*/
                         RTL_W16(tp, IntrStatus, status&~RxFIFOOver);
                         break;
@@ -28326,12 +29610,14 @@
 
                         if (status & tp->intr_mask)
                                 tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
+
+                        rtl8168_tx_interrupt(dev, tp);
+
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
                         rtl8168_rx_interrupt(dev, tp, &budget);
 #else
                         rtl8168_rx_interrupt(dev, tp, budget);
 #endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                        rtl8168_tx_interrupt(dev, tp);
 
 #ifdef ENABLE_DASH_SUPPORT
                         if ( tp->DASH ) {
@@ -28362,12 +29648,12 @@
         unsigned int work_done;
         unsigned long flags;
 
-        work_done = rtl8168_rx_interrupt(dev, tp, budget);
-
         spin_lock_irqsave(&tp->lock, flags);
         rtl8168_tx_interrupt(dev, tp);
         spin_unlock_irqrestore(&tp->lock, flags);
 
+        work_done = rtl8168_rx_interrupt(dev, tp, budget);
+
         RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
 
         if (work_done < work_to_do) {
@@ -28485,9 +29771,13 @@
 
                 free_irq(dev->irq, dev);
 
-                dma_free_coherent(&pdev->dev, R8168_RX_RING_BYTES, tp->RxDescArray,
+                dma_free_coherent(&pdev->dev,
+                                  (tp->num_rx_desc * sizeof(struct RxDesc)),
+                                  tp->RxDescArray,
                                   tp->RxPhyAddr);
-                dma_free_coherent(&pdev->dev, R8168_TX_RING_BYTES, tp->TxDescArray,
+                dma_free_coherent(&pdev->dev,
+                                  (tp->num_tx_desc * sizeof(struct TxDesc)),
+                                  tp->TxDescArray,
                                   tp->TxPhyAddr);
                 tp->TxDescArray = NULL;
                 tp->RxDescArray = NULL;
@@ -28518,7 +29808,7 @@
                 rtl8168_rar_set(tp, tp->org_mac_addr);
 
 #ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_hw_fiber_nic_d3_para(dev);
+        rtl8168_hw_fiber_nic_d3_para(tp);
 #endif  //ENABLE_FIBER_SUPPORT
 
         if (s5wol == 0)
@@ -28599,7 +29889,7 @@
         rtl8168_hw_d3_para(dev);
 
 #ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_hw_fiber_nic_d3_para(dev);
+        rtl8168_hw_fiber_nic_d3_para(tp);
 #endif  //ENABLE_FIBER_SUPPORT
 
         rtl8168_powerdown_pll(dev);
​

r8168-8.049.02.tar.gz/src/r8168_realwow.h -> r8168-8.050.00.tar.gz/src/r8168_realwow.h Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/rtl_eeprom.c -> r8168-8.050.00.tar.gz/src/rtl_eeprom.c Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/rtl_eeprom.h -> r8168-8.050.00.tar.gz/src/rtl_eeprom.h Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​

r8168-8.049.02.tar.gz/src/rtltool.c -> r8168-8.050.00.tar.gz/src/rtltool.c Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
@@ -56,9 +56,6 @@
         ret = 0;
         switch (my_cmd.cmd) {
         case RTLTOOL_READ_MAC:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 if (my_cmd.len==1)
                         my_cmd.data = readb(tp->mmio_addr+my_cmd.offset);
                 else if (my_cmd.len==2)
@@ -77,9 +74,6 @@
                 break;
 
         case RTLTOOL_WRITE_MAC:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 if (my_cmd.len==1)
                         writeb(my_cmd.data, tp->mmio_addr+my_cmd.offset);
                 else if (my_cmd.len==2)
@@ -94,9 +88,6 @@
                 break;
 
         case RTLTOOL_READ_PHY:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 my_cmd.data = rtl8168_mdio_prot_read(tp, my_cmd.offset);
                 spin_unlock_irqrestore(&tp->lock, flags);
@@ -109,18 +100,12 @@
                 break;
 
         case RTLTOOL_WRITE_PHY:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 rtl8168_mdio_prot_write(tp, my_cmd.offset, my_cmd.data);
                 spin_unlock_irqrestore(&tp->lock, flags);
                 break;
 
         case RTLTOOL_READ_EPHY:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 my_cmd.data = rtl8168_ephy_read(tp, my_cmd.offset);
                 spin_unlock_irqrestore(&tp->lock, flags);
@@ -133,9 +118,6 @@
                 break;
 
         case RTLTOOL_WRITE_EPHY:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 rtl8168_ephy_write(tp, my_cmd.offset, my_cmd.data);
                 spin_unlock_irqrestore(&tp->lock, flags);
@@ -160,12 +142,6 @@
                 break;
 
         case RTLTOOL_WRITE_ERI:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
                         spin_lock_irqsave(&tp->lock, flags);
                         rtl8168_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
@@ -177,9 +153,6 @@
                 break;
 
         case RTLTOOL_READ_PCI:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 my_cmd.data = 0;
                 if (my_cmd.len==1)
                         pci_read_config_byte(tp->pci_dev, my_cmd.offset,
@@ -202,9 +175,6 @@
                 break;
 
         case RTLTOOL_WRITE_PCI:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 if (my_cmd.len==1)
                         pci_write_config_byte(tp->pci_dev, my_cmd.offset,
                                               my_cmd.data);
@@ -222,9 +192,6 @@
                 break;
 
         case RTLTOOL_READ_EEPROM:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 my_cmd.data = rtl8168_eeprom_read_sc(tp, my_cmd.offset);
                 spin_unlock_irqrestore(&tp->lock, flags);
@@ -237,18 +204,12 @@
                 break;
 
         case RTLTOOL_WRITE_EEPROM:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 rtl8168_eeprom_write_sc(tp, my_cmd.offset, my_cmd.data);
                 spin_unlock_irqrestore(&tp->lock, flags);
                 break;
 
         case RTL_READ_OOB_MAC:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 rtl8168_oob_mutex_lock(tp);
                 my_cmd.data = rtl8168_ocp_read(tp, my_cmd.offset, 4);
@@ -262,9 +223,6 @@
                 break;
 
         case RTL_WRITE_OOB_MAC:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 if (my_cmd.len == 0 || my_cmd.len > 4)
                         return -EOPNOTSUPP;
 
@@ -276,9 +234,6 @@
                 break;
 
         case RTL_ENABLE_PCI_DIAG:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 tp->rtk_enable_diag = 1;
                 spin_unlock_irqrestore(&tp->lock, flags);
@@ -287,9 +242,6 @@
                 break;
 
         case RTL_DISABLE_PCI_DIAG:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 tp->rtk_enable_diag = 0;
                 spin_unlock_irqrestore(&tp->lock, flags);
@@ -298,9 +250,6 @@
                 break;
 
         case RTL_READ_MAC_OCP:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 if (my_cmd.offset % 2)
                         return -EOPNOTSUPP;
 
@@ -315,9 +264,6 @@
                 break;
 
         case RTL_WRITE_MAC_OCP:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 if ((my_cmd.offset % 2) || (my_cmd.len != 2))
                         return -EOPNOTSUPP;
 
@@ -327,9 +273,6 @@
                 break;
 
         case RTL_DIRECT_READ_PHY_OCP:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 my_cmd.data = rtl8168_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset);
                 spin_unlock_irqrestore(&tp->lock, flags);
@@ -342,9 +285,6 @@
                 break;
 
         case RTL_DIRECT_WRITE_PHY_OCP:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-
                 spin_lock_irqsave(&tp->lock, flags);
                 rtl8168_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data);
                 spin_unlock_irqrestore(&tp->lock, flags);
​

r8168-8.049.02.tar.gz/src/rtltool.h -> r8168-8.050.00.tar.gz/src/rtltool.h Changed

 
@@ -5,7 +5,7 @@
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
 # controllers with PCI-Express interface.
 #
-# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
+# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
 #
 # This program is free software; you can redistribute it and/or modify it
 # under the terms of the GNU General Public License as published by the Free
​