Overview

Request 5438 (accepted)

Update to 8.049.02

Submit package home:Aloysius:branches:Essentials / r8168 to package Essentials / r8168

r8168.changes Changed
x
 
1
@@ -1,4 +1,9 @@
2
 -------------------------------------------------------------------
3
+Tue Aug 24 13:01:21 UTC 2021 - Luigi Baldoni <aloisio@gmx.com>
4
+
5
+- Update to version 8.049.02
6
+
7
+-------------------------------------------------------------------
8
 Thu Jan 21 15:49:06 UTC 2021 - Werner Fink <werner@suse.de>
9
 
10
 - Now we change to github for basic download 
11
r8168.spec Changed
19
 
1
@@ -1,7 +1,7 @@
2
 #
3
 # spec file for package r8168
4
 #
5
-# Copyright (c) 2019 Packman Team <packman@links2linux.de>
6
+# Copyright (c) 2021 Packman Team <packman@links2linux.de>
7
 # Copyright (c) 2017 SUSE LINUX Products GmbH, Nuernberg, Germany.
8
 #
9
 # All modifications and additions to the file contributed by third parties
10
@@ -18,7 +18,7 @@
11
 
12
 #!BuildIgnore: enough-build-resources
13
 Name:           r8168
14
-Version:        8.048.03
15
+Version:        8.049.02
16
 Release:        0
17
 Summary:        Device driver for RealTek Gigabit Ethernet controllers
18
 License:        GPL-2.0-or-later
19
r8168-8.048.03.tar.gz/Makefile -> r8168-8.049.02.tar.gz/Makefile Changed
13
 
1
@@ -1,9 +1,10 @@
2
+# SPDX-License-Identifier: GPL-2.0-only
3
 ################################################################################
4
 #
5
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
6
 # controllers with PCI-Express interface.
7
 #
8
-# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
9
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
10
 #
11
 # This program is free software; you can redistribute it and/or modify it
12
 # under the terms of the GNU General Public License as published by the Free
13
r8168-8.048.03.tar.gz/autorun.sh -> r8168-8.049.02.tar.gz/autorun.sh Changed
7
 
1
@@ -1,4 +1,5 @@
2
 #!/bin/sh
3
+# SPDX-License-Identifier: GPL-2.0-only
4
 
5
 # invoke insmod with all arguments we got
6
 # and use a pathname, as insmod doesn't look in . by default
7
r8168-8.048.03.tar.gz/src/Makefile -> r8168-8.049.02.tar.gz/src/Makefile Changed
36
 
1
@@ -1,9 +1,10 @@
2
+# SPDX-License-Identifier: GPL-2.0-only
3
 ################################################################################
4
 #
5
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
6
 # controllers with PCI-Express interface.
7
 #
8
-# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
9
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
10
 #
11
 # This program is free software; you can redistribute it and/or modify it
12
 # under the terms of the GNU General Public License as published by the Free
13
@@ -40,6 +41,8 @@
14
 ENABLE_S5_KEEP_CURR_MAC = n
15
 ENABLE_EEE = y
16
 ENABLE_S0_MAGIC_PACKET = n
17
+CONFIG_DYNAMIC_ASPM = y
18
+ENABLE_USE_FIRMWARE_FILE = n
19
 
20
 ifneq ($(KERNELRELEASE),)
21
    obj-m := r8168.o
22
@@ -83,6 +86,13 @@
23
    ifeq ($(ENABLE_S0_MAGIC_PACKET), y)
24
        EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET
25
    endif
26
+   ifeq ($(CONFIG_DYNAMIC_ASPM), y)
27
+       EXTRA_CFLAGS += -DCONFIG_DYNAMIC_ASPM
28
+   endif
29
+   ifeq ($(ENABLE_USE_FIRMWARE_FILE), y)
30
+       r8168-objs += r8168_firmware.o
31
+       EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE
32
+   endif
33
 else
34
    BASEDIR := /lib/modules/$(shell uname -r)
35
    KERNELDIR ?= $(BASEDIR)/build
36
r8168-8.048.03.tar.gz/src/Makefile_linux24x -> r8168-8.049.02.tar.gz/src/Makefile_linux24x Changed
13
 
1
@@ -1,9 +1,10 @@
2
+# SPDX-License-Identifier: GPL-2.0-only
3
 ################################################################################
4
 #
5
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
6
 # controllers with PCI-Express interface.
7
 #
8
-# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
9
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
10
 #
11
 # This program is free software; you can redistribute it and/or modify it
12
 # under the terms of the GNU General Public License as published by the Free
13
r8168-8.048.03.tar.gz/src/r8168.h -> r8168-8.049.02.tar.gz/src/r8168.h Changed
207
 
1
@@ -1,10 +1,11 @@
2
+/* SPDX-License-Identifier: GPL-2.0-only */
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
@@ -36,6 +37,10 @@
15
 #include "r8168_realwow.h"
16
 #include "r8168_fiber.h"
17
 
18
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
19
+typedef int netdev_tx_t;
20
+#endif
21
+
22
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
23
 #define skb_transport_offset(skb) (skb->h.raw - skb->data)
24
 #endif
25
@@ -335,12 +340,12 @@
26
 #define DASH_SUFFIX ""
27
 #endif
28
 
29
-#define RTL8168_VERSION "8.048.03" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
30
+#define RTL8168_VERSION "8.049.02" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
31
 #define MODULENAME "r8168"
32
 #define PFX MODULENAME ": "
33
 
34
 #define GPL_CLAIM "\
35
-r8168  Copyright (C) 2020  Realtek NIC software team <nicfae@realtek.com> \n \
36
+r8168  Copyright (C) 2021 Realtek NIC software team <nicfae@realtek.com> \n \
37
 This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \
38
 This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n"
39
 
40
@@ -430,6 +435,8 @@
41
 #define R8168_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
42
 #define R8168_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
43
 
44
+#define OCP_STD_PHY_BASE   0xa400
45
+
46
 #define NODE_ADDRESS_SIZE 6
47
 
48
 #define SHORT_PACKET_PADDING_BUF_SIZE 256
49
@@ -492,6 +499,10 @@
50
 #define ADVERTISE_1000HALF  0x100
51
 #endif
52
 
53
+#ifndef ETH_MIN_MTU
54
+#define ETH_MIN_MTU  68
55
+#endif
56
+
57
 /*****************************************************************************/
58
 
59
 //#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
60
@@ -1173,6 +1184,7 @@
61
         PMEnable    = (1 << 0), /* Power Management Enable */
62
 
63
         /* Config2 register */
64
+        ClkReqEn   = (1 << 7), /* Clock Request Enable */
65
         PMSTS_En    = (1 << 5),
66
 
67
         /* Config3 register */
68
@@ -1194,6 +1206,7 @@
69
         UWF     = (1 << 4), /* Accept Unicast wakeup frame */
70
         LanWake     = (1 << 1), /* LanWake enable/disable */
71
         PMEStatus   = (1 << 0), /* PME status can be reset by PCI RST# */
72
+        ASPM_en        = (1 << 0), /* ASPM enable */
73
 
74
         /* CPlusCmd */
75
         EnableBist  = (1 << 15),
76
@@ -1554,9 +1567,6 @@
77
 
78
         u8 UseSwPaddingShortPkt;
79
 
80
-        void *ShortPacketEmptyBuffer;
81
-        dma_addr_t ShortPacketEmptyBufferPhy;
82
-
83
         u8 RequireAdcBiasPatch;
84
         u16 AdcBiasPatchIoffset;
85
 
86
@@ -1575,20 +1585,34 @@
87
 
88
         u8 HwSuppPhyOcpVer;
89
 
90
+        u8 HwSuppAspmClkIntrLock;
91
+
92
         u16 NicCustLedValue;
93
 
94
+        u8 HwSuppUpsVer;
95
+
96
         u8 HwSuppMagicPktVer;
97
 
98
         u8 HwSuppCheckPhyDisableModeVer;
99
 
100
         u8 random_mac;
101
 
102
-        u8 HwSuppGigaForceMode;
103
-
104
+        u16 phy_reg_aner;
105
         u16 phy_reg_anlpar;
106
+        u16 phy_reg_gbsr;
107
 
108
         u32 HwPcieSNOffset;
109
 
110
+        u8 HwSuppEsdVer;
111
+        u8 TestPhyOcpReg;
112
+        u16 BackupPhyFuseDout_15_0;
113
+        u16 BackupPhyFuseDout_47_32;
114
+        u16 BackupPhyFuseDout_63_48;
115
+
116
+        const char *fw_name;
117
+        struct rtl8168_fw *rtl_fw;
118
+        u32 ocp_base;
119
+
120
         //Dash+++++++++++++++++
121
         u8 HwSuppDashVer;
122
         u8 DASH;
123
@@ -1618,37 +1642,29 @@
124
 
125
         u8 DashFwDisableRx;
126
 
127
-        void *UnalignedSendToFwBufferVa;
128
         void *SendToFwBuffer ;
129
-        u64 SendToFwBufferPhy ;
130
+        dma_addr_t SendToFwBufferPhy ;
131
         u8 SendingToFw;
132
-        dma_addr_t UnalignedSendToFwBufferPa;
133
         PTX_DASH_SEND_FW_DESC TxDashSendFwDesc;
134
-        u64 TxDashSendFwDescPhy;
135
-        u8 *UnalignedTxDashSendFwDescVa;
136
+        dma_addr_t TxDashSendFwDescPhy;
137
         u32 SizeOfTxDashSendFwDescMemAlloc;
138
         u32 SizeOfTxDashSendFwDesc ;
139
         u32 NumTxDashSendFwDesc ;
140
         u32 CurrNumTxDashSendFwDesc ;
141
         u32 LastSendNumTxDashSendFwDesc ;
142
-        dma_addr_t UnalignedTxDashSendFwDescPa;
143
 
144
         u32 NumRecvFromFwBuffer ;
145
         u32 SizeOfRecvFromFwBuffer ;
146
         u32 SizeOfRecvFromFwBufferMemAlloc ;
147
         void *RecvFromFwBuffer ;
148
-        u64 RecvFromFwBufferPhy ;
149
+        dma_addr_t RecvFromFwBufferPhy ;
150
 
151
-        void *UnalignedRecvFromFwBufferVa;
152
-        dma_addr_t UnalignedRecvFromFwBufferPa;
153
         PRX_DASH_FROM_FW_DESC RxDashRecvFwDesc;
154
-        u64 RxDashRecvFwDescPhy;
155
-        u8 *UnalignedRxDashRecvFwDescVa;
156
+        dma_addr_t RxDashRecvFwDescPhy;
157
         u32 SizeOfRxDashRecvFwDescMemAlloc;
158
         u32 SizeOfRxDashRecvFwDesc ;
159
         u32 NumRxDashRecvFwDesc ;
160
         u32 CurrNumRxDashRecvFwDesc ;
161
-        dma_addr_t UnalignedRxDashRecvFwDescPa;
162
         u8 DashReqRegValue;
163
         u16 HostReqValue;
164
 
165
@@ -1681,6 +1697,8 @@
166
         u32 eee_adv_t;
167
         u8 eee_enabled;
168
 
169
+        u32 dynamic_aspm_packet_count;
170
+
171
 #ifdef ENABLE_R8168_PROCFS
172
         //Procfs support
173
         struct proc_dir_entry *proc_dir;
174
@@ -1773,10 +1791,14 @@
175
 #define HW_PATCH_SOC_LAN (BIT_0)
176
 #define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2)
177
 
178
-void rtl8168_mdio_write(struct rtl8168_private *tp, u32 RegAddr, u32 value);
179
+#define HW_PHY_STATUS_INI       1
180
+#define HW_PHY_STATUS_EXT_INI   2
181
+#define HW_PHY_STATUS_LAN_ON    3
182
+
183
+void rtl8168_mdio_write(struct rtl8168_private *tp, u16 RegAddr, u16 value);
184
 void rtl8168_mdio_prot_write(struct rtl8168_private *tp, u32 RegAddr, u32 value);
185
 void rtl8168_mdio_prot_direct_write_phy_ocp(struct rtl8168_private *tp, u32 RegAddr, u32 value);
186
-u32 rtl8168_mdio_read(struct rtl8168_private *tp, u32 RegAddr);
187
+u32 rtl8168_mdio_read(struct rtl8168_private *tp, u16 RegAddr);
188
 u32 rtl8168_mdio_prot_read(struct rtl8168_private *tp, u32 RegAddr);
189
 u32 rtl8168_mdio_prot_direct_read_phy_ocp(struct rtl8168_private *tp, u32 RegAddr);
190
 void rtl8168_ephy_write(struct rtl8168_private *tp, int RegAddr, int value);
191
@@ -1789,7 +1811,6 @@
192
 void rtl8168_init_ring_indexes(struct rtl8168_private *tp);
193
 int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type);
194
 void rtl8168_oob_mutex_lock(struct rtl8168_private *tp);
195
-u32 rtl8168_mdio_read(struct rtl8168_private *tp, u32 RegAddr);
196
 u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len);
197
 u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 base_address);
198
 u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
199
@@ -1811,6 +1832,7 @@
200
 #define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M)        ((_M)->HwSuppCheckPhyDisableModeVer > 0 )
201
 #define HW_SUPP_SERDES_PHY(_M)        ((_M)->HwSuppSerDesPhyVer > 0)
202
 #define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M)        (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0)
203
+#define HW_SUPPORT_UPS_MODE(_M)        ((_M)->HwSuppUpsVer > 0)
204
 
205
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
206
 #define netdev_mc_count(dev) ((dev)->mc_count)
207
r8168-8.048.03.tar.gz/src/r8168_asf.c -> r8168-8.049.02.tar.gz/src/r8168_asf.c Changed
14
 
1
@@ -1,10 +1,11 @@
2
+// SPDX-License-Identifier: GPL-2.0-only
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
r8168-8.048.03.tar.gz/src/r8168_asf.h -> r8168-8.049.02.tar.gz/src/r8168_asf.h Changed
14
 
1
@@ -1,10 +1,11 @@
2
+/* SPDX-License-Identifier: GPL-2.0-only */
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
r8168-8.048.03.tar.gz/src/r8168_dash.h -> r8168-8.049.02.tar.gz/src/r8168_dash.h Changed
64
 
1
@@ -1,10 +1,11 @@
2
+/* SPDX-License-Identifier: GPL-2.0-only */
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
@@ -114,25 +115,23 @@
15
 };
16
 
17
 typedef struct _RX_DASH_FROM_FW_DESC {
18
-        u16 length;
19
-        u8 statusLowByte;
20
-        u8 statusHighByte;
21
-        u32 resv;
22
-        u64 BufferAddress;
23
+        __le16 length;
24
+        __le16 status;
25
+        __le32 resv;
26
+        __le64 BufferAddress;
27
 }
28
 RX_DASH_FROM_FW_DESC, *PRX_DASH_FROM_FW_DESC;
29
 
30
 typedef struct _TX_DASH_SEND_FW_DESC {
31
-        u16 length;
32
-        u8 statusLowByte;
33
-        u8 statusHighByte;
34
-        u32 resv;
35
-        u64 BufferAddress;
36
+        __le16 length;
37
+        __le16 status;
38
+        __le32 resv;
39
+        __le64 BufferAddress;
40
 }
41
 TX_DASH_SEND_FW_DESC, *PTX_DASH_SEND_FW_DESC;
42
 
43
 typedef struct _OSOOBHdr {
44
-        u32 len;
45
+        __le32 len;
46
         u8 type;
47
         u8 flag;
48
         u8 hostReqV;
49
@@ -177,12 +176,11 @@
50
 #define HW_DASH_SUPPORT_TYPE_2(_M)        ((_M)->HwSuppDashVer == 2)
51
 #define HW_DASH_SUPPORT_TYPE_3(_M)        ((_M)->HwSuppDashVer == 3)
52
 
53
-#define RECV_FROM_FW_BUF_SIZE (1520)
54
-#define SEND_TO_FW_BUF_SIZE (1520)
55
+#define RECV_FROM_FW_BUF_SIZE (2048)
56
+#define SEND_TO_FW_BUF_SIZE (2048)
57
 
58
 #define RX_DASH_FROM_FW_OWN BIT_15
59
 #define TX_DASH_SEND_FW_OWN BIT_15
60
-#define TX_DASH_SEND_FW_OWN_HIGHBYTE BIT_7
61
 
62
 #define TXS_CC3_0       (BIT_0|BIT_1|BIT_2|BIT_3)
63
 #define TXS_EXC         BIT_4
64
r8168-8.048.03.tar.gz/src/r8168_fiber.h -> r8168-8.049.02.tar.gz/src/r8168_fiber.h Changed
14
 
1
@@ -1,10 +1,11 @@
2
+/* SPDX-License-Identifier: GPL-2.0-only */
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
r8168-8.049.02.tar.gz/src/r8168_firmware.c Added
266
 
1
@@ -0,0 +1,264 @@
2
+// SPDX-License-Identifier: GPL-2.0-only
3
+/*
4
+################################################################################
5
+#
6
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
+# controllers with PCI-Express interface.
8
+#
9
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
10
+#
11
+# This program is free software; you can redistribute it and/or modify it
12
+# under the terms of the GNU General Public License as published by the Free
13
+# Software Foundation; either version 2 of the License, or (at your option)
14
+# any later version.
15
+#
16
+# This program is distributed in the hope that it will be useful, but WITHOUT
17
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19
+# more details.
20
+#
21
+# You should have received a copy of the GNU General Public License along with
22
+# this program; if not, see <http://www.gnu.org/licenses/>.
23
+#
24
+# Author:
25
+# Realtek NIC software team <nicfae@realtek.com>
26
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
27
+#
28
+################################################################################
29
+*/
30
+
31
+/************************************************************************************
32
+ *  This product is covered by one or more of the following patents:
33
+ *  US6,570,884, US6,115,776, and US6,327,625.
34
+ ***********************************************************************************/
35
+
36
+#include <linux/version.h>
37
+#include <linux/delay.h>
38
+#include <linux/firmware.h>
39
+
40
+#include "r8168_firmware.h"
41
+
42
+enum rtl_fw_opcode {
43
+        PHY_READ       = 0x0,
44
+        PHY_DATA_OR        = 0x1,
45
+        PHY_DATA_AND       = 0x2,
46
+        PHY_BJMPN      = 0x3,
47
+        PHY_MDIO_CHG       = 0x4,
48
+        PHY_CLEAR_READCOUNT    = 0x7,
49
+        PHY_WRITE      = 0x8,
50
+        PHY_READCOUNT_EQ_SKIP  = 0x9,
51
+        PHY_COMP_EQ_SKIPN  = 0xa,
52
+        PHY_COMP_NEQ_SKIPN = 0xb,
53
+        PHY_WRITE_PREVIOUS = 0xc,
54
+        PHY_SKIPN      = 0xd,
55
+        PHY_DELAY_MS       = 0xe,
56
+};
57
+
58
+struct fw_info {
59
+        u32    magic;
60
+        char   version[RTL8168_VER_SIZE];
61
+        __le32 fw_start;
62
+        __le32 fw_len;
63
+        u8 chksum;
64
+} __packed;
65
+
66
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0)
67
+#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)->MEMBER))
68
+#endif
69
+#define FW_OPCODE_SIZE sizeof_field(struct rtl8168_fw_phy_action, code[0])
70
+
71
+static bool rtl8168_fw_format_ok(struct rtl8168_fw *rtl_fw)
72
+{
73
+        const struct firmware *fw = rtl_fw->fw;
74
+        struct fw_info *fw_info = (struct fw_info *)fw->data;
75
+        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
76
+
77
+        if (fw->size < FW_OPCODE_SIZE)
78
+                return false;
79
+
80
+        if (!fw_info->magic) {
81
+                size_t i, size, start;
82
+                u8 checksum = 0;
83
+
84
+                if (fw->size < sizeof(*fw_info))
85
+                        return false;
86
+
87
+                for (i = 0; i < fw->size; i++)
88
+                        checksum += fw->data[i];
89
+                if (checksum != 0)
90
+                        return false;
91
+
92
+                start = le32_to_cpu(fw_info->fw_start);
93
+                if (start > fw->size)
94
+                        return false;
95
+
96
+                size = le32_to_cpu(fw_info->fw_len);
97
+                if (size > (fw->size - start) / FW_OPCODE_SIZE)
98
+                        return false;
99
+
100
+                strscpy(rtl_fw->version, fw_info->version, RTL8168_VER_SIZE);
101
+
102
+                pa->code = (__le32 *)(fw->data + start);
103
+                pa->size = size;
104
+        } else {
105
+                if (fw->size % FW_OPCODE_SIZE)
106
+                        return false;
107
+
108
+                strscpy(rtl_fw->version, rtl_fw->fw_name, RTL8168_VER_SIZE);
109
+
110
+                pa->code = (__le32 *)fw->data;
111
+                pa->size = fw->size / FW_OPCODE_SIZE;
112
+        }
113
+
114
+        return true;
115
+}
116
+
117
+static bool rtl8168_fw_data_ok(struct rtl8168_fw *rtl_fw)
118
+{
119
+        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
120
+        size_t index;
121
+
122
+        for (index = 0; index < pa->size; index++) {
123
+                u32 action = le32_to_cpu(pa->code[index]);
124
+                u32 val = action & 0x0000ffff;
125
+                u32 regno = (action & 0x0fff0000) >> 16;
126
+
127
+                switch (action >> 28) {
128
+                case PHY_READ:
129
+                case PHY_DATA_OR:
130
+                case PHY_DATA_AND:
131
+                case PHY_CLEAR_READCOUNT:
132
+                case PHY_WRITE:
133
+                case PHY_WRITE_PREVIOUS:
134
+                case PHY_DELAY_MS:
135
+                        break;
136
+
137
+                case PHY_MDIO_CHG:
138
+                        if (val > 1)
139
+                                goto out;
140
+                        break;
141
+
142
+                case PHY_BJMPN:
143
+                        if (regno > index)
144
+                                goto out;
145
+                        break;
146
+                case PHY_READCOUNT_EQ_SKIP:
147
+                        if (index + 2 >= pa->size)
148
+                                goto out;
149
+                        break;
150
+                case PHY_COMP_EQ_SKIPN:
151
+                case PHY_COMP_NEQ_SKIPN:
152
+                case PHY_SKIPN:
153
+                        if (index + 1 + regno >= pa->size)
154
+                                goto out;
155
+                        break;
156
+
157
+                default:
158
+                        dev_err(rtl_fw->dev, "Invalid action 0x%08x\n", action);
159
+                        return false;
160
+                }
161
+        }
162
+
163
+        return true;
164
+out:
165
+        dev_err(rtl_fw->dev, "Out of range of firmware\n");
166
+        return false;
167
+}
168
+
169
+void rtl8168_fw_write_firmware(struct rtl8168_private *tp, struct rtl8168_fw *rtl_fw)
170
+{
171
+        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
172
+        rtl8168_fw_write_t fw_write = rtl_fw->phy_write;
173
+        rtl8168_fw_read_t fw_read = rtl_fw->phy_read;
174
+        int predata = 0, count = 0;
175
+        size_t index;
176
+
177
+        for (index = 0; index < pa->size; index++) {
178
+                u32 action = le32_to_cpu(pa->code[index]);
179
+                u32 data = action & 0x0000ffff;
180
+                u32 regno = (action & 0x0fff0000) >> 16;
181
+                enum rtl_fw_opcode opcode = action >> 28;
182
+
183
+                if (!action)
184
+                        break;
185
+
186
+                switch (opcode) {
187
+                case PHY_READ:
188
+                        predata = fw_read(tp, regno);
189
+                        count++;
190
+                        break;
191
+                case PHY_DATA_OR:
192
+                        predata |= data;
193
+                        break;
194
+                case PHY_DATA_AND:
195
+                        predata &= data;
196
+                        break;
197
+                case PHY_BJMPN:
198
+                        index -= (regno + 1);
199
+                        break;
200
+                case PHY_MDIO_CHG:
201
+                        if (data) {
202
+                                fw_write = rtl_fw->mac_mcu_write;
203
+                                fw_read = rtl_fw->mac_mcu_read;
204
+                        } else {
205
+                                fw_write = rtl_fw->phy_write;
206
+                                fw_read = rtl_fw->phy_read;
207
+                        }
208
+
209
+                        break;
210
+                case PHY_CLEAR_READCOUNT:
211
+                        count = 0;
212
+                        break;
213
+                case PHY_WRITE:
214
+                        fw_write(tp, regno, data);
215
+                        break;
216
+                case PHY_READCOUNT_EQ_SKIP:
217
+                        if (count == data)
218
+                                index++;
219
+                        break;
220
+                case PHY_COMP_EQ_SKIPN:
221
+                        if (predata == data)
222
+                                index += regno;
223
+                        break;
224
+                case PHY_COMP_NEQ_SKIPN:
225
+                        if (predata != data)
226
+                                index += regno;
227
+                        break;
228
+                case PHY_WRITE_PREVIOUS:
229
+                        fw_write(tp, regno, predata);
230
+                        break;
231
+                case PHY_SKIPN:
232
+                        index += regno;
233
+                        break;
234
+                case PHY_DELAY_MS:
235
+                        mdelay(data);
236
+                        break;
237
+                }
238
+        }
239
+}
240
+
241
+void rtl8168_fw_release_firmware(struct rtl8168_fw *rtl_fw)
242
+{
243
+        release_firmware(rtl_fw->fw);
244
+}
245
+
246
+int rtl8168_fw_request_firmware(struct rtl8168_fw *rtl_fw)
247
+{
248
+        int rc;
249
+
250
+        rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
251
+        if (rc < 0)
252
+                goto out;
253
+
254
+        if (!rtl8168_fw_format_ok(rtl_fw) || !rtl8168_fw_data_ok(rtl_fw)) {
255
+                release_firmware(rtl_fw->fw);
256
+                rc = -EINVAL;
257
+                goto out;
258
+        }
259
+
260
+        return 0;
261
+out:
262
+        dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
263
+                rtl_fw->fw_name, rc);
264
+        return rc;
265
+}
266
r8168-8.049.02.tar.gz/src/r8168_firmware.h Added
70
 
1
@@ -0,0 +1,68 @@
2
+/* SPDX-License-Identifier: GPL-2.0-only */
3
+/*
4
+################################################################################
5
+#
6
+# r8168 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
7
+# controllers with PCI-Express interface.
8
+#
9
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
10
+#
11
+# This program is free software; you can redistribute it and/or modify it
12
+# under the terms of the GNU General Public License as published by the Free
13
+# Software Foundation; either version 2 of the License, or (at your option)
14
+# any later version.
15
+#
16
+# This program is distributed in the hope that it will be useful, but WITHOUT
17
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19
+# more details.
20
+#
21
+# You should have received a copy of the GNU General Public License along with
22
+# this program; if not, see <http://www.gnu.org/licenses/>.
23
+#
24
+# Author:
25
+# Realtek NIC software team <nicfae@realtek.com>
26
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
27
+#
28
+################################################################################
29
+*/
30
+
31
+/************************************************************************************
32
+ *  This product is covered by one or more of the following patents:
33
+ *  US6,570,884, US6,115,776, and US6,327,625.
34
+ ***********************************************************************************/
35
+
36
+#ifndef _LINUX_RTL8168_FIRMWARE_H
37
+#define _LINUX_RTL8168_FIRMWARE_H
38
+
39
+#include <linux/device.h>
40
+#include <linux/firmware.h>
41
+
42
+struct rtl8168_private;
43
+typedef void (*rtl8168_fw_write_t)(struct rtl8168_private *tp, u16 reg, u16 val);
44
+typedef u32 (*rtl8168_fw_read_t)(struct rtl8168_private *tp, u16 reg);
45
+
46
+#define RTL8168_VER_SIZE       32
47
+
48
+struct rtl8168_fw {
49
+        rtl8168_fw_write_t phy_write;
50
+        rtl8168_fw_read_t phy_read;
51
+        rtl8168_fw_write_t mac_mcu_write;
52
+        rtl8168_fw_read_t mac_mcu_read;
53
+        const struct firmware *fw;
54
+        const char *fw_name;
55
+        struct device *dev;
56
+
57
+        char version[RTL8168_VER_SIZE];
58
+
59
+        struct rtl8168_fw_phy_action {
60
+                __le32 *code;
61
+                size_t size;
62
+        } phy_action;
63
+};
64
+
65
+int rtl8168_fw_request_firmware(struct rtl8168_fw *rtl_fw);
66
+void rtl8168_fw_release_firmware(struct rtl8168_fw *rtl_fw);
67
+void rtl8168_fw_write_firmware(struct rtl8168_private *tp, struct rtl8168_fw *rtl_fw);
68
+
69
+#endif /* _LINUX_RTL8168_FIRMWARE_H */
70
r8168-8.048.03.tar.gz/src/r8168_n.c -> r8168-8.049.02.tar.gz/src/r8168_n.c Changed
4463
 
1
@@ -1,10 +1,11 @@
2
+// SPDX-License-Identifier: GPL-2.0-only
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
@@ -87,16 +88,78 @@
15
 #include "r8168_asf.h"
16
 #include "rtl_eeprom.h"
17
 #include "rtltool.h"
18
+#include "r8168_firmware.h"
19
 
20
 #ifdef ENABLE_R8168_PROCFS
21
 #include <linux/proc_fs.h>
22
 #include <linux/seq_file.h>
23
 #endif
24
 
25
+#define FIRMWARE_8168D_1    "rtl_nic/rtl8168d-1.fw"
26
+#define FIRMWARE_8168D_2    "rtl_nic/rtl8168d-2.fw"
27
+#define FIRMWARE_8168E_1    "rtl_nic/rtl8168e-1.fw"
28
+#define FIRMWARE_8168E_2    "rtl_nic/rtl8168e-2.fw"
29
+#define FIRMWARE_8168E_3    "rtl_nic/rtl8168e-3.fw"
30
+#define FIRMWARE_8168E_4    "rtl_nic/rtl8168e-4.fw"
31
+#define FIRMWARE_8168F_1    "rtl_nic/rtl8168f-1.fw"
32
+#define FIRMWARE_8168F_2    "rtl_nic/rtl8168f-2.fw"
33
+#define FIRMWARE_8411_1     "rtl_nic/rtl8411-1.fw"
34
+#define FIRMWARE_8411_2     "rtl_nic/rtl8411-2.fw"
35
+#define FIRMWARE_8168G_2    "rtl_nic/rtl8168g-2.fw"
36
+#define FIRMWARE_8168G_3    "rtl_nic/rtl8168g-3.fw"
37
+#define FIRMWARE_8168EP_1   "rtl_nic/rtl8168ep-1.fw"
38
+#define FIRMWARE_8168EP_2   "rtl_nic/rtl8168ep-2.fw"
39
+#define FIRMWARE_8168EP_3   "rtl_nic/rtl8168ep-3.fw"
40
+#define FIRMWARE_8168H_1    "rtl_nic/rtl8168h-1.fw"
41
+#define FIRMWARE_8168H_2    "rtl_nic/rtl8168h-2.fw"
42
+#define FIRMWARE_8168FP_3   "rtl_nic/rtl8168fp-3.fw"
43
+#define FIRMWARE_8168FP_4   "rtl_nic/rtl8168fp-4.fw"
44
+
45
 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
46
    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
47
 static const int multicast_filter_limit = 32;
48
 
49
+static const struct {
50
+        const char *name;
51
+        const char *fw_name;
52
+} rtl_chip_fw_infos[] = {
53
+        /* PCI-E devices. */
54
+        [CFG_METHOD_1] = {"RTL8168B/8111",          },
55
+        [CFG_METHOD_2] = {"RTL8168B/8111",          },
56
+        [CFG_METHOD_3] = {"RTL8168B/8111",          },
57
+        [CFG_METHOD_4] = {"RTL8168C/8111C",         },
58
+        [CFG_METHOD_5] = {"RTL8168C/8111C",         },
59
+        [CFG_METHOD_6] = {"RTL8168C/8111C",         },
60
+        [CFG_METHOD_7] = {"RTL8168CP/8111CP",       },
61
+        [CFG_METHOD_8] = {"RTL8168CP/8111CP",       },
62
+        [CFG_METHOD_9] = {"RTL8168D/8111D",         FIRMWARE_8168D_1},
63
+        [CFG_METHOD_10] = {"RTL8168D/8111D",        FIRMWARE_8168D_2},
64
+        [CFG_METHOD_11] = {"RTL8168DP/8111DP",      },
65
+        [CFG_METHOD_12] = {"RTL8168DP/8111DP",      },
66
+        [CFG_METHOD_13] = {"RTL8168DP/8111DP",      },
67
+        [CFG_METHOD_14] = {"RTL8168E/8111E",        FIRMWARE_8168E_1},
68
+        [CFG_METHOD_15] = {"RTL8168E/8111E",        FIRMWARE_8168E_2},
69
+        [CFG_METHOD_16] = {"RTL8168E-VL/8111E-VL",  FIRMWARE_8168E_3},
70
+        [CFG_METHOD_17] = {"RTL8168E-VL/8111E-VL",  FIRMWARE_8168E_4},
71
+        [CFG_METHOD_18] = {"RTL8168F/8111F",        FIRMWARE_8168F_1},
72
+        [CFG_METHOD_19] = {"RTL8168F/8111F",        FIRMWARE_8168F_2},
73
+        [CFG_METHOD_20] = {"RTL8411",               FIRMWARE_8411_1},
74
+        [CFG_METHOD_21] = {"RTL8168G/8111G",        FIRMWARE_8168G_2},
75
+        [CFG_METHOD_22] = {"RTL8168G/8111G",        },
76
+        [CFG_METHOD_23] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_1},
77
+        [CFG_METHOD_24] = {"RTL8168GU/8111GU",      },
78
+        [CFG_METHOD_25] = {"RTL8168GU/8111GU",      FIRMWARE_8168G_3},
79
+        [CFG_METHOD_26] = {"8411B",                 FIRMWARE_8411_2},
80
+        [CFG_METHOD_27] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_2},
81
+        [CFG_METHOD_28] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_3},
82
+        [CFG_METHOD_29] = {"RTL8168H/8111H",        FIRMWARE_8168H_1},
83
+        [CFG_METHOD_30] = {"RTL8168H/8111H",        FIRMWARE_8168H_2},
84
+        [CFG_METHOD_31] = {"RTL8168FP/8111FP",      },
85
+        [CFG_METHOD_32] = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_3},
86
+        [CFG_METHOD_33] = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
87
+        [CFG_METHOD_DEFAULT] = {"Unknown",          },
88
+};
89
+
90
 #define _R(NAME,MAC,RCR,MASK, JumFrameSz) \
91
     { .name = NAME, .mcfg = MAC, .RCR_Cfg = RCR, .RxConfigMask = MASK, .jumbo_frame_sz = JumFrameSz }
92
 
93
@@ -331,6 +394,7 @@
94
 static int rx_copybreak = 0;
95
 static int use_dac = 1;
96
 static int timer_count = 0x2600;
97
+static int dynamic_aspm_packet_threshold = 10;
98
 
99
 static struct {
100
         u32 msg_enable;
101
@@ -350,6 +414,11 @@
102
 #else
103
 static int aspm = 0;
104
 #endif
105
+#ifdef CONFIG_DYNAMIC_ASPM
106
+static int dynamic_aspm = 1;
107
+#else
108
+static int dynamic_aspm = 0;
109
+#endif
110
 #ifdef ENABLE_S5WOL
111
 static int s5wol = 1;
112
 #else
113
@@ -394,6 +463,9 @@
114
 module_param(aspm, int, 0);
115
 MODULE_PARM_DESC(aspm, "Enable ASPM.");
116
 
117
+module_param(dynamic_aspm, int, 0);
118
+MODULE_PARM_DESC(aspm, "Enable Software Dynamic ASPM.");
119
+
120
 module_param(s5wol, int, 0);
121
 MODULE_PARM_DESC(s5wol, "Enable Shutdown Wake On Lan.");
122
 
123
@@ -418,12 +490,36 @@
124
 module_param(s0_magic_packet, int, 0);
125
 MODULE_PARM_DESC(s0_magic_packet, "Enable S0 Magic Packet.");
126
 
127
+module_param(dynamic_aspm_packet_threshold, int, 0);
128
+MODULE_PARM_DESC(dynamic_aspm_packet_threshold, "Dynamic ASPM packet threshold.");
129
+
130
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
131
 module_param_named(debug, debug.msg_enable, int, 0);
132
 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
133
 #endif//LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
134
 
135
 MODULE_LICENSE("GPL");
136
+#ifdef ENABLE_USE_FIRMWARE_FILE
137
+MODULE_FIRMWARE(FIRMWARE_8168D_1);
138
+MODULE_FIRMWARE(FIRMWARE_8168D_2);
139
+MODULE_FIRMWARE(FIRMWARE_8168E_1);
140
+MODULE_FIRMWARE(FIRMWARE_8168E_2);
141
+MODULE_FIRMWARE(FIRMWARE_8168E_3);
142
+MODULE_FIRMWARE(FIRMWARE_8168E_4);
143
+MODULE_FIRMWARE(FIRMWARE_8168F_1);
144
+MODULE_FIRMWARE(FIRMWARE_8168F_2);
145
+MODULE_FIRMWARE(FIRMWARE_8411_1);
146
+MODULE_FIRMWARE(FIRMWARE_8411_2);
147
+MODULE_FIRMWARE(FIRMWARE_8168G_2);
148
+MODULE_FIRMWARE(FIRMWARE_8168G_3);
149
+MODULE_FIRMWARE(FIRMWARE_8168EP_1);
150
+MODULE_FIRMWARE(FIRMWARE_8168EP_2);
151
+MODULE_FIRMWARE(FIRMWARE_8168EP_3);
152
+MODULE_FIRMWARE(FIRMWARE_8168H_1);
153
+MODULE_FIRMWARE(FIRMWARE_8168H_2);
154
+MODULE_FIRMWARE(FIRMWARE_8168FP_3);
155
+MODULE_FIRMWARE(FIRMWARE_8168FP_4);
156
+#endif
157
 
158
 MODULE_VERSION(RTL8168_VERSION);
159
 
160
@@ -444,7 +540,7 @@
161
 static void rtl8168_rx_clear(struct rtl8168_private *tp);
162
 
163
 static int rtl8168_open(struct net_device *dev);
164
-static int rtl8168_start_xmit(struct sk_buff *skb, struct net_device *dev);
165
+static netdev_tx_t rtl8168_start_xmit(struct sk_buff *skb, struct net_device *dev);
166
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
167
 static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
168
 #else
169
@@ -472,6 +568,8 @@
170
 static void rtl8168_tx_desc_init(struct rtl8168_private *tp);
171
 static void rtl8168_rx_desc_init(struct rtl8168_private *tp);
172
 
173
+static u16 rtl8168_get_hw_phy_mcu_code_ver(struct rtl8168_private *tp);
174
+
175
 static void rtl8168_hw_reset(struct net_device *dev);
176
 
177
 static void rtl8168_phy_power_up(struct net_device *dev);
178
@@ -485,6 +583,17 @@
179
 static int rtl8168_poll(napi_ptr napi, napi_budget budget);
180
 #endif
181
 
182
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
183
+static void rtl8168_reset_task(void *_data);
184
+#else
185
+static void rtl8168_reset_task(struct work_struct *work);
186
+#endif
187
+
188
+static inline struct device *tp_to_dev(struct rtl8168_private *tp)
189
+{
190
+        return &tp->pci_dev->dev;
191
+}
192
+
193
 #if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) && \
194
      LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,00)))
195
 void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst,
196
@@ -809,7 +918,7 @@
197
         u64 rx_broadcast;
198
         u32 rx_multicast;
199
         u16 tx_aborted;
200
-        u16 tx_underun;
201
+        u16 tx_underrun;
202
 };
203
 
204
 #ifdef ENABLE_R8168_PROCFS
205
@@ -904,9 +1013,10 @@
206
         seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num);
207
         seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet);
208
         seq_printf(m, "HwSuppMagicPktVer\t0x%x\n", tp->HwSuppMagicPktVer);
209
+        seq_printf(m, "HwSuppUpsVer\t0x%x\n", tp->HwSuppUpsVer);
210
+        seq_printf(m, "HwSuppEsdVer\t0x%x\n", tp->HwSuppEsdVer);
211
         seq_printf(m, "HwSuppCheckPhyDisableModeVer\t0x%x\n", tp->HwSuppCheckPhyDisableModeVer);
212
         seq_printf(m, "HwPkgDet\t0x%x\n", tp->HwPkgDet);
213
-        seq_printf(m, "HwSuppGigaForceMode\t0x%x\n", tp->HwSuppGigaForceMode);
214
         seq_printf(m, "random_mac\t0x%x\n", tp->random_mac);
215
         seq_printf(m, "org_mac_addr\t%pM\n", tp->org_mac_addr);
216
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
217
@@ -960,15 +1070,16 @@
218
         seq_printf(m, "tx_packets\t%lld\n", le64_to_cpu(counters->tx_packets));
219
         seq_printf(m, "rx_packets\t%lld\n", le64_to_cpu(counters->rx_packets));
220
         seq_printf(m, "tx_errors\t%lld\n", le64_to_cpu(counters->tx_errors));
221
-        seq_printf(m, "rx_missed\t%lld\n", le64_to_cpu(counters->rx_missed));
222
-        seq_printf(m, "align_errors\t%lld\n", le64_to_cpu(counters->align_errors));
223
-        seq_printf(m, "tx_one_collision\t%lld\n", le64_to_cpu(counters->tx_one_collision));
224
-        seq_printf(m, "tx_multi_collision\t%lld\n", le64_to_cpu(counters->tx_multi_collision));
225
+        seq_printf(m, "rx_errors\t%d\n", le32_to_cpu(counters->rx_errors));
226
+        seq_printf(m, "rx_missed\t%d\n", le16_to_cpu(counters->rx_missed));
227
+        seq_printf(m, "align_errors\t%d\n", le16_to_cpu(counters->align_errors));
228
+        seq_printf(m, "tx_one_collision\t%d\n", le32_to_cpu(counters->tx_one_collision));
229
+        seq_printf(m, "tx_multi_collision\t%d\n", le32_to_cpu(counters->tx_multi_collision));
230
         seq_printf(m, "rx_unicast\t%lld\n", le64_to_cpu(counters->rx_unicast));
231
         seq_printf(m, "rx_broadcast\t%lld\n", le64_to_cpu(counters->rx_broadcast));
232
-        seq_printf(m, "rx_multicast\t%lld\n", le64_to_cpu(counters->rx_multicast));
233
-        seq_printf(m, "tx_aborted\t%lld\n", le64_to_cpu(counters->tx_aborted));
234
-        seq_printf(m, "tx_underun\t%lld\n", le64_to_cpu(counters->tx_underun));
235
+        seq_printf(m, "rx_multicast\t%d\n", le32_to_cpu(counters->rx_multicast));
236
+        seq_printf(m, "tx_aborted\t%d\n", le16_to_cpu(counters->tx_aborted));
237
+        seq_printf(m, "tx_underrun\t%d\n", le16_to_cpu(counters->tx_underrun));
238
 
239
         seq_putc(m, '\n');
240
         return 0;
241
@@ -1214,9 +1325,10 @@
242
                         "proc_init_num\t0x%x\n"
243
                         "s0_magic_packet\t0x%x\n"
244
                         "HwSuppMagicPktVer\t0x%x\n"
245
+                        "HwSuppUpsVer\t0x%x\n"
246
+                        "HwSuppEsdVer\t0x%x\n"
247
                         "HwSuppCheckPhyDisableModeVer\t0x%x\n"
248
                         "HwPkgDet\t0x%x\n"
249
-                        "HwSuppGigaForceMode\t0x%x\n"
250
                         "random_mac\t0x%x\n"
251
                         "org_mac_addr\t%pM\n"
252
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
253
@@ -1295,9 +1407,10 @@
254
                         proc_init_num,
255
                         s0_magic_packet,
256
                         tp->HwSuppMagicPktVer,
257
+                        tp->HwSuppUpsVer,
258
+                        tp->HwSuppEsdVer,
259
                         tp->HwSuppCheckPhyDisableModeVer,
260
                         tp->HwPkgDet,
261
-                        tp->HwSuppGigaForceMode,
262
                         tp->random_mac,
263
                         tp->org_mac_addr,
264
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
265
@@ -1362,27 +1475,29 @@
266
                         "tx_packets\t%lld\n"
267
                         "rx_packets\t%lld\n"
268
                         "tx_errors\t%lld\n"
269
-                        "rx_missed\t%lld\n"
270
-                        "align_errors\t%lld\n"
271
-                        "tx_one_collision\t%lld\n"
272
-                        "tx_multi_collision\t%lld\n"
273
+                        "rx_errors\t%d\n"
274
+                        "rx_missed\t%d\n"
275
+                        "align_errors\t%d\n"
276
+                        "tx_one_collision\t%d\n"
277
+                        "tx_multi_collision\t%d\n"
278
                         "rx_unicast\t%lld\n"
279
                         "rx_broadcast\t%lld\n"
280
-                        "rx_multicast\t%lld\n"
281
-                        "tx_aborted\t%lld\n"
282
-                        "tx_underun\t%lld\n",
283
+                        "rx_multicast\t%d\n"
284
+                        "tx_aborted\t%d\n"
285
+                        "tx_underrun\t%d\n",
286
                         le64_to_cpu(counters->tx_packets),
287
                         le64_to_cpu(counters->rx_packets),
288
                         le64_to_cpu(counters->tx_errors),
289
-                        le64_to_cpu(counters->rx_missed),
290
-                        le64_to_cpu(counters->align_errors),
291
-                        le64_to_cpu(counters->tx_one_collision),
292
-                        le64_to_cpu(counters->tx_multi_collision),
293
+                        le32_to_cpu(counters->rx_errors),
294
+                        le16_to_cpu(counters->rx_missed),
295
+                        le16_to_cpu(counters->align_errors),
296
+                        le32_to_cpu(counters->tx_one_collision),
297
+                        le32_to_cpu(counters->tx_multi_collision),
298
                         le64_to_cpu(counters->rx_unicast),
299
                         le64_to_cpu(counters->rx_broadcast),
300
-                        le64_to_cpu(counters->rx_multicast),
301
-                        le64_to_cpu(counters->tx_aborted),
302
-                        le64_to_cpu(counters->tx_underun)
303
+                        le32_to_cpu(counters->rx_multicast),
304
+                        le16_to_cpu(counters->tx_aborted),
305
+                        le16_to_cpu(counters->tx_underrun)
306
                        );
307
 
308
         len += snprintf(page + len, count - len, "\n");
309
@@ -1884,8 +1999,8 @@
310
 }
311
 
312
 void rtl8168_mdio_write(struct rtl8168_private *tp,
313
-                        u32 RegAddr,
314
-                        u32 value)
315
+                        u16 RegAddr,
316
+                        u16 value)
317
 {
318
         if (tp->rtk_enable_diag) return;
319
 
320
@@ -2023,7 +2138,7 @@
321
 }
322
 
323
 u32 rtl8168_mdio_read(struct rtl8168_private *tp,
324
-                      u32 RegAddr)
325
+                      u16 RegAddr)
326
 {
327
         if (tp->rtk_enable_diag) return 0xffffffff;
328
 
329
@@ -2105,6 +2220,23 @@
330
         return data16;
331
 }
332
 
333
+#ifdef ENABLE_USE_FIRMWARE_FILE
334
+static void mac_mcu_write(struct rtl8168_private *tp, u16 reg, u16 value)
335
+{
336
+        if (reg == 0x1f) {
337
+                tp->ocp_base = value << 4;
338
+                return;
339
+        }
340
+
341
+        rtl8168_mac_ocp_write(tp, tp->ocp_base + reg, value);
342
+}
343
+
344
+static u32 mac_mcu_read(struct rtl8168_private *tp, u16 reg)
345
+{
346
+        return rtl8168_mac_ocp_read(tp, tp->ocp_base + reg);
347
+}
348
+#endif
349
+
350
 static void
351
 rtl8168_clear_and_set_mcu_ocp_bit(
352
         struct rtl8168_private *tp,
353
@@ -2734,52 +2866,51 @@
354
         u8 i;
355
         u8 FunBit;
356
 
357
-        switch(tp->mcfg) {
358
-        case CFG_METHOD_23:
359
-        case CFG_METHOD_27:
360
-        case CFG_METHOD_28:
361
-                FunBit = 1;
362
-                //0: UMAC, 1: TCR1, 2: TCR2, 3: KCS, 4: EHCI(Control by EHCI Driver)
363
-                for (i = 0; i < 8; i++) {
364
-                        if (FunBit & multi_fun_sel_bit)
365
-                                rtl8168_clear_and_set_other_fun_pci_bit(tp, i, addr, clearmask, setmask);
366
-
367
-                        FunBit <<= 1;
368
-                }
369
-                break;
370
-        case CFG_METHOD_31:
371
-        case CFG_METHOD_32:
372
-        case CFG_METHOD_33:
373
-                FunBit = 1;
374
-                for (i = 0; i < 8; i++) {
375
-                        if (FunBit & multi_fun_sel_bit) {
376
-                                u8 set_other_fun = TRUE;
377
+        for (i = 0; i < 8; i++) {
378
+                FunBit = (1 << i);
379
+                if (FunBit & multi_fun_sel_bit) {
380
+                        u8 set_other_fun = TRUE;
381
 
382
-                                if (i == 3 || i == 4) {
383
+                        switch(tp->mcfg) {
384
+                        case CFG_METHOD_23:
385
+                        case CFG_METHOD_27:
386
+                        case CFG_METHOD_28:
387
+                                //0: UMAC, 1: TCR1, 2: TCR2, 3: KCS, 4: EHCI(Control by EHCI Driver)
388
+                                if (i < 5) {
389
                                         TmpUlong = rtl8168_csi_other_fun_read(tp, i, 0x00);
390
-
391
                                         if (TmpUlong == 0xFFFFFFFF)
392
                                                 set_other_fun = TRUE;
393
                                         else
394
                                                 set_other_fun = FALSE;
395
-                                } else if (i == 5 || i == 6) {
396
+                                }
397
+                                break;
398
+                        case CFG_METHOD_31:
399
+                        case CFG_METHOD_32:
400
+                        case CFG_METHOD_33:
401
+                                //0: BMC, 1: NIC, 2: TCR, 3: VGA/PCIE_TO_USB, 4: EHCI, 5: WIFI, 6: WIFI, 7: KCS
402
+                                if (i == 5 || i == 6) {
403
                                         if (tp->DASH) {
404
                                                 TmpUlong = rtl8168_ocp_read(tp, 0x184, 4);
405
-
406
                                                 if (TmpUlong & BIT_26)
407
                                                         set_other_fun = FALSE;
408
                                                 else
409
                                                         set_other_fun = TRUE;
410
                                         }
411
+                                } else { //function 0/1/2/3/4/7
412
+                                        TmpUlong = rtl8168_csi_other_fun_read(tp, i, 0x00);
413
+                                        if (TmpUlong == 0xFFFFFFFF)
414
+                                                set_other_fun = TRUE;
415
+                                        else
416
+                                                set_other_fun = FALSE;
417
                                 }
418
-
419
-                                if (set_other_fun)
420
-                                        rtl8168_clear_and_set_other_fun_pci_bit(tp, i, addr, clearmask, setmask);
421
+                                break;
422
+                        default:
423
+                                return;
424
                         }
425
 
426
-                        FunBit <<= 1;
427
+                        if (set_other_fun)
428
+                                rtl8168_clear_and_set_other_fun_pci_bit(tp, i, addr, clearmask, setmask);
429
                 }
430
-                break;
431
         }
432
 }
433
 
434
@@ -2828,6 +2959,7 @@
435
         rtl8168_other_fun_dev_pci_setting(tp, 0x80, clearmask, setmask, multi_fun_sel_bit);
436
 }
437
 
438
+/*
439
 static void
440
 rtl8168_set_dash_other_fun_dev_pci_cmd_register(struct rtl8168_private *tp,
441
                 u8 pci_cmd_reg,
442
@@ -2843,6 +2975,7 @@
443
 
444
         rtl8168_other_fun_dev_pci_setting(tp, 0x04, clearmask, setmask, multi_fun_sel_bit);
445
 }
446
+*/
447
 
448
 u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, const u32 base_address)
449
 {
450
@@ -3086,44 +3219,6 @@
451
         return in_phy_disable_mode;
452
 }
453
 
454
-static void
455
-rtl8168_enable_phy_disable_mode(struct net_device *dev)
456
-{
457
-        struct rtl8168_private *tp = netdev_priv(dev);
458
-
459
-        switch (tp->HwSuppCheckPhyDisableModeVer) {
460
-        case 1:
461
-                rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) | BIT_1);
462
-                break;
463
-        case 2:
464
-        case 3:
465
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5);
466
-                break;
467
-        }
468
-
469
-        dprintk("enable phy disable mode.\n");
470
-}
471
-
472
-static void
473
-rtl8168_disable_phy_disable_mode(struct net_device *dev)
474
-{
475
-        struct rtl8168_private *tp = netdev_priv(dev);
476
-
477
-        switch (tp->HwSuppCheckPhyDisableModeVer) {
478
-        case 1:
479
-                rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) & ~BIT_1);
480
-                break;
481
-        case 2:
482
-        case 3:
483
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5);
484
-                break;
485
-        }
486
-
487
-        mdelay(1);
488
-
489
-        dprintk("disable phy disable mode.\n");
490
-}
491
-
492
 void
493
 rtl8168_wait_txrx_fifo_empty(struct net_device *dev)
494
 {
495
@@ -3154,8 +3249,9 @@
496
                         udelay(100);
497
                         if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty))
498
                                 break;
499
-
500
                 }
501
+
502
+                mdelay(1);
503
                 break;
504
         }
505
 }
506
@@ -3167,21 +3263,14 @@
507
         case CFG_METHOD_23:
508
         case CFG_METHOD_27:
509
         case CFG_METHOD_28:
510
-                rtl8168_set_dash_other_fun_dev_pci_cmd_register(tp, 0x07, 0x0E);
511
-                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0x0E);
512
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 0, 0x0E);
513
+                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0x1E);
514
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x1E);
515
                 break;
516
         case CFG_METHOD_31:
517
         case CFG_METHOD_32:
518
         case CFG_METHOD_33:
519
-                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 2, 1, 0xED);
520
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x78);
521
-                if (tp->DASH) {
522
-                        rtl8168_set_dash_other_fun_dev_state_change(tp, 0, 0x85);
523
-                        rtl8168_set_dash_other_fun_dev_pci_cmd_register(tp, 0x07, 0x85);
524
-                } else {
525
-                        rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x85);
526
-                }
527
+                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0xFC);
528
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFC);
529
                 break;
530
         }
531
 
532
@@ -3388,8 +3477,6 @@
533
 
534
         rtl8168_enable_rxdvgate(dev);
535
 
536
-        rtl8168_wait_txrx_fifo_empty(dev);
537
-
538
         switch (tp->mcfg) {
539
         case CFG_METHOD_1:
540
         case CFG_METHOD_2:
541
@@ -3436,6 +3523,8 @@
542
                 break;
543
         }
544
 
545
+        rtl8168_wait_txrx_fifo_empty(dev);
546
+
547
         /* Soft reset the chip. */
548
         RTL_W8(tp, ChipCmd, CmdReset);
549
 
550
@@ -3556,7 +3645,7 @@
551
         do {
552
                 skb = dev_alloc_skb(len + RTK_RX_ALIGN);
553
                 if (unlikely(!skb))
554
-                        dev_printk(KERN_NOTICE, &tp->pci_dev->dev, "-ENOMEM;\n");
555
+                        dev_printk(KERN_NOTICE, tp_to_dev(tp), "-ENOMEM;\n");
556
         } while (unlikely(skb == NULL));
557
         skb_reserve(skb, RTK_RX_ALIGN);
558
 
559
@@ -3565,8 +3654,8 @@
560
         memcpy(skb_put(skb, sizeof(type)), &type, sizeof(type));
561
         tmpAddr = skb_put(skb, len - 14);
562
 
563
-        mapping = dma_map_single(&tp->pci_dev->dev, skb->data, len, DMA_TO_DEVICE);
564
-        dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(mapping),
565
+        mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
566
+        dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(mapping),
567
                                 len, DMA_TO_DEVICE);
568
         txd->addr = cpu_to_le64(mapping);
569
         txd->opts2 = 0;
570
@@ -3595,14 +3684,14 @@
571
                 rx_len -= 4;
572
                 rxd->opts1 = cpu_to_le32(DescOwn | tp->rx_buf_sz);
573
 
574
-                dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(mapping), len, DMA_TO_DEVICE);
575
+                dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(mapping), len, DMA_TO_DEVICE);
576
 
577
                 if (rx_len == len) {
578
-                        dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
579
+                        dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
580
                         i = memcmp(skb->data, rx_skb->data, rx_len);
581
                         pci_dma_sync_single_for_device(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
582
                         if (i == 0) {
583
-//              dev_printk(KERN_INFO, &tp->pci_dev->dev, "loopback test finished\n",rx_len,len);
584
+//              dev_printk(KERN_INFO, tp_to_dev(tp), "loopback test finished\n",rx_len,len);
585
                                 break;
586
                         }
587
                 }
588
@@ -3645,11 +3734,26 @@
589
         return retval;
590
 }
591
 
592
+static int
593
+rtl8168_wait_phy_reset_complete(struct rtl8168_private *tp)
594
+{
595
+        int i, val;
596
+
597
+        for (i = 0; i < 2500; i++) {
598
+                val = rtl8168_mdio_read(tp, MII_BMCR) & BMCR_RESET;
599
+                if (!val)
600
+                        return 0;
601
+
602
+                mdelay(1);
603
+        }
604
+
605
+        return -1;
606
+}
607
+
608
 static void
609
 rtl8168_xmii_reset_enable(struct net_device *dev)
610
 {
611
         struct rtl8168_private *tp = netdev_priv(dev);
612
-        int i, val = 0;
613
 
614
         if (rtl8168_is_in_phy_disable_mode(dev))
615
                 return;
616
@@ -3662,15 +3766,7 @@
617
                            ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL));
618
         rtl8168_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
619
 
620
-        for (i = 0; i < 2500; i++) {
621
-                val = rtl8168_mdio_read(tp, MII_BMCR) & BMCR_RESET;
622
-
623
-                if (!val) {
624
-                        return;
625
-                }
626
-
627
-                mdelay(1);
628
-        }
629
+        if (rtl8168_wait_phy_reset_complete(tp) == 0) return;
630
 
631
         if (netif_msg_link(tp))
632
                 printk(KERN_ERR "%s: PHY reset failed.\n", dev->name);
633
@@ -3734,6 +3830,88 @@
634
         }
635
 }
636
 
637
+static void
638
+rtl8168_enable_cfg9346_write(struct rtl8168_private *tp)
639
+{
640
+        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock);
641
+}
642
+
643
+static void
644
+rtl8168_disable_cfg9346_write(struct rtl8168_private *tp)
645
+{
646
+        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock);
647
+}
648
+
649
+static void
650
+rtl8168_enable_exit_l1_mask(struct rtl8168_private *tp)
651
+{
652
+        u32 csi_tmp;
653
+
654
+        switch (tp->mcfg) {
655
+        case CFG_METHOD_16:
656
+        case CFG_METHOD_17:
657
+        case CFG_METHOD_18:
658
+        case CFG_METHOD_19:
659
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
660
+                csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
661
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
662
+                break;
663
+        case CFG_METHOD_20:
664
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
665
+                csi_tmp |= (BIT_10 | BIT_11);
666
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
667
+                break;
668
+        case CFG_METHOD_21 ... CFG_METHOD_33:
669
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
670
+                csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
671
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
672
+                break;
673
+        }
674
+}
675
+
676
+static void
677
+rtl8168_disable_exit_l1_mask(struct rtl8168_private *tp)
678
+{
679
+        u32 csi_tmp;
680
+
681
+        switch (tp->mcfg) {
682
+        case CFG_METHOD_16:
683
+        case CFG_METHOD_17:
684
+        case CFG_METHOD_18:
685
+        case CFG_METHOD_19:
686
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
687
+                csi_tmp &= ~(BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
688
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
689
+                break;
690
+        case CFG_METHOD_20:
691
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
692
+                csi_tmp &= ~(BIT_10 | BIT_11);
693
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
694
+                break;
695
+        case CFG_METHOD_21 ... CFG_METHOD_33:
696
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
697
+                csi_tmp &= ~(BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
698
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
699
+                break;
700
+        }
701
+}
702
+
703
+static void
704
+rtl8168_hw_aspm_clkreq_enable(struct rtl8168_private *tp, bool enable)
705
+{
706
+        if (!tp->HwSuppAspmClkIntrLock) return;
707
+
708
+        if (enable && aspm) {
709
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en);
710
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn);
711
+        } else {
712
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
713
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
714
+        }
715
+
716
+        udelay(10);
717
+}
718
+
719
 #ifdef ENABLE_DASH_SUPPORT
720
 static void
721
 NICChkTypeEnableDashInterrupt(struct rtl8168_private *tp)
722
@@ -3853,7 +4031,9 @@
723
                         netif_wake_queue(dev);
724
 
725
                         rtl8168_mdio_write(tp, 0x1F, 0x0000);
726
+                        tp->phy_reg_aner = rtl8168_mdio_read(tp, MII_EXPANSION);
727
                         tp->phy_reg_anlpar = rtl8168_mdio_read(tp, MII_LPA);
728
+                        tp->phy_reg_gbsr = rtl8168_mdio_read(tp, MII_STAT1000);
729
 
730
                         if (netif_msg_ifup(tp))
731
                                 printk(KERN_INFO PFX "%s: link up\n", dev->name);
732
@@ -3861,7 +4041,9 @@
733
                         if (netif_msg_ifdown(tp))
734
                                 printk(KERN_INFO PFX "%s: link down\n", dev->name);
735
 
736
+                        tp->phy_reg_aner = 0;
737
                         tp->phy_reg_anlpar = 0;
738
+                        tp->phy_reg_gbsr = 0;
739
 
740
                         netif_stop_queue(dev);
741
 
742
@@ -3875,6 +4057,12 @@
743
 
744
                         rtl8168_init_ring(dev);
745
 
746
+                        if (dynamic_aspm) {
747
+                                rtl8168_enable_cfg9346_write(tp);
748
+                                rtl8168_hw_aspm_clkreq_enable(tp, true);
749
+                                rtl8168_disable_cfg9346_write(tp);
750
+                        }
751
+
752
                         rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
753
 
754
                         switch (tp->mcfg) {
755
@@ -3915,6 +4103,17 @@
756
                         }
757
                         break;
758
                 }
759
+        } else {
760
+                if (dynamic_aspm) {
761
+                        bool enable_hw_aspm_clkreq = true;
762
+                        if (tp->dynamic_aspm_packet_count > dynamic_aspm_packet_threshold)
763
+                                enable_hw_aspm_clkreq = false;
764
+
765
+                        rtl8168_enable_cfg9346_write(tp);
766
+                        rtl8168_hw_aspm_clkreq_enable(tp, enable_hw_aspm_clkreq);
767
+                        rtl8168_disable_cfg9346_write(tp);
768
+                }
769
+                tp->dynamic_aspm_packet_count = 0;
770
         }
771
 }
772
 
773
@@ -4076,9 +4275,9 @@
774
         case CFG_METHOD_33:
775
                 csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
776
                 csi_tmp &= ~(BIT_0 | BIT_1);
777
-                if (!(tp->org_pci_offset_99 & (BIT_5 | BIT_6)))
778
+                if (tp->org_pci_offset_99 & (BIT_5 | BIT_6))
779
                         csi_tmp |= BIT_1;
780
-                if (!(tp->org_pci_offset_99 & BIT_2))
781
+                if (tp->org_pci_offset_99 & BIT_2)
782
                         csi_tmp |= BIT_0;
783
                 rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
784
                 break;
785
@@ -4354,53 +4553,21 @@
786
 }
787
 
788
 static void
789
-rtl8168_enable_cfg9346_write(struct rtl8168_private *tp)
790
-{
791
-        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock);
792
-}
793
-
794
-static void
795
-rtl8168_disable_cfg9346_write(struct rtl8168_private *tp)
796
-{
797
-        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock);
798
-}
799
-
800
-static void
801
 rtl8168_hw_d3_para(struct net_device *dev)
802
 {
803
         struct rtl8168_private *tp = netdev_priv(dev);
804
 
805
         RTL_W16(tp, RxMaxSize, RX_BUF_SIZE);
806
 
807
-        switch (tp->mcfg) {
808
-        case CFG_METHOD_14:
809
-        case CFG_METHOD_15:
810
-        case CFG_METHOD_16:
811
-        case CFG_METHOD_17:
812
-        case CFG_METHOD_18:
813
-        case CFG_METHOD_19:
814
-        case CFG_METHOD_20:
815
-        case CFG_METHOD_21:
816
-        case CFG_METHOD_22:
817
-        case CFG_METHOD_23:
818
-        case CFG_METHOD_24:
819
-        case CFG_METHOD_25:
820
-        case CFG_METHOD_26:
821
-        case CFG_METHOD_27:
822
-        case CFG_METHOD_28:
823
-        case CFG_METHOD_29:
824
-        case CFG_METHOD_30:
825
-        case CFG_METHOD_31:
826
-        case CFG_METHOD_32:
827
-        case CFG_METHOD_33:
828
+        if (tp->HwSuppAspmClkIntrLock) {
829
                 RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
830
                 rtl8168_enable_cfg9346_write(tp);
831
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
832
-                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
833
+                rtl8168_hw_aspm_clkreq_enable(tp, false);
834
                 rtl8168_disable_cfg9346_write(tp);
835
-                break;
836
         }
837
 
838
+        rtl8168_disable_exit_l1_mask(tp);
839
+
840
 #ifdef ENABLE_REALWOW_SUPPORT
841
         rtl8168_set_realwow_d3_para(dev);
842
 #endif
843
@@ -4621,9 +4788,6 @@
844
                 bmcr_true_force = BMCR_SPEED100;
845
         } else if ((speed == SPEED_100) && (duplex == DUPLEX_FULL)) {
846
                 bmcr_true_force = BMCR_SPEED100 | BMCR_FULLDPLX;
847
-        } else if ((speed == SPEED_1000) && (duplex == DUPLEX_FULL) &&
848
-                   tp->HwSuppGigaForceMode) {
849
-                bmcr_true_force = BMCR_SPEED1000 | BMCR_FULLDPLX;
850
         } else {
851
                 netif_err(tp, drv, dev, "Failed to set phy force mode!\n");
852
                 return;
853
@@ -4634,6 +4798,115 @@
854
 }
855
 
856
 static void
857
+rtl8168_set_pci_pme(struct rtl8168_private *tp, int set)
858
+{
859
+        struct pci_dev *pdev = tp->pci_dev;
860
+        u16 pmc;
861
+
862
+        if (!pdev->pm_cap)
863
+                return;
864
+
865
+        pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc);
866
+        pmc |= PCI_PM_CTRL_PME_STATUS;
867
+        if (set)
868
+                pmc |= PCI_PM_CTRL_PME_ENABLE;
869
+        else
870
+                pmc &= ~PCI_PM_CTRL_PME_ENABLE;
871
+        pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc);
872
+}
873
+
874
+static void
875
+rtl8168_set_wol_link_speed(struct net_device *dev)
876
+{
877
+        struct rtl8168_private *tp = netdev_priv(dev);
878
+        int auto_nego;
879
+        int giga_ctrl;
880
+        u32 adv;
881
+        u16 anlpar;
882
+        u16 gbsr;
883
+        u16 aner;
884
+
885
+        if (tp->autoneg != AUTONEG_ENABLE)
886
+                goto exit;
887
+
888
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
889
+
890
+        auto_nego = rtl8168_mdio_read(tp, MII_ADVERTISE);
891
+        auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL
892
+                       | ADVERTISE_100HALF | ADVERTISE_100FULL);
893
+
894
+        giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000);
895
+        giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
896
+
897
+        aner = anlpar = gbsr = 0;
898
+        if (tp->link_ok(dev)) {
899
+                aner = rtl8168_mdio_read(tp, MII_EXPANSION);
900
+                anlpar = rtl8168_mdio_read(tp, MII_LPA);
901
+                gbsr = rtl8168_mdio_read(tp, MII_STAT1000);
902
+        } else {
903
+                if (netif_running(dev)) {
904
+                        aner = tp->phy_reg_aner;
905
+                        anlpar = tp->phy_reg_anlpar;
906
+                        gbsr = tp->phy_reg_gbsr;
907
+                }
908
+        }
909
+
910
+        if ((aner | anlpar | gbsr) == 0) {
911
+                int auto_nego_tmp = 0;
912
+                adv = tp->advertising;
913
+                if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF))
914
+                        auto_nego_tmp |= ADVERTISE_10HALF;
915
+                if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL))
916
+                        auto_nego_tmp |= ADVERTISE_10FULL;
917
+                if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF))
918
+                        auto_nego_tmp |= ADVERTISE_100HALF;
919
+                if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL))
920
+                        auto_nego_tmp |= ADVERTISE_100FULL;
921
+
922
+                if (auto_nego_tmp == 0)    goto exit;
923
+
924
+                auto_nego |= auto_nego_tmp;
925
+                goto skip_check_lpa;
926
+        }
927
+        if (!(aner & EXPANSION_NWAY)) goto exit;
928
+
929
+        adv = tp->advertising;
930
+        if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF))
931
+                auto_nego |= ADVERTISE_10HALF;
932
+        else if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL))
933
+                auto_nego |= ADVERTISE_10FULL;
934
+        else if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF))
935
+                auto_nego |= ADVERTISE_100HALF;
936
+        else if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL))
937
+                auto_nego |= ADVERTISE_100FULL;
938
+        else if (adv & ADVERTISED_1000baseT_Half && (gbsr & LPA_1000HALF))
939
+                giga_ctrl |= ADVERTISE_1000HALF;
940
+        else if (adv & ADVERTISED_1000baseT_Full && (gbsr & LPA_1000FULL))
941
+                giga_ctrl |= ADVERTISE_1000FULL;
942
+        else
943
+                goto exit;
944
+
945
+skip_check_lpa:
946
+        if (tp->DASH)
947
+                auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
948
+
949
+        if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF))
950
+                auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
951
+
952
+#ifdef CONFIG_DOWN_SPEED_100
953
+        auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
954
+#endif
955
+
956
+        rtl8168_mdio_write(tp, MII_ADVERTISE, auto_nego);
957
+        rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl);
958
+
959
+        rtl8168_phy_restart_nway(dev);
960
+
961
+exit:
962
+        return;
963
+}
964
+
965
+static void
966
 rtl8168_powerdown_pll(struct net_device *dev)
967
 {
968
         struct rtl8168_private *tp = netdev_priv(dev);
969
@@ -4644,10 +4917,6 @@
970
 #endif //ENABLE_FIBER_SUPPORT
971
 
972
         if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) {
973
-                int auto_nego;
974
-                int giga_ctrl;
975
-                u16 anlpar;
976
-
977
                 rtl8168_set_hw_wol(dev, tp->wol_opts);
978
 
979
                 if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17 ||
980
@@ -4663,38 +4932,13 @@
981
                         rtl8168_disable_cfg9346_write(tp);
982
                 }
983
 
984
+                /* Enable the PME and clear the status */
985
+                rtl8168_set_pci_pme(tp, 1);
986
+
987
                 if (HW_SUPP_SERDES_PHY(tp))
988
                         return;
989
 
990
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
991
-                auto_nego = rtl8168_mdio_read(tp, MII_ADVERTISE);
992
-                auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL
993
-                               | ADVERTISE_100HALF | ADVERTISE_100FULL);
994
-
995
-                if (netif_running(dev))
996
-                        anlpar = tp->phy_reg_anlpar;
997
-                else
998
-                        anlpar = rtl8168_mdio_read(tp, MII_LPA);
999
-
1000
-#ifdef CONFIG_DOWN_SPEED_100
1001
-                auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
1002
-#else
1003
-                if (anlpar & (LPA_10HALF | LPA_10FULL))
1004
-                        auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL);
1005
-                else
1006
-                        auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
1007
-#endif
1008
-
1009
-                if (tp->DASH)
1010
-                        auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
1011
-
1012
-                if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF))
1013
-                        auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
1014
-
1015
-                giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000) & ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
1016
-                rtl8168_mdio_write(tp, MII_ADVERTISE, auto_nego);
1017
-                rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl);
1018
-                rtl8168_phy_restart_nway(dev);
1019
+                rtl8168_set_wol_link_speed(dev);
1020
 
1021
                 RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
1022
 
1023
@@ -4709,31 +4953,33 @@
1024
 
1025
         rtl8168_phy_power_down(dev);
1026
 
1027
-        switch (tp->mcfg) {
1028
-        case CFG_METHOD_9:
1029
-        case CFG_METHOD_10:
1030
-        case CFG_METHOD_11:
1031
-        case CFG_METHOD_12:
1032
-        case CFG_METHOD_13:
1033
-        case CFG_METHOD_14:
1034
-        case CFG_METHOD_15:
1035
-        case CFG_METHOD_17:
1036
-        case CFG_METHOD_18:
1037
-        case CFG_METHOD_19:
1038
-        case CFG_METHOD_21:
1039
-        case CFG_METHOD_22:
1040
-        case CFG_METHOD_24:
1041
-        case CFG_METHOD_25:
1042
-        case CFG_METHOD_26:
1043
-        case CFG_METHOD_27:
1044
-        case CFG_METHOD_28:
1045
-        case CFG_METHOD_29:
1046
-        case CFG_METHOD_30:
1047
-        case CFG_METHOD_31:
1048
-        case CFG_METHOD_32:
1049
-        case CFG_METHOD_33:
1050
-                RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7);
1051
-                break;
1052
+        if (!tp->HwIcVerUnknown) {
1053
+                switch (tp->mcfg) {
1054
+                case CFG_METHOD_9:
1055
+                case CFG_METHOD_10:
1056
+                //case CFG_METHOD_11:
1057
+                case CFG_METHOD_12:
1058
+                case CFG_METHOD_13:
1059
+                case CFG_METHOD_14:
1060
+                case CFG_METHOD_15:
1061
+                case CFG_METHOD_17:
1062
+                case CFG_METHOD_18:
1063
+                case CFG_METHOD_19:
1064
+                case CFG_METHOD_21:
1065
+                case CFG_METHOD_22:
1066
+                case CFG_METHOD_24:
1067
+                case CFG_METHOD_25:
1068
+                case CFG_METHOD_26:
1069
+                case CFG_METHOD_27:
1070
+                case CFG_METHOD_28:
1071
+                case CFG_METHOD_29:
1072
+                case CFG_METHOD_30:
1073
+                case CFG_METHOD_31:
1074
+                case CFG_METHOD_32:
1075
+                case CFG_METHOD_33:
1076
+                        RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7);
1077
+                        break;
1078
+                }
1079
         }
1080
 
1081
         switch (tp->mcfg) {
1082
@@ -4829,7 +5075,7 @@
1083
 
1084
         spin_unlock_irqrestore(&tp->lock, flags);
1085
 
1086
-        device_set_wakeup_enable(&tp->pci_dev->dev, tp->wol_enabled);
1087
+        device_set_wakeup_enable(tp_to_dev(tp), tp->wol_enabled);
1088
 
1089
         return 0;
1090
 }
1091
@@ -4839,12 +5085,17 @@
1092
                     struct ethtool_drvinfo *info)
1093
 {
1094
         struct rtl8168_private *tp = netdev_priv(dev);
1095
+        struct rtl8168_fw *rtl_fw = tp->rtl_fw;
1096
 
1097
         strcpy(info->driver, MODULENAME);
1098
         strcpy(info->version, RTL8168_VERSION);
1099
         strcpy(info->bus_info, pci_name(tp->pci_dev));
1100
         info->regdump_len = R8168_REGS_DUMP_SIZE;
1101
         info->eedump_len = tp->eeprom_len;
1102
+        BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version));
1103
+        if (rtl_fw)
1104
+                strlcpy(info->fw_version, rtl_fw->version,
1105
+                        sizeof(info->fw_version));
1106
 }
1107
 
1108
 static int
1109
@@ -4923,11 +5174,9 @@
1110
                 mdelay(20);
1111
         } else {
1112
                 /*true force*/
1113
-                if (speed == SPEED_10 || speed == SPEED_100 ||
1114
-                    (speed == SPEED_1000 && duplex == DUPLEX_FULL &&
1115
-                     tp->HwSuppGigaForceMode)) {
1116
+                if (speed == SPEED_10 || speed == SPEED_100)
1117
                         rtl8168_phy_setup_force_mode(dev, speed, duplex);
1118
-                } else
1119
+                else
1120
                         goto out;
1121
         }
1122
 
1123
@@ -5549,7 +5798,7 @@
1124
         data[9] = le64_to_cpu(counters->rx_broadcast);
1125
         data[10] = le32_to_cpu(counters->rx_multicast);
1126
         data[11] = le16_to_cpu(counters->tx_aborted);
1127
-        data[12] = le16_to_cpu(counters->tx_underun);
1128
+        data[12] = le16_to_cpu(counters->tx_underrun);
1129
 }
1130
 
1131
 static void
1132
@@ -5582,10 +5831,10 @@
1133
         u16 tmp;
1134
 
1135
         if (tp->eeprom_type == EEPROM_TYPE_NONE) {
1136
-                dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Detect none EEPROM\n");
1137
+                dev_printk(KERN_DEBUG, tp_to_dev(tp), "Detect none EEPROM\n");
1138
                 return -EOPNOTSUPP;
1139
         } else if (eeprom->len == 0 || (eeprom->offset+eeprom->len) > tp->eeprom_len) {
1140
-                dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Invalid parameter\n");
1141
+                dev_printk(KERN_DEBUG, tp_to_dev(tp), "Invalid parameter\n");
1142
                 return -EINVAL;
1143
         }
1144
 
1145
@@ -5793,7 +6042,7 @@
1146
                 break;
1147
 
1148
         default:
1149
-//      dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n");
1150
+//      dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n");
1151
                 ret = -EOPNOTSUPP;
1152
                 break;
1153
         }
1154
@@ -5893,7 +6142,7 @@
1155
         case CFG_METHOD_29:
1156
         case CFG_METHOD_30:
1157
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
1158
-                data |= BIT_0;
1159
+                data &= ~(BIT_0);
1160
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
1161
 
1162
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
1163
@@ -5909,9 +6158,11 @@
1164
         case CFG_METHOD_31:
1165
         case CFG_METHOD_32:
1166
         case CFG_METHOD_33:
1167
+                /*
1168
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
1169
                 data |= BIT_0;
1170
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
1171
+                */
1172
 
1173
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
1174
                 data = rtl8168_mdio_read(tp, 0x10) | BIT_15;
1175
@@ -6062,7 +6313,7 @@
1176
                 break;
1177
 
1178
         default:
1179
-//      dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n");
1180
+//      dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n");
1181
                 ret = -EOPNOTSUPP;
1182
                 break;
1183
         }
1184
@@ -6270,7 +6521,9 @@
1185
                 return -EOPNOTSUPP;
1186
         }
1187
 
1188
-        if (HW_SUPP_SERDES_PHY(tp) || !HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp))
1189
+        if (HW_SUPP_SERDES_PHY(tp) ||
1190
+            !HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp) ||
1191
+            tp->DASH)
1192
                 return -EOPNOTSUPP;
1193
 
1194
         spin_lock_irqsave(&tp->lock, flags);
1195
@@ -6424,7 +6677,7 @@
1196
                 rtl8168_mdio_write(tp, 0x00, 0x9200);
1197
                 break;
1198
         default:
1199
-                dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support Green Feature\n");
1200
+                dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support Green Feature\n");
1201
                 break;
1202
         }
1203
 
1204
@@ -6502,7 +6755,7 @@
1205
                 rtl8168_mdio_write(tp, 0x00, 0x9200);
1206
                 break;
1207
         default:
1208
-                dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support Green Feature\n");
1209
+                dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support Green Feature\n");
1210
                 break;
1211
         }
1212
 
1213
@@ -6877,6 +7130,133 @@
1214
         RTL_W32(tp, CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset);
1215
 }
1216
 
1217
+static
1218
+u16
1219
+rtl8168_get_phy_state(struct rtl8168_private *tp)
1220
+{
1221
+        u16 PhyState = 0xFF;
1222
+
1223
+        if (HW_SUPPORT_UPS_MODE(tp) == FALSE) goto exit;
1224
+
1225
+        switch (tp->HwSuppUpsVer) {
1226
+        case 1:
1227
+                PhyState = rtl8168_mdio_read_phy_ocp(tp, 0x0A42, 0x10);
1228
+                PhyState &= 0x7;  //bit[2:0]
1229
+                break;
1230
+        }
1231
+
1232
+exit:
1233
+        return PhyState;
1234
+}
1235
+
1236
+static
1237
+bool
1238
+rtl8168_wait_phy_state_ready(struct rtl8168_private *tp,
1239
+                             u16 PhyState,
1240
+                             u32 MicroSecondTimeout
1241
+                            )
1242
+{
1243
+        u16 TmpPhyState;
1244
+        u32 WaitCount;
1245
+        u32 i = 0;
1246
+        bool PhyStateReady = TRUE;
1247
+
1248
+        if (HW_SUPPORT_UPS_MODE(tp) == FALSE) goto exit;
1249
+
1250
+        WaitCount = MicroSecondTimeout / 1000;
1251
+        if (WaitCount == 0) WaitCount = 100;
1252
+
1253
+        do {
1254
+                TmpPhyState = rtl8168_get_phy_state(tp);
1255
+                mdelay(1);
1256
+                i++;
1257
+        } while ((i < WaitCount) && (TmpPhyState != PhyState));
1258
+
1259
+        PhyStateReady = (i == WaitCount && TmpPhyState != PhyState) ? FALSE : TRUE;
1260
+
1261
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
1262
+        WARN_ON_ONCE(i == WaitCount);
1263
+#endif
1264
+
1265
+exit:
1266
+        return PhyStateReady;
1267
+}
1268
+
1269
+static
1270
+bool
1271
+rtl8168_test_phy_ocp(struct rtl8168_private *tp)
1272
+{
1273
+        bool RestorePhyOcpReg = FALSE;
1274
+
1275
+        if (tp->TestPhyOcpReg == FALSE) goto exit;
1276
+
1277
+        if (tp->HwSuppEsdVer == 2) {
1278
+                u16 PhyRegValue;
1279
+                u8 ResetPhyType = 0;
1280
+
1281
+                if (HW_PHY_STATUS_INI == rtl8168_get_phy_state(tp)) {
1282
+                        ResetPhyType = 1;
1283
+                } else {
1284
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
1285
+                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
1286
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
1287
+                        if ((PhyRegValue & 0x03) != 0x00) {
1288
+                                ResetPhyType = 2;
1289
+                        }
1290
+                }
1291
+
1292
+                if (ResetPhyType > 0) {
1293
+                        u32 WaitCnt;
1294
+                        struct net_device *dev = tp->dev;
1295
+
1296
+                        printk(KERN_ERR "%s: test_phy_ocp ResetPhyType = 0x%02x\n.\n", dev->name, ResetPhyType);
1297
+
1298
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
1299
+                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
1300
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
1301
+                        mdelay(24); //24ms
1302
+
1303
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
1304
+                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
1305
+                        if ((PhyRegValue & 0x03) != 0x00) {
1306
+                                WaitCnt = 0;
1307
+                                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
1308
+                                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
1309
+                                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
1310
+                                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
1311
+                                        mdelay(100);
1312
+                                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
1313
+                                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
1314
+                                        WaitCnt++;
1315
+                                }
1316
+                        }
1317
+
1318
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
1319
+
1320
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
1321
+                        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
1322
+                        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
1323
+                        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
1324
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
1325
+
1326
+                        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
1327
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
1328
+                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
1329
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
1330
+                        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
1331
+
1332
+                        tp->HwHasWrRamCodeToMicroP = FALSE;
1333
+
1334
+                        RestorePhyOcpReg = TRUE;
1335
+                }
1336
+
1337
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
1338
+        }
1339
+
1340
+exit:
1341
+        return RestorePhyOcpReg;
1342
+}
1343
+
1344
 static int
1345
 rtl8168_is_ups_resume(struct net_device *dev)
1346
 {
1347
@@ -6898,7 +7278,7 @@
1348
 {
1349
         struct rtl8168_private *tp = netdev_priv(dev);
1350
         u16 TmpPhyState;
1351
-        int i=0;
1352
+        int i = 0;
1353
 
1354
         do {
1355
                 TmpPhyState = rtl8168_mdio_read_phy_ocp(tp, 0x0A42, 0x10);
1356
@@ -6957,19 +7337,9 @@
1357
                 }
1358
         }
1359
 
1360
-        switch (tp->mcfg) {
1361
-        case CFG_METHOD_23:
1362
-        case CFG_METHOD_27:
1363
-        case CFG_METHOD_28:
1364
-        case CFG_METHOD_31:
1365
-        case CFG_METHOD_32:
1366
-        case CFG_METHOD_33:
1367
-                rtl8168_dash2_disable_txrx(dev);
1368
-                break;
1369
-        }
1370
-
1371
         if (HW_DASH_SUPPORT_DASH(tp)) {
1372
                 rtl8168_driver_start(tp);
1373
+                rtl8168_dash2_disable_txrx(dev);
1374
 #ifdef ENABLE_DASH_SUPPORT
1375
                 DashHwInit(dev);
1376
 #endif
1377
@@ -7071,25 +7441,16 @@
1378
         }
1379
 
1380
         //wait ups resume (phy state 2)
1381
-        switch (tp->mcfg) {
1382
-        case CFG_METHOD_29:
1383
-        case CFG_METHOD_30:
1384
-        case CFG_METHOD_31:
1385
-        case CFG_METHOD_32:
1386
-        case CFG_METHOD_33:
1387
+        if (HW_SUPPORT_UPS_MODE(tp))
1388
                 if (rtl8168_is_ups_resume(dev)) {
1389
-                        rtl8168_wait_phy_ups_resume(dev, 2);
1390
+                        rtl8168_wait_phy_ups_resume(dev, HW_PHY_STATUS_EXT_INI);
1391
                         rtl8168_clear_ups_resume_bit(dev);
1392
                 }
1393
-                break;
1394
-        };
1395
 
1396
 #ifdef ENABLE_FIBER_SUPPORT
1397
         if (HW_FIBER_MODE_ENABLED(tp))
1398
                 rtl8168_hw_init_fiber_nic(dev);
1399
 #endif //ENABLE_FIBER_SUPPORT
1400
-
1401
-        tp->phy_reg_anlpar = 0;
1402
 }
1403
 
1404
 void
1405
@@ -7097,25 +7458,10 @@
1406
 {
1407
         struct rtl8168_private *tp = netdev_priv(dev);
1408
 
1409
-        switch (tp->mcfg) {
1410
-        case CFG_METHOD_21:
1411
-        case CFG_METHOD_22:
1412
-        case CFG_METHOD_23:
1413
-        case CFG_METHOD_24:
1414
-        case CFG_METHOD_25:
1415
-        case CFG_METHOD_26:
1416
-        case CFG_METHOD_27:
1417
-        case CFG_METHOD_28:
1418
-        case CFG_METHOD_29:
1419
-        case CFG_METHOD_30:
1420
-        case CFG_METHOD_31:
1421
-        case CFG_METHOD_32:
1422
-        case CFG_METHOD_33:
1423
+        if (tp->HwSuppAspmClkIntrLock) {
1424
                 rtl8168_enable_cfg9346_write(tp);
1425
-                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
1426
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
1427
+                rtl8168_hw_aspm_clkreq_enable(tp, false);
1428
                 rtl8168_disable_cfg9346_write(tp);
1429
-                break;
1430
         }
1431
 
1432
         switch (tp->mcfg) {
1433
@@ -7156,6 +7502,7 @@
1434
         }
1435
 }
1436
 
1437
+#ifndef ENABLE_USE_FIRMWARE_FILE
1438
 static void
1439
 rtl8168_set_mac_mcu_8168g_1(struct net_device *dev)
1440
 {
1441
@@ -8078,446 +8425,111 @@
1442
 rtl8168_set_mac_mcu_8168ep_1(struct net_device *dev)
1443
 {
1444
         struct rtl8168_private *tp = netdev_priv(dev);
1445
+        u16 i;
1446
+        static const u16 mcu_patch_code_8168ep_1[] = {
1447
+                0xE008, 0xE0D3, 0xE0D6, 0xE0D9, 0xE0DB, 0xE0DD, 0xE0DF, 0xE0E1, 0xC251,
1448
+                0x7340, 0x49B1, 0xF010, 0x1D02, 0x8D40, 0xC202, 0xBA00, 0x2C3A, 0xC0F0,
1449
+                0xE8DE, 0x2000, 0x8000, 0xC0B6, 0x268C, 0x752C, 0x49D4, 0xF112, 0xE025,
1450
+                0xC2F6, 0x7146, 0xC2F5, 0x7340, 0x49BE, 0xF103, 0xC7F2, 0xE002, 0xC7F1,
1451
+                0x304F, 0x6226, 0x49A1, 0xF1F0, 0x7222, 0x49A0, 0xF1ED, 0x2525, 0x1F28,
1452
+                0x3097, 0x3091, 0x9A36, 0x752C, 0x21DC, 0x25BC, 0xC6E2, 0x77C0, 0x1304,
1453
+                0xF014, 0x1303, 0xF014, 0x1302, 0xF014, 0x1301, 0xF014, 0x49D4, 0xF103,
1454
+                0xC3D7, 0xBB00, 0xC618, 0x67C6, 0x752E, 0x22D7, 0x26DD, 0x1505, 0xF013,
1455
+                0xC60A, 0xBE00, 0xC309, 0xBB00, 0xC308, 0xBB00, 0xC307, 0xBB00, 0xC306,
1456
+                0xBB00, 0x25C8, 0x25A6, 0x25AC, 0x25B2, 0x25B8, 0xCD08, 0x0000, 0xC0BC,
1457
+                0xC2FF, 0x7340, 0x49B0, 0xF04E, 0x1F46, 0x308F, 0xC3F7, 0x1C04, 0xE84D,
1458
+                0x1401, 0xF147, 0x7226, 0x49A7, 0xF044, 0x7222, 0x2525, 0x1F30, 0x3097,
1459
+                0x3091, 0x7340, 0xC4EA, 0x401C, 0xF006, 0xC6E8, 0x75C0, 0x49D7, 0xF105,
1460
+                0xE036, 0x1D08, 0x8DC1, 0x0208, 0x6640, 0x2764, 0x1606, 0xF12F, 0x6346,
1461
+                0x133B, 0xF12C, 0x9B34, 0x1B18, 0x3093, 0xC32A, 0x1C10, 0xE82A, 0x1401,
1462
+                0xF124, 0x1A36, 0x308A, 0x7322, 0x25B5, 0x0B0E, 0x1C00, 0xE82C, 0xC71F,
1463
+                0x4027, 0xF11A, 0xE838, 0x1F42, 0x308F, 0x1B08, 0xE824, 0x7236, 0x7746,
1464
+                0x1700, 0xF00D, 0xC313, 0x401F, 0xF103, 0x1F00, 0x9F46, 0x7744, 0x449F,
1465
+                0x445F, 0xE817, 0xC70A, 0x4027, 0xF105, 0xC302, 0xBB00, 0x2E08, 0x2DC2,
1466
+                0xC7FF, 0xBF00, 0xCDB8, 0xFFFF, 0x0C02, 0xA554, 0xA5DC, 0x402F, 0xF105,
1467
+                0x1400, 0xF1FA, 0x1C01, 0xE002, 0x1C00, 0xFF80, 0x49B0, 0xF004, 0x0B01,
1468
+                0xA1D3, 0xE003, 0x0B02, 0xA5D3, 0x3127, 0x3720, 0x0B02, 0xA5D3, 0x3127,
1469
+                0x3720, 0x1300, 0xF1FB, 0xFF80, 0x7322, 0x25B5, 0x1E28, 0x30DE, 0x30D9,
1470
+                0x7264, 0x1E11, 0x2368, 0x3116, 0xFF80, 0x1B7E, 0xC602, 0xBE00, 0x06A6,
1471
+                0x1B7E, 0xC602, 0xBE00, 0x0764, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
1472
+                0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
1473
+                0x0000
1474
+        };
1475
 
1476
         rtl8168_hw_disable_mac_mcu_bps(dev);
1477
 
1478
-        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
1479
-        rtl8168_mac_ocp_write( tp, 0xF802, 0xE0D3 );
1480
-        rtl8168_mac_ocp_write( tp, 0xF804, 0xE0D6 );
1481
-        rtl8168_mac_ocp_write( tp, 0xF806, 0xE0D9 );
1482
-        rtl8168_mac_ocp_write( tp, 0xF808, 0xE0DB );
1483
-        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE0DD );
1484
-        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE0DF );
1485
-        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE0E1 );
1486
-        rtl8168_mac_ocp_write( tp, 0xF810, 0xC251 );
1487
-        rtl8168_mac_ocp_write( tp, 0xF812, 0x7340 );
1488
-        rtl8168_mac_ocp_write( tp, 0xF814, 0x49B1 );
1489
-        rtl8168_mac_ocp_write( tp, 0xF816, 0xF010 );
1490
-        rtl8168_mac_ocp_write( tp, 0xF818, 0x1D02 );
1491
-        rtl8168_mac_ocp_write( tp, 0xF81A, 0x8D40 );
1492
-        rtl8168_mac_ocp_write( tp, 0xF81C, 0xC202 );
1493
-        rtl8168_mac_ocp_write( tp, 0xF81E, 0xBA00 );
1494
-        rtl8168_mac_ocp_write( tp, 0xF820, 0x2C3A );
1495
-        rtl8168_mac_ocp_write( tp, 0xF822, 0xC0F0 );
1496
-        rtl8168_mac_ocp_write( tp, 0xF824, 0xE8DE );
1497
-        rtl8168_mac_ocp_write( tp, 0xF826, 0x2000 );
1498
-        rtl8168_mac_ocp_write( tp, 0xF828, 0x8000 );
1499
-        rtl8168_mac_ocp_write( tp, 0xF82A, 0xC0B6 );
1500
-        rtl8168_mac_ocp_write( tp, 0xF82C, 0x268C );
1501
-        rtl8168_mac_ocp_write( tp, 0xF82E, 0x752C );
1502
-        rtl8168_mac_ocp_write( tp, 0xF830, 0x49D4 );
1503
-        rtl8168_mac_ocp_write( tp, 0xF832, 0xF112 );
1504
-        rtl8168_mac_ocp_write( tp, 0xF834, 0xE025 );
1505
-        rtl8168_mac_ocp_write( tp, 0xF836, 0xC2F6 );
1506
-        rtl8168_mac_ocp_write( tp, 0xF838, 0x7146 );
1507
-        rtl8168_mac_ocp_write( tp, 0xF83A, 0xC2F5 );
1508
-        rtl8168_mac_ocp_write( tp, 0xF83C, 0x7340 );
1509
-        rtl8168_mac_ocp_write( tp, 0xF83E, 0x49BE );
1510
-        rtl8168_mac_ocp_write( tp, 0xF840, 0xF103 );
1511
-        rtl8168_mac_ocp_write( tp, 0xF842, 0xC7F2 );
1512
-        rtl8168_mac_ocp_write( tp, 0xF844, 0xE002 );
1513
-        rtl8168_mac_ocp_write( tp, 0xF846, 0xC7F1 );
1514
-        rtl8168_mac_ocp_write( tp, 0xF848, 0x304F );
1515
-        rtl8168_mac_ocp_write( tp, 0xF84A, 0x6226 );
1516
-        rtl8168_mac_ocp_write( tp, 0xF84C, 0x49A1 );
1517
-        rtl8168_mac_ocp_write( tp, 0xF84E, 0xF1F0 );
1518
-        rtl8168_mac_ocp_write( tp, 0xF850, 0x7222 );
1519
-        rtl8168_mac_ocp_write( tp, 0xF852, 0x49A0 );
1520
-        rtl8168_mac_ocp_write( tp, 0xF854, 0xF1ED );
1521
-        rtl8168_mac_ocp_write( tp, 0xF856, 0x2525 );
1522
-        rtl8168_mac_ocp_write( tp, 0xF858, 0x1F28 );
1523
-        rtl8168_mac_ocp_write( tp, 0xF85A, 0x3097 );
1524
-        rtl8168_mac_ocp_write( tp, 0xF85C, 0x3091 );
1525
-        rtl8168_mac_ocp_write( tp, 0xF85E, 0x9A36 );
1526
-        rtl8168_mac_ocp_write( tp, 0xF860, 0x752C );
1527
-        rtl8168_mac_ocp_write( tp, 0xF862, 0x21DC );
1528
-        rtl8168_mac_ocp_write( tp, 0xF864, 0x25BC );
1529
-        rtl8168_mac_ocp_write( tp, 0xF866, 0xC6E2 );
1530
-        rtl8168_mac_ocp_write( tp, 0xF868, 0x77C0 );
1531
-        rtl8168_mac_ocp_write( tp, 0xF86A, 0x1304 );
1532
-        rtl8168_mac_ocp_write( tp, 0xF86C, 0xF014 );
1533
-        rtl8168_mac_ocp_write( tp, 0xF86E, 0x1303 );
1534
-        rtl8168_mac_ocp_write( tp, 0xF870, 0xF014 );
1535
-        rtl8168_mac_ocp_write( tp, 0xF872, 0x1302 );
1536
-        rtl8168_mac_ocp_write( tp, 0xF874, 0xF014 );
1537
-        rtl8168_mac_ocp_write( tp, 0xF876, 0x1301 );
1538
-        rtl8168_mac_ocp_write( tp, 0xF878, 0xF014 );
1539
-        rtl8168_mac_ocp_write( tp, 0xF87A, 0x49D4 );
1540
-        rtl8168_mac_ocp_write( tp, 0xF87C, 0xF103 );
1541
-        rtl8168_mac_ocp_write( tp, 0xF87E, 0xC3D7 );
1542
-        rtl8168_mac_ocp_write( tp, 0xF880, 0xBB00 );
1543
-        rtl8168_mac_ocp_write( tp, 0xF882, 0xC618 );
1544
-        rtl8168_mac_ocp_write( tp, 0xF884, 0x67C6 );
1545
-        rtl8168_mac_ocp_write( tp, 0xF886, 0x752E );
1546
-        rtl8168_mac_ocp_write( tp, 0xF888, 0x22D7 );
1547
-        rtl8168_mac_ocp_write( tp, 0xF88A, 0x26DD );
1548
-        rtl8168_mac_ocp_write( tp, 0xF88C, 0x1505 );
1549
-        rtl8168_mac_ocp_write( tp, 0xF88E, 0xF013 );
1550
-        rtl8168_mac_ocp_write( tp, 0xF890, 0xC60A );
1551
-        rtl8168_mac_ocp_write( tp, 0xF892, 0xBE00 );
1552
-        rtl8168_mac_ocp_write( tp, 0xF894, 0xC309 );
1553
-        rtl8168_mac_ocp_write( tp, 0xF896, 0xBB00 );
1554
-        rtl8168_mac_ocp_write( tp, 0xF898, 0xC308 );
1555
-        rtl8168_mac_ocp_write( tp, 0xF89A, 0xBB00 );
1556
-        rtl8168_mac_ocp_write( tp, 0xF89C, 0xC307 );
1557
-        rtl8168_mac_ocp_write( tp, 0xF89E, 0xBB00 );
1558
-        rtl8168_mac_ocp_write( tp, 0xF8A0, 0xC306 );
1559
-        rtl8168_mac_ocp_write( tp, 0xF8A2, 0xBB00 );
1560
-        rtl8168_mac_ocp_write( tp, 0xF8A4, 0x25C8 );
1561
-        rtl8168_mac_ocp_write( tp, 0xF8A6, 0x25A6 );
1562
-        rtl8168_mac_ocp_write( tp, 0xF8A8, 0x25AC );
1563
-        rtl8168_mac_ocp_write( tp, 0xF8AA, 0x25B2 );
1564
-        rtl8168_mac_ocp_write( tp, 0xF8AC, 0x25B8 );
1565
-        rtl8168_mac_ocp_write( tp, 0xF8AE, 0xCD08 );
1566
-        rtl8168_mac_ocp_write( tp, 0xF8B0, 0x0000 );
1567
-        rtl8168_mac_ocp_write( tp, 0xF8B2, 0xC0BC );
1568
-        rtl8168_mac_ocp_write( tp, 0xF8B4, 0xC2FF );
1569
-        rtl8168_mac_ocp_write( tp, 0xF8B6, 0x7340 );
1570
-        rtl8168_mac_ocp_write( tp, 0xF8B8, 0x49B0 );
1571
-        rtl8168_mac_ocp_write( tp, 0xF8BA, 0xF04E );
1572
-        rtl8168_mac_ocp_write( tp, 0xF8BC, 0x1F46 );
1573
-        rtl8168_mac_ocp_write( tp, 0xF8BE, 0x308F );
1574
-        rtl8168_mac_ocp_write( tp, 0xF8C0, 0xC3F7 );
1575
-        rtl8168_mac_ocp_write( tp, 0xF8C2, 0x1C04 );
1576
-        rtl8168_mac_ocp_write( tp, 0xF8C4, 0xE84D );
1577
-        rtl8168_mac_ocp_write( tp, 0xF8C6, 0x1401 );
1578
-        rtl8168_mac_ocp_write( tp, 0xF8C8, 0xF147 );
1579
-        rtl8168_mac_ocp_write( tp, 0xF8CA, 0x7226 );
1580
-        rtl8168_mac_ocp_write( tp, 0xF8CC, 0x49A7 );
1581
-        rtl8168_mac_ocp_write( tp, 0xF8CE, 0xF044 );
1582
-        rtl8168_mac_ocp_write( tp, 0xF8D0, 0x7222 );
1583
-        rtl8168_mac_ocp_write( tp, 0xF8D2, 0x2525 );
1584
-        rtl8168_mac_ocp_write( tp, 0xF8D4, 0x1F30 );
1585
-        rtl8168_mac_ocp_write( tp, 0xF8D6, 0x3097 );
1586
-        rtl8168_mac_ocp_write( tp, 0xF8D8, 0x3091 );
1587
-        rtl8168_mac_ocp_write( tp, 0xF8DA, 0x7340 );
1588
-        rtl8168_mac_ocp_write( tp, 0xF8DC, 0xC4EA );
1589
-        rtl8168_mac_ocp_write( tp, 0xF8DE, 0x401C );
1590
-        rtl8168_mac_ocp_write( tp, 0xF8E0, 0xF006 );
1591
-        rtl8168_mac_ocp_write( tp, 0xF8E2, 0xC6E8 );
1592
-        rtl8168_mac_ocp_write( tp, 0xF8E4, 0x75C0 );
1593
-        rtl8168_mac_ocp_write( tp, 0xF8E6, 0x49D7 );
1594
-        rtl8168_mac_ocp_write( tp, 0xF8E8, 0xF105 );
1595
-        rtl8168_mac_ocp_write( tp, 0xF8EA, 0xE036 );
1596
-        rtl8168_mac_ocp_write( tp, 0xF8EC, 0x1D08 );
1597
-        rtl8168_mac_ocp_write( tp, 0xF8EE, 0x8DC1 );
1598
-        rtl8168_mac_ocp_write( tp, 0xF8F0, 0x0208 );
1599
-        rtl8168_mac_ocp_write( tp, 0xF8F2, 0x6640 );
1600
-        rtl8168_mac_ocp_write( tp, 0xF8F4, 0x2764 );
1601
-        rtl8168_mac_ocp_write( tp, 0xF8F6, 0x1606 );
1602
-        rtl8168_mac_ocp_write( tp, 0xF8F8, 0xF12F );
1603
-        rtl8168_mac_ocp_write( tp, 0xF8FA, 0x6346 );
1604
-        rtl8168_mac_ocp_write( tp, 0xF8FC, 0x133B );
1605
-        rtl8168_mac_ocp_write( tp, 0xF8FE, 0xF12C );
1606
-        rtl8168_mac_ocp_write( tp, 0xF900, 0x9B34 );
1607
-        rtl8168_mac_ocp_write( tp, 0xF902, 0x1B18 );
1608
-        rtl8168_mac_ocp_write( tp, 0xF904, 0x3093 );
1609
-        rtl8168_mac_ocp_write( tp, 0xF906, 0xC32A );
1610
-        rtl8168_mac_ocp_write( tp, 0xF908, 0x1C10 );
1611
-        rtl8168_mac_ocp_write( tp, 0xF90A, 0xE82A );
1612
-        rtl8168_mac_ocp_write( tp, 0xF90C, 0x1401 );
1613
-        rtl8168_mac_ocp_write( tp, 0xF90E, 0xF124 );
1614
-        rtl8168_mac_ocp_write( tp, 0xF910, 0x1A36 );
1615
-        rtl8168_mac_ocp_write( tp, 0xF912, 0x308A );
1616
-        rtl8168_mac_ocp_write( tp, 0xF914, 0x7322 );
1617
-        rtl8168_mac_ocp_write( tp, 0xF916, 0x25B5 );
1618
-        rtl8168_mac_ocp_write( tp, 0xF918, 0x0B0E );
1619
-        rtl8168_mac_ocp_write( tp, 0xF91A, 0x1C00 );
1620
-        rtl8168_mac_ocp_write( tp, 0xF91C, 0xE82C );
1621
-        rtl8168_mac_ocp_write( tp, 0xF91E, 0xC71F );
1622
-        rtl8168_mac_ocp_write( tp, 0xF920, 0x4027 );
1623
-        rtl8168_mac_ocp_write( tp, 0xF922, 0xF11A );
1624
-        rtl8168_mac_ocp_write( tp, 0xF924, 0xE838 );
1625
-        rtl8168_mac_ocp_write( tp, 0xF926, 0x1F42 );
1626
-        rtl8168_mac_ocp_write( tp, 0xF928, 0x308F );
1627
-        rtl8168_mac_ocp_write( tp, 0xF92A, 0x1B08 );
1628
-        rtl8168_mac_ocp_write( tp, 0xF92C, 0xE824 );
1629
-        rtl8168_mac_ocp_write( tp, 0xF92E, 0x7236 );
1630
-        rtl8168_mac_ocp_write( tp, 0xF930, 0x7746 );
1631
-        rtl8168_mac_ocp_write( tp, 0xF932, 0x1700 );
1632
-        rtl8168_mac_ocp_write( tp, 0xF934, 0xF00D );
1633
-        rtl8168_mac_ocp_write( tp, 0xF936, 0xC313 );
1634
-        rtl8168_mac_ocp_write( tp, 0xF938, 0x401F );
1635
-        rtl8168_mac_ocp_write( tp, 0xF93A, 0xF103 );
1636
-        rtl8168_mac_ocp_write( tp, 0xF93C, 0x1F00 );
1637
-        rtl8168_mac_ocp_write( tp, 0xF93E, 0x9F46 );
1638
-        rtl8168_mac_ocp_write( tp, 0xF940, 0x7744 );
1639
-        rtl8168_mac_ocp_write( tp, 0xF942, 0x449F );
1640
-        rtl8168_mac_ocp_write( tp, 0xF944, 0x445F );
1641
-        rtl8168_mac_ocp_write( tp, 0xF946, 0xE817 );
1642
-        rtl8168_mac_ocp_write( tp, 0xF948, 0xC70A );
1643
-        rtl8168_mac_ocp_write( tp, 0xF94A, 0x4027 );
1644
-        rtl8168_mac_ocp_write( tp, 0xF94C, 0xF105 );
1645
-        rtl8168_mac_ocp_write( tp, 0xF94E, 0xC302 );
1646
-        rtl8168_mac_ocp_write( tp, 0xF950, 0xBB00 );
1647
-        rtl8168_mac_ocp_write( tp, 0xF952, 0x2E08 );
1648
-        rtl8168_mac_ocp_write( tp, 0xF954, 0x2DC2 );
1649
-        rtl8168_mac_ocp_write( tp, 0xF956, 0xC7FF );
1650
-        rtl8168_mac_ocp_write( tp, 0xF958, 0xBF00 );
1651
-        rtl8168_mac_ocp_write( tp, 0xF95A, 0xCDB8 );
1652
-        rtl8168_mac_ocp_write( tp, 0xF95C, 0xFFFF );
1653
-        rtl8168_mac_ocp_write( tp, 0xF95E, 0x0C02 );
1654
-        rtl8168_mac_ocp_write( tp, 0xF960, 0xA554 );
1655
-        rtl8168_mac_ocp_write( tp, 0xF962, 0xA5DC );
1656
-        rtl8168_mac_ocp_write( tp, 0xF964, 0x402F );
1657
-        rtl8168_mac_ocp_write( tp, 0xF966, 0xF105 );
1658
-        rtl8168_mac_ocp_write( tp, 0xF968, 0x1400 );
1659
-        rtl8168_mac_ocp_write( tp, 0xF96A, 0xF1FA );
1660
-        rtl8168_mac_ocp_write( tp, 0xF96C, 0x1C01 );
1661
-        rtl8168_mac_ocp_write( tp, 0xF96E, 0xE002 );
1662
-        rtl8168_mac_ocp_write( tp, 0xF970, 0x1C00 );
1663
-        rtl8168_mac_ocp_write( tp, 0xF972, 0xFF80 );
1664
-        rtl8168_mac_ocp_write( tp, 0xF974, 0x49B0 );
1665
-        rtl8168_mac_ocp_write( tp, 0xF976, 0xF004 );
1666
-        rtl8168_mac_ocp_write( tp, 0xF978, 0x0B01 );
1667
-        rtl8168_mac_ocp_write( tp, 0xF97A, 0xA1D3 );
1668
-        rtl8168_mac_ocp_write( tp, 0xF97C, 0xE003 );
1669
-        rtl8168_mac_ocp_write( tp, 0xF97E, 0x0B02 );
1670
-        rtl8168_mac_ocp_write( tp, 0xF980, 0xA5D3 );
1671
-        rtl8168_mac_ocp_write( tp, 0xF982, 0x3127 );
1672
-        rtl8168_mac_ocp_write( tp, 0xF984, 0x3720 );
1673
-        rtl8168_mac_ocp_write( tp, 0xF986, 0x0B02 );
1674
-        rtl8168_mac_ocp_write( tp, 0xF988, 0xA5D3 );
1675
-        rtl8168_mac_ocp_write( tp, 0xF98A, 0x3127 );
1676
-        rtl8168_mac_ocp_write( tp, 0xF98C, 0x3720 );
1677
-        rtl8168_mac_ocp_write( tp, 0xF98E, 0x1300 );
1678
-        rtl8168_mac_ocp_write( tp, 0xF990, 0xF1FB );
1679
-        rtl8168_mac_ocp_write( tp, 0xF992, 0xFF80 );
1680
-        rtl8168_mac_ocp_write( tp, 0xF994, 0x7322 );
1681
-        rtl8168_mac_ocp_write( tp, 0xF996, 0x25B5 );
1682
-        rtl8168_mac_ocp_write( tp, 0xF998, 0x1E28 );
1683
-        rtl8168_mac_ocp_write( tp, 0xF99A, 0x30DE );
1684
-        rtl8168_mac_ocp_write( tp, 0xF99C, 0x30D9 );
1685
-        rtl8168_mac_ocp_write( tp, 0xF99E, 0x7264 );
1686
-        rtl8168_mac_ocp_write( tp, 0xF9A0, 0x1E11 );
1687
-        rtl8168_mac_ocp_write( tp, 0xF9A2, 0x2368 );
1688
-        rtl8168_mac_ocp_write( tp, 0xF9A4, 0x3116 );
1689
-        rtl8168_mac_ocp_write( tp, 0xF9A6, 0xFF80 );
1690
-        rtl8168_mac_ocp_write( tp, 0xF9A8, 0x1B7E );
1691
-        rtl8168_mac_ocp_write( tp, 0xF9AA, 0xC602 );
1692
-        rtl8168_mac_ocp_write( tp, 0xF9AC, 0xBE00 );
1693
-        rtl8168_mac_ocp_write( tp, 0xF9AE, 0x06A6 );
1694
-        rtl8168_mac_ocp_write( tp, 0xF9B0, 0x1B7E );
1695
-        rtl8168_mac_ocp_write( tp, 0xF9B2, 0xC602 );
1696
-        rtl8168_mac_ocp_write( tp, 0xF9B4, 0xBE00 );
1697
-        rtl8168_mac_ocp_write( tp, 0xF9B6, 0x0764 );
1698
-        rtl8168_mac_ocp_write( tp, 0xF9B8, 0xC602 );
1699
-        rtl8168_mac_ocp_write( tp, 0xF9BA, 0xBE00 );
1700
-        rtl8168_mac_ocp_write( tp, 0xF9BC, 0x0000 );
1701
-        rtl8168_mac_ocp_write( tp, 0xF9BE, 0xC602 );
1702
-        rtl8168_mac_ocp_write( tp, 0xF9C0, 0xBE00 );
1703
-        rtl8168_mac_ocp_write( tp, 0xF9C2, 0x0000 );
1704
-        rtl8168_mac_ocp_write( tp, 0xF9C4, 0xC602 );
1705
-        rtl8168_mac_ocp_write( tp, 0xF9C6, 0xBE00 );
1706
-        rtl8168_mac_ocp_write( tp, 0xF9C8, 0x0000 );
1707
-        rtl8168_mac_ocp_write( tp, 0xF9CA, 0xC602 );
1708
-        rtl8168_mac_ocp_write( tp, 0xF9CC, 0xBE00 );
1709
-        rtl8168_mac_ocp_write( tp, 0xF9CE, 0x0000 );
1710
-        rtl8168_mac_ocp_write( tp, 0xF9D0, 0xC602 );
1711
-        rtl8168_mac_ocp_write( tp, 0xF9D2, 0xBE00 );
1712
-        rtl8168_mac_ocp_write( tp, 0xF9D4, 0x0000 );
1713
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_1); i++) {
1714
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168ep_1[i]);
1715
+        }
1716
 
1717
-        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
1718
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
1719
 
1720
-        rtl8168_mac_ocp_write( tp, 0xFC28, 0x2549 );
1721
-        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x06A5 );
1722
-        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0763 );
1723
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2549);
1724
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x06A5);
1725
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0763);
1726
 }
1727
 
1728
 static void
1729
 rtl8168_set_mac_mcu_8168ep_2(struct net_device *dev)
1730
 {
1731
         struct rtl8168_private *tp = netdev_priv(dev);
1732
+        u16 i;
1733
+        static const u16 mcu_patch_code_8168ep_2[] = {
1734
+                0xE008, 0xE017, 0xE052, 0xE056, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xC50F,
1735
+                0x76A4, 0x49E3, 0xF007, 0x49C0, 0xF103, 0xC607, 0xBE00, 0xC606, 0xBE00,
1736
+                0xC602, 0xBE00, 0x0BDA, 0x0BB6, 0x0BBA, 0xDC00, 0xB400, 0xB401, 0xB402,
1737
+                0xB403, 0xB404, 0xC02E, 0x7206, 0x49AE, 0xF1FE, 0xC12B, 0x9904, 0xC12A,
1738
+                0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF117, 0xC123, 0xC223,
1739
+                0xC323, 0xE808, 0xC322, 0xE806, 0xC321, 0xE804, 0xC320, 0xE802, 0xE00C,
1740
+                0x740E, 0x49CE, 0xF1FE, 0x9908, 0x990A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE,
1741
+                0xF1FE, 0xFF80, 0xB004, 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002,
1742
+                0xB800, 0x1FC8, 0xE000, 0xE8E0, 0xF128, 0x0002, 0xFFFF, 0xF000, 0x8001,
1743
+                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x0490, 0xC602,
1744
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
1745
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
1746
+        };
1747
 
1748
         rtl8168_hw_disable_mac_mcu_bps(dev);
1749
 
1750
-        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
1751
-        rtl8168_mac_ocp_write( tp, 0xF802, 0xE017 );
1752
-        rtl8168_mac_ocp_write( tp, 0xF804, 0xE019 );
1753
-        rtl8168_mac_ocp_write( tp, 0xF806, 0xE01B );
1754
-        rtl8168_mac_ocp_write( tp, 0xF808, 0xE01D );
1755
-        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE01F );
1756
-        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE021 );
1757
-        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE023 );
1758
-        rtl8168_mac_ocp_write( tp, 0xF810, 0xC50F );
1759
-        rtl8168_mac_ocp_write( tp, 0xF812, 0x76A4 );
1760
-        rtl8168_mac_ocp_write( tp, 0xF814, 0x49E3 );
1761
-        rtl8168_mac_ocp_write( tp, 0xF816, 0xF007 );
1762
-        rtl8168_mac_ocp_write( tp, 0xF818, 0x49C0 );
1763
-        rtl8168_mac_ocp_write( tp, 0xF81A, 0xF103 );
1764
-        rtl8168_mac_ocp_write( tp, 0xF81C, 0xC607 );
1765
-        rtl8168_mac_ocp_write( tp, 0xF81E, 0xBE00 );
1766
-        rtl8168_mac_ocp_write( tp, 0xF820, 0xC606 );
1767
-        rtl8168_mac_ocp_write( tp, 0xF822, 0xBE00 );
1768
-        rtl8168_mac_ocp_write( tp, 0xF824, 0xC602 );
1769
-        rtl8168_mac_ocp_write( tp, 0xF826, 0xBE00 );
1770
-        rtl8168_mac_ocp_write( tp, 0xF828, 0x0BDA );
1771
-        rtl8168_mac_ocp_write( tp, 0xF82A, 0x0BB0 );
1772
-        rtl8168_mac_ocp_write( tp, 0xF82C, 0x0BBA );
1773
-        rtl8168_mac_ocp_write( tp, 0xF82E, 0xDC00 );
1774
-        rtl8168_mac_ocp_write( tp, 0xF830, 0xC602 );
1775
-        rtl8168_mac_ocp_write( tp, 0xF832, 0xBE00 );
1776
-        rtl8168_mac_ocp_write( tp, 0xF834, 0x0000 );
1777
-        rtl8168_mac_ocp_write( tp, 0xF836, 0xC602 );
1778
-        rtl8168_mac_ocp_write( tp, 0xF838, 0xBE00 );
1779
-        rtl8168_mac_ocp_write( tp, 0xF83A, 0x0000 );
1780
-        rtl8168_mac_ocp_write( tp, 0xF83C, 0xC602 );
1781
-        rtl8168_mac_ocp_write( tp, 0xF83E, 0xBE00 );
1782
-        rtl8168_mac_ocp_write( tp, 0xF840, 0x0000 );
1783
-        rtl8168_mac_ocp_write( tp, 0xF842, 0xC602 );
1784
-        rtl8168_mac_ocp_write( tp, 0xF844, 0xBE00 );
1785
-        rtl8168_mac_ocp_write( tp, 0xF846, 0x0000 );
1786
-        rtl8168_mac_ocp_write( tp, 0xF848, 0xC602 );
1787
-        rtl8168_mac_ocp_write( tp, 0xF84A, 0xBE00 );
1788
-        rtl8168_mac_ocp_write( tp, 0xF84C, 0x0000 );
1789
-        rtl8168_mac_ocp_write( tp, 0xF84E, 0xC602 );
1790
-        rtl8168_mac_ocp_write( tp, 0xF850, 0xBE00 );
1791
-        rtl8168_mac_ocp_write( tp, 0xF852, 0x0000 );
1792
-        rtl8168_mac_ocp_write( tp, 0xF854, 0xC602 );
1793
-        rtl8168_mac_ocp_write( tp, 0xF856, 0xBE00 );
1794
-        rtl8168_mac_ocp_write( tp, 0xF858, 0x0000 );
1795
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_2); i++) {
1796
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168ep_2[i]);
1797
+        }
1798
 
1799
-        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
1800
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
1801
 
1802
-        rtl8168_mac_ocp_write( tp, 0xFC28, 0x0BB3 );
1803
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x0BB3);
1804
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x1FC7);
1805
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0485);
1806
 }
1807
 
1808
 static void
1809
 rtl8168_set_mac_mcu_8168h_1(struct net_device *dev)
1810
 {
1811
         struct rtl8168_private *tp = netdev_priv(dev);
1812
+        u16 i;
1813
+        static const u16 mcu_patch_code_8168h_1[] = {
1814
+                0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE079, 0xC707,
1815
+                0x1D00, 0x8DE2, 0x48C1, 0xC502, 0xBD00, 0x00E4, 0xE0C0, 0xC502, 0xBD00,
1816
+                0x0216, 0xC634, 0x75C0, 0x49D3, 0xF027, 0xC631, 0x75C0, 0x49D3, 0xF123,
1817
+                0xC627, 0x75C0, 0xB405, 0xC525, 0x9DC0, 0xC621, 0x75C8, 0x49D5, 0xF00A,
1818
+                0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, 0x75D2, 0x49D9, 0xF111,
1819
+                0xC517, 0x9DC8, 0xC516, 0x9DD2, 0xC618, 0x75C0, 0x49D4, 0xF003, 0x49D0,
1820
+                0xF104, 0xC60A, 0xC50E, 0x9DC0, 0xB005, 0xC607, 0x9DC0, 0xB007, 0xC602,
1821
+                0xBE00, 0x1A06, 0xB400, 0xE86C, 0xA000, 0x01E1, 0x0200, 0x9200, 0xE84C,
1822
+                0xE004, 0xE908, 0xC502, 0xBD00, 0x0B58, 0xB407, 0xB404, 0x2195, 0x25BD,
1823
+                0x9BE0, 0x1C1C, 0x484F, 0x9CE2, 0x72E2, 0x49AE, 0xF1FE, 0x0B00, 0xF116,
1824
+                0xC71C, 0xC419, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE,
1825
+                0xC412, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE, 0xC70C,
1826
+                0x74F8, 0x48C3, 0x8CF8, 0xB004, 0xB007, 0xC502, 0xBD00, 0x0F24, 0x0481,
1827
+                0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0xC502,
1828
+                0xBD00, 0x0578, 0xC602, 0xBE00, 0x0000
1829
+        };
1830
 
1831
         rtl8168_hw_disable_mac_mcu_bps(dev);
1832
 
1833
-        rtl8168_mac_ocp_write(tp, 0xF800, 0xE008);
1834
-        rtl8168_mac_ocp_write(tp, 0xF802, 0xE00F);
1835
-        rtl8168_mac_ocp_write(tp, 0xF804, 0xE011);
1836
-        rtl8168_mac_ocp_write(tp, 0xF806, 0xE047);
1837
-        rtl8168_mac_ocp_write(tp, 0xF808, 0xE049);
1838
-        rtl8168_mac_ocp_write(tp, 0xF80A, 0xE073);
1839
-        rtl8168_mac_ocp_write(tp, 0xF80C, 0xE075);
1840
-        rtl8168_mac_ocp_write(tp, 0xF80E, 0xE077);
1841
-        rtl8168_mac_ocp_write(tp, 0xF810, 0xC707);
1842
-        rtl8168_mac_ocp_write(tp, 0xF812, 0x1D00);
1843
-        rtl8168_mac_ocp_write(tp, 0xF814, 0x8DE2);
1844
-        rtl8168_mac_ocp_write(tp, 0xF816, 0x48C1);
1845
-        rtl8168_mac_ocp_write(tp, 0xF818, 0xC502);
1846
-        rtl8168_mac_ocp_write(tp, 0xF81A, 0xBD00);
1847
-        rtl8168_mac_ocp_write(tp, 0xF81C, 0x00E4);
1848
-        rtl8168_mac_ocp_write(tp, 0xF81E, 0xE0C0);
1849
-        rtl8168_mac_ocp_write(tp, 0xF820, 0xC502);
1850
-        rtl8168_mac_ocp_write(tp, 0xF822, 0xBD00);
1851
-        rtl8168_mac_ocp_write(tp, 0xF824, 0x0216);
1852
-        rtl8168_mac_ocp_write(tp, 0xF826, 0xC634);
1853
-        rtl8168_mac_ocp_write(tp, 0xF828, 0x75C0);
1854
-        rtl8168_mac_ocp_write(tp, 0xF82A, 0x49D3);
1855
-        rtl8168_mac_ocp_write(tp, 0xF82C, 0xF027);
1856
-        rtl8168_mac_ocp_write(tp, 0xF82E, 0xC631);
1857
-        rtl8168_mac_ocp_write(tp, 0xF830, 0x75C0);
1858
-        rtl8168_mac_ocp_write(tp, 0xF832, 0x49D3);
1859
-        rtl8168_mac_ocp_write(tp, 0xF834, 0xF123);
1860
-        rtl8168_mac_ocp_write(tp, 0xF836, 0xC627);
1861
-        rtl8168_mac_ocp_write(tp, 0xF838, 0x75C0);
1862
-        rtl8168_mac_ocp_write(tp, 0xF83A, 0xB405);
1863
-        rtl8168_mac_ocp_write(tp, 0xF83C, 0xC525);
1864
-        rtl8168_mac_ocp_write(tp, 0xF83E, 0x9DC0);
1865
-        rtl8168_mac_ocp_write(tp, 0xF840, 0xC621);
1866
-        rtl8168_mac_ocp_write(tp, 0xF842, 0x75C8);
1867
-        rtl8168_mac_ocp_write(tp, 0xF844, 0x49D5);
1868
-        rtl8168_mac_ocp_write(tp, 0xF846, 0xF00A);
1869
-        rtl8168_mac_ocp_write(tp, 0xF848, 0x49D6);
1870
-        rtl8168_mac_ocp_write(tp, 0xF84A, 0xF008);
1871
-        rtl8168_mac_ocp_write(tp, 0xF84C, 0x49D7);
1872
-        rtl8168_mac_ocp_write(tp, 0xF84E, 0xF006);
1873
-        rtl8168_mac_ocp_write(tp, 0xF850, 0x49D8);
1874
-        rtl8168_mac_ocp_write(tp, 0xF852, 0xF004);
1875
-        rtl8168_mac_ocp_write(tp, 0xF854, 0x75D2);
1876
-        rtl8168_mac_ocp_write(tp, 0xF856, 0x49D9);
1877
-        rtl8168_mac_ocp_write(tp, 0xF858, 0xF111);
1878
-        rtl8168_mac_ocp_write(tp, 0xF85A, 0xC517);
1879
-        rtl8168_mac_ocp_write(tp, 0xF85C, 0x9DC8);
1880
-        rtl8168_mac_ocp_write(tp, 0xF85E, 0xC516);
1881
-        rtl8168_mac_ocp_write(tp, 0xF860, 0x9DD2);
1882
-        rtl8168_mac_ocp_write(tp, 0xF862, 0xC618);
1883
-        rtl8168_mac_ocp_write(tp, 0xF864, 0x75C0);
1884
-        rtl8168_mac_ocp_write(tp, 0xF866, 0x49D4);
1885
-        rtl8168_mac_ocp_write(tp, 0xF868, 0xF003);
1886
-        rtl8168_mac_ocp_write(tp, 0xF86A, 0x49D0);
1887
-        rtl8168_mac_ocp_write(tp, 0xF86C, 0xF104);
1888
-        rtl8168_mac_ocp_write(tp, 0xF86E, 0xC60A);
1889
-        rtl8168_mac_ocp_write(tp, 0xF870, 0xC50E);
1890
-        rtl8168_mac_ocp_write(tp, 0xF872, 0x9DC0);
1891
-        rtl8168_mac_ocp_write(tp, 0xF874, 0xB005);
1892
-        rtl8168_mac_ocp_write(tp, 0xF876, 0xC607);
1893
-        rtl8168_mac_ocp_write(tp, 0xF878, 0x9DC0);
1894
-        rtl8168_mac_ocp_write(tp, 0xF87A, 0xB007);
1895
-        rtl8168_mac_ocp_write(tp, 0xF87C, 0xC602);
1896
-        rtl8168_mac_ocp_write(tp, 0xF87E, 0xBE00);
1897
-        rtl8168_mac_ocp_write(tp, 0xF880, 0x1A06);
1898
-        rtl8168_mac_ocp_write(tp, 0xF882, 0xB400);
1899
-        rtl8168_mac_ocp_write(tp, 0xF884, 0xE86C);
1900
-        rtl8168_mac_ocp_write(tp, 0xF886, 0xA000);
1901
-        rtl8168_mac_ocp_write(tp, 0xF888, 0x01E1);
1902
-        rtl8168_mac_ocp_write(tp, 0xF88A, 0x0200);
1903
-        rtl8168_mac_ocp_write(tp, 0xF88C, 0x9200);
1904
-        rtl8168_mac_ocp_write(tp, 0xF88E, 0xE84C);
1905
-        rtl8168_mac_ocp_write(tp, 0xF890, 0xE004);
1906
-        rtl8168_mac_ocp_write(tp, 0xF892, 0xE908);
1907
-        rtl8168_mac_ocp_write(tp, 0xF894, 0xC502);
1908
-        rtl8168_mac_ocp_write(tp, 0xF896, 0xBD00);
1909
-        rtl8168_mac_ocp_write(tp, 0xF898, 0x0B58);
1910
-        rtl8168_mac_ocp_write(tp, 0xF89A, 0xB407);
1911
-        rtl8168_mac_ocp_write(tp, 0xF89C, 0xB404);
1912
-        rtl8168_mac_ocp_write(tp, 0xF89E, 0x2195);
1913
-        rtl8168_mac_ocp_write(tp, 0xF8A0, 0x25BD);
1914
-        rtl8168_mac_ocp_write(tp, 0xF8A2, 0x9BE0);
1915
-        rtl8168_mac_ocp_write(tp, 0xF8A4, 0x1C1C);
1916
-        rtl8168_mac_ocp_write(tp, 0xF8A6, 0x484F);
1917
-        rtl8168_mac_ocp_write(tp, 0xF8A8, 0x9CE2);
1918
-        rtl8168_mac_ocp_write(tp, 0xF8AA, 0x72E2);
1919
-        rtl8168_mac_ocp_write(tp, 0xF8AC, 0x49AE);
1920
-        rtl8168_mac_ocp_write(tp, 0xF8AE, 0xF1FE);
1921
-        rtl8168_mac_ocp_write(tp, 0xF8B0, 0x0B00);
1922
-        rtl8168_mac_ocp_write(tp, 0xF8B2, 0xF116);
1923
-        rtl8168_mac_ocp_write(tp, 0xF8B4, 0xC71C);
1924
-        rtl8168_mac_ocp_write(tp, 0xF8B6, 0xC419);
1925
-        rtl8168_mac_ocp_write(tp, 0xF8B8, 0x9CE0);
1926
-        rtl8168_mac_ocp_write(tp, 0xF8BA, 0x1C13);
1927
-        rtl8168_mac_ocp_write(tp, 0xF8BC, 0x484F);
1928
-        rtl8168_mac_ocp_write(tp, 0xF8BE, 0x9CE2);
1929
-        rtl8168_mac_ocp_write(tp, 0xF8C0, 0x74E2);
1930
-        rtl8168_mac_ocp_write(tp, 0xF8C2, 0x49CE);
1931
-        rtl8168_mac_ocp_write(tp, 0xF8C4, 0xF1FE);
1932
-        rtl8168_mac_ocp_write(tp, 0xF8C6, 0xC412);
1933
-        rtl8168_mac_ocp_write(tp, 0xF8C8, 0x9CE0);
1934
-        rtl8168_mac_ocp_write(tp, 0xF8CA, 0x1C13);
1935
-        rtl8168_mac_ocp_write(tp, 0xF8CC, 0x484F);
1936
-        rtl8168_mac_ocp_write(tp, 0xF8CE, 0x9CE2);
1937
-        rtl8168_mac_ocp_write(tp, 0xF8D0, 0x74E2);
1938
-        rtl8168_mac_ocp_write(tp, 0xF8D2, 0x49CE);
1939
-        rtl8168_mac_ocp_write(tp, 0xF8D4, 0xF1FE);
1940
-        rtl8168_mac_ocp_write(tp, 0xF8D6, 0xC70C);
1941
-        rtl8168_mac_ocp_write(tp, 0xF8D8, 0x74F8);
1942
-        rtl8168_mac_ocp_write(tp, 0xF8DA, 0x48C3);
1943
-        rtl8168_mac_ocp_write(tp, 0xF8DC, 0x8CF8);
1944
-        rtl8168_mac_ocp_write(tp, 0xF8DE, 0xB004);
1945
-        rtl8168_mac_ocp_write(tp, 0xF8E0, 0xB007);
1946
-        rtl8168_mac_ocp_write(tp, 0xF8E2, 0xC502);
1947
-        rtl8168_mac_ocp_write(tp, 0xF8E4, 0xBD00);
1948
-        rtl8168_mac_ocp_write(tp, 0xF8E6, 0x0F24);
1949
-        rtl8168_mac_ocp_write(tp, 0xF8E8, 0x0481);
1950
-        rtl8168_mac_ocp_write(tp, 0xF8EA, 0x0C81);
1951
-        rtl8168_mac_ocp_write(tp, 0xF8EC, 0xDE24);
1952
-        rtl8168_mac_ocp_write(tp, 0xF8EE, 0xE000);
1953
-        rtl8168_mac_ocp_write(tp, 0xF8F0, 0xC602);
1954
-        rtl8168_mac_ocp_write(tp, 0xF8F2, 0xBE00);
1955
-        rtl8168_mac_ocp_write(tp, 0xF8F4, 0x0CA4);
1956
-        rtl8168_mac_ocp_write(tp, 0xF8F6, 0xC502);
1957
-        rtl8168_mac_ocp_write(tp, 0xF8F8, 0xBD00);
1958
-        rtl8168_mac_ocp_write(tp, 0xF8FA, 0x0000);
1959
-        rtl8168_mac_ocp_write(tp, 0xF8FC, 0xC602);
1960
-        rtl8168_mac_ocp_write(tp, 0xF8FE, 0xBE00);
1961
-        rtl8168_mac_ocp_write(tp, 0xF900, 0x0000);
1962
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_1); i++) {
1963
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168h_1[i]);
1964
+        }
1965
 
1966
         rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
1967
 
1968
@@ -8527,792 +8539,219 @@
1969
         rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0B26);
1970
         rtl8168_mac_ocp_write(tp, 0xFC30, 0x0F02);
1971
         rtl8168_mac_ocp_write(tp, 0xFC32, 0x0CA0);
1972
+        rtl8168_mac_ocp_write(tp, 0xFC34, 0x056C);
1973
 
1974
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x003F);
1975
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x007F);
1976
 }
1977
 
1978
 static void
1979
 rtl8168_set_mac_mcu_8168fp_1(struct net_device *dev)
1980
 {
1981
         struct rtl8168_private *tp = netdev_priv(dev);
1982
+        u16 i;
1983
+        u16 breakPointEnabled = 0;
1984
 
1985
         rtl8168_hw_disable_mac_mcu_bps(dev);
1986
 
1987
-        rtl8168_mac_ocp_write(tp, 0xF800, 0xE00A);
1988
-        rtl8168_mac_ocp_write(tp, 0xF802, 0xE0C1);
1989
-        rtl8168_mac_ocp_write(tp, 0xF804, 0xE104);
1990
-        rtl8168_mac_ocp_write(tp, 0xF806, 0xE108);
1991
-        rtl8168_mac_ocp_write(tp, 0xF808, 0xE10D);
1992
-        rtl8168_mac_ocp_write(tp, 0xF80A, 0xE112);
1993
-        rtl8168_mac_ocp_write(tp, 0xF80C, 0xE11C);
1994
-        rtl8168_mac_ocp_write(tp, 0xF80E, 0xE121);
1995
-        rtl8168_mac_ocp_write(tp, 0xF810, 0xE000);
1996
-        rtl8168_mac_ocp_write(tp, 0xF812, 0xE0C8);
1997
-        rtl8168_mac_ocp_write(tp, 0xF814, 0xB400);
1998
-        rtl8168_mac_ocp_write(tp, 0xF816, 0xC1FE);
1999
-        rtl8168_mac_ocp_write(tp, 0xF818, 0x49E2);
2000
-        rtl8168_mac_ocp_write(tp, 0xF81A, 0xF04C);
2001
-        rtl8168_mac_ocp_write(tp, 0xF81C, 0x49EA);
2002
-        rtl8168_mac_ocp_write(tp, 0xF81E, 0xF04A);
2003
-        rtl8168_mac_ocp_write(tp, 0xF820, 0x74E6);
2004
-        rtl8168_mac_ocp_write(tp, 0xF822, 0xC246);
2005
-        rtl8168_mac_ocp_write(tp, 0xF824, 0x7542);
2006
-        rtl8168_mac_ocp_write(tp, 0xF826, 0x73EC);
2007
-        rtl8168_mac_ocp_write(tp, 0xF828, 0x1800);
2008
-        rtl8168_mac_ocp_write(tp, 0xF82A, 0x49C0);
2009
-        rtl8168_mac_ocp_write(tp, 0xF82C, 0xF10D);
2010
-        rtl8168_mac_ocp_write(tp, 0xF82E, 0x49C1);
2011
-        rtl8168_mac_ocp_write(tp, 0xF830, 0xF10B);
2012
-        rtl8168_mac_ocp_write(tp, 0xF832, 0x49C2);
2013
-        rtl8168_mac_ocp_write(tp, 0xF834, 0xF109);
2014
-        rtl8168_mac_ocp_write(tp, 0xF836, 0x49B0);
2015
-        rtl8168_mac_ocp_write(tp, 0xF838, 0xF107);
2016
-        rtl8168_mac_ocp_write(tp, 0xF83A, 0x49B1);
2017
-        rtl8168_mac_ocp_write(tp, 0xF83C, 0xF105);
2018
-        rtl8168_mac_ocp_write(tp, 0xF83E, 0x7220);
2019
-        rtl8168_mac_ocp_write(tp, 0xF840, 0x49A2);
2020
-        rtl8168_mac_ocp_write(tp, 0xF842, 0xF102);
2021
-        rtl8168_mac_ocp_write(tp, 0xF844, 0xE002);
2022
-        rtl8168_mac_ocp_write(tp, 0xF846, 0x4800);
2023
-        rtl8168_mac_ocp_write(tp, 0xF848, 0x49D0);
2024
-        rtl8168_mac_ocp_write(tp, 0xF84A, 0xF10A);
2025
-        rtl8168_mac_ocp_write(tp, 0xF84C, 0x49D1);
2026
-        rtl8168_mac_ocp_write(tp, 0xF84E, 0xF108);
2027
-        rtl8168_mac_ocp_write(tp, 0xF850, 0x49D2);
2028
-        rtl8168_mac_ocp_write(tp, 0xF852, 0xF106);
2029
-        rtl8168_mac_ocp_write(tp, 0xF854, 0x49D3);
2030
-        rtl8168_mac_ocp_write(tp, 0xF856, 0xF104);
2031
-        rtl8168_mac_ocp_write(tp, 0xF858, 0x49DF);
2032
-        rtl8168_mac_ocp_write(tp, 0xF85A, 0xF102);
2033
-        rtl8168_mac_ocp_write(tp, 0xF85C, 0xE00C);
2034
-        rtl8168_mac_ocp_write(tp, 0xF85E, 0x4801);
2035
-        rtl8168_mac_ocp_write(tp, 0xF860, 0x72E4);
2036
-        rtl8168_mac_ocp_write(tp, 0xF862, 0x49AD);
2037
-        rtl8168_mac_ocp_write(tp, 0xF864, 0xF108);
2038
-        rtl8168_mac_ocp_write(tp, 0xF866, 0xC225);
2039
-        rtl8168_mac_ocp_write(tp, 0xF868, 0x6741);
2040
-        rtl8168_mac_ocp_write(tp, 0xF86A, 0x48F0);
2041
-        rtl8168_mac_ocp_write(tp, 0xF86C, 0x8F41);
2042
-        rtl8168_mac_ocp_write(tp, 0xF86E, 0x4870);
2043
-        rtl8168_mac_ocp_write(tp, 0xF870, 0x8F41);
2044
-        rtl8168_mac_ocp_write(tp, 0xF872, 0xC7CF);
2045
-        rtl8168_mac_ocp_write(tp, 0xF874, 0x49B5);
2046
-        rtl8168_mac_ocp_write(tp, 0xF876, 0xF01F);
2047
-        rtl8168_mac_ocp_write(tp, 0xF878, 0x49B2);
2048
-        rtl8168_mac_ocp_write(tp, 0xF87A, 0xF00B);
2049
-        rtl8168_mac_ocp_write(tp, 0xF87C, 0x4980);
2050
-        rtl8168_mac_ocp_write(tp, 0xF87E, 0xF003);
2051
-        rtl8168_mac_ocp_write(tp, 0xF880, 0x484E);
2052
-        rtl8168_mac_ocp_write(tp, 0xF882, 0x94E7);
2053
-        rtl8168_mac_ocp_write(tp, 0xF884, 0x4981);
2054
-        rtl8168_mac_ocp_write(tp, 0xF886, 0xF004);
2055
-        rtl8168_mac_ocp_write(tp, 0xF888, 0x485E);
2056
-        rtl8168_mac_ocp_write(tp, 0xF88A, 0xC212);
2057
-        rtl8168_mac_ocp_write(tp, 0xF88C, 0x9543);
2058
-        rtl8168_mac_ocp_write(tp, 0xF88E, 0xE071);
2059
-        rtl8168_mac_ocp_write(tp, 0xF890, 0x49B6);
2060
-        rtl8168_mac_ocp_write(tp, 0xF892, 0xF003);
2061
-        rtl8168_mac_ocp_write(tp, 0xF894, 0x49B3);
2062
-        rtl8168_mac_ocp_write(tp, 0xF896, 0xF10F);
2063
-        rtl8168_mac_ocp_write(tp, 0xF898, 0x4980);
2064
-        rtl8168_mac_ocp_write(tp, 0xF89A, 0xF003);
2065
-        rtl8168_mac_ocp_write(tp, 0xF89C, 0x484E);
2066
-        rtl8168_mac_ocp_write(tp, 0xF89E, 0x94E7);
2067
-        rtl8168_mac_ocp_write(tp, 0xF8A0, 0x4981);
2068
-        rtl8168_mac_ocp_write(tp, 0xF8A2, 0xF004);
2069
-        rtl8168_mac_ocp_write(tp, 0xF8A4, 0x485E);
2070
-        rtl8168_mac_ocp_write(tp, 0xF8A6, 0xC204);
2071
-        rtl8168_mac_ocp_write(tp, 0xF8A8, 0x9543);
2072
-        rtl8168_mac_ocp_write(tp, 0xF8AA, 0xE005);
2073
-        rtl8168_mac_ocp_write(tp, 0xF8AC, 0xE000);
2074
-        rtl8168_mac_ocp_write(tp, 0xF8AE, 0xE0FC);
2075
-        rtl8168_mac_ocp_write(tp, 0xF8B0, 0xE0FA);
2076
-        rtl8168_mac_ocp_write(tp, 0xF8B2, 0xE065);
2077
-        rtl8168_mac_ocp_write(tp, 0xF8B4, 0x49B7);
2078
-        rtl8168_mac_ocp_write(tp, 0xF8B6, 0xF007);
2079
-        rtl8168_mac_ocp_write(tp, 0xF8B8, 0x4980);
2080
-        rtl8168_mac_ocp_write(tp, 0xF8BA, 0xF005);
2081
-        rtl8168_mac_ocp_write(tp, 0xF8BC, 0x1A38);
2082
-        rtl8168_mac_ocp_write(tp, 0xF8BE, 0x46D4);
2083
-        rtl8168_mac_ocp_write(tp, 0xF8C0, 0x1200);
2084
-        rtl8168_mac_ocp_write(tp, 0xF8C2, 0xF109);
2085
-        rtl8168_mac_ocp_write(tp, 0xF8C4, 0x4981);
2086
-        rtl8168_mac_ocp_write(tp, 0xF8C6, 0xF055);
2087
-        rtl8168_mac_ocp_write(tp, 0xF8C8, 0x49C3);
2088
-        rtl8168_mac_ocp_write(tp, 0xF8CA, 0xF105);
2089
-        rtl8168_mac_ocp_write(tp, 0xF8CC, 0x1A30);
2090
-        rtl8168_mac_ocp_write(tp, 0xF8CE, 0x46D5);
2091
-        rtl8168_mac_ocp_write(tp, 0xF8D0, 0x1200);
2092
-        rtl8168_mac_ocp_write(tp, 0xF8D2, 0xF04F);
2093
-        rtl8168_mac_ocp_write(tp, 0xF8D4, 0x7220);
2094
-        rtl8168_mac_ocp_write(tp, 0xF8D6, 0x49A2);
2095
-        rtl8168_mac_ocp_write(tp, 0xF8D8, 0xF130);
2096
-        rtl8168_mac_ocp_write(tp, 0xF8DA, 0x49C1);
2097
-        rtl8168_mac_ocp_write(tp, 0xF8DC, 0xF12E);
2098
-        rtl8168_mac_ocp_write(tp, 0xF8DE, 0x49B0);
2099
-        rtl8168_mac_ocp_write(tp, 0xF8E0, 0xF12C);
2100
-        rtl8168_mac_ocp_write(tp, 0xF8E2, 0xC2E6);
2101
-        rtl8168_mac_ocp_write(tp, 0xF8E4, 0x7240);
2102
-        rtl8168_mac_ocp_write(tp, 0xF8E6, 0x49A8);
2103
-        rtl8168_mac_ocp_write(tp, 0xF8E8, 0xF003);
2104
-        rtl8168_mac_ocp_write(tp, 0xF8EA, 0x49D0);
2105
-        rtl8168_mac_ocp_write(tp, 0xF8EC, 0xF126);
2106
-        rtl8168_mac_ocp_write(tp, 0xF8EE, 0x49A9);
2107
-        rtl8168_mac_ocp_write(tp, 0xF8F0, 0xF003);
2108
-        rtl8168_mac_ocp_write(tp, 0xF8F2, 0x49D1);
2109
-        rtl8168_mac_ocp_write(tp, 0xF8F4, 0xF122);
2110
-        rtl8168_mac_ocp_write(tp, 0xF8F6, 0x49AA);
2111
-        rtl8168_mac_ocp_write(tp, 0xF8F8, 0xF003);
2112
-        rtl8168_mac_ocp_write(tp, 0xF8FA, 0x49D2);
2113
-        rtl8168_mac_ocp_write(tp, 0xF8FC, 0xF11E);
2114
-        rtl8168_mac_ocp_write(tp, 0xF8FE, 0x49AB);
2115
-        rtl8168_mac_ocp_write(tp, 0xF900, 0xF003);
2116
-        rtl8168_mac_ocp_write(tp, 0xF902, 0x49DF);
2117
-        rtl8168_mac_ocp_write(tp, 0xF904, 0xF11A);
2118
-        rtl8168_mac_ocp_write(tp, 0xF906, 0x49AC);
2119
-        rtl8168_mac_ocp_write(tp, 0xF908, 0xF003);
2120
-        rtl8168_mac_ocp_write(tp, 0xF90A, 0x49D3);
2121
-        rtl8168_mac_ocp_write(tp, 0xF90C, 0xF116);
2122
-        rtl8168_mac_ocp_write(tp, 0xF90E, 0x4980);
2123
-        rtl8168_mac_ocp_write(tp, 0xF910, 0xF003);
2124
-        rtl8168_mac_ocp_write(tp, 0xF912, 0x49C7);
2125
-        rtl8168_mac_ocp_write(tp, 0xF914, 0xF105);
2126
-        rtl8168_mac_ocp_write(tp, 0xF916, 0x4981);
2127
-        rtl8168_mac_ocp_write(tp, 0xF918, 0xF02C);
2128
-        rtl8168_mac_ocp_write(tp, 0xF91A, 0x49D7);
2129
-        rtl8168_mac_ocp_write(tp, 0xF91C, 0xF02A);
2130
-        rtl8168_mac_ocp_write(tp, 0xF91E, 0x49C0);
2131
-        rtl8168_mac_ocp_write(tp, 0xF920, 0xF00C);
2132
-        rtl8168_mac_ocp_write(tp, 0xF922, 0xC721);
2133
-        rtl8168_mac_ocp_write(tp, 0xF924, 0x62F4);
2134
-        rtl8168_mac_ocp_write(tp, 0xF926, 0x49A0);
2135
-        rtl8168_mac_ocp_write(tp, 0xF928, 0xF008);
2136
-        rtl8168_mac_ocp_write(tp, 0xF92A, 0x49A4);
2137
-        rtl8168_mac_ocp_write(tp, 0xF92C, 0xF106);
2138
-        rtl8168_mac_ocp_write(tp, 0xF92E, 0x4824);
2139
-        rtl8168_mac_ocp_write(tp, 0xF930, 0x8AF4);
2140
-        rtl8168_mac_ocp_write(tp, 0xF932, 0xC71A);
2141
-        rtl8168_mac_ocp_write(tp, 0xF934, 0x1A40);
2142
-        rtl8168_mac_ocp_write(tp, 0xF936, 0x9AE0);
2143
-        rtl8168_mac_ocp_write(tp, 0xF938, 0x49B6);
2144
-        rtl8168_mac_ocp_write(tp, 0xF93A, 0xF017);
2145
-        rtl8168_mac_ocp_write(tp, 0xF93C, 0x200E);
2146
-        rtl8168_mac_ocp_write(tp, 0xF93E, 0xC7B8);
2147
-        rtl8168_mac_ocp_write(tp, 0xF940, 0x72E0);
2148
-        rtl8168_mac_ocp_write(tp, 0xF942, 0x4710);
2149
-        rtl8168_mac_ocp_write(tp, 0xF944, 0x92E1);
2150
-        rtl8168_mac_ocp_write(tp, 0xF946, 0xC70E);
2151
-        rtl8168_mac_ocp_write(tp, 0xF948, 0x77E0);
2152
-        rtl8168_mac_ocp_write(tp, 0xF94A, 0x49F0);
2153
-        rtl8168_mac_ocp_write(tp, 0xF94C, 0xF112);
2154
-        rtl8168_mac_ocp_write(tp, 0xF94E, 0xC70B);
2155
-        rtl8168_mac_ocp_write(tp, 0xF950, 0x77E0);
2156
-        rtl8168_mac_ocp_write(tp, 0xF952, 0x27FE);
2157
-        rtl8168_mac_ocp_write(tp, 0xF954, 0x1AFA);
2158
-        rtl8168_mac_ocp_write(tp, 0xF956, 0x4317);
2159
-        rtl8168_mac_ocp_write(tp, 0xF958, 0xC705);
2160
-        rtl8168_mac_ocp_write(tp, 0xF95A, 0x9AE2);
2161
-        rtl8168_mac_ocp_write(tp, 0xF95C, 0x1A11);
2162
-        rtl8168_mac_ocp_write(tp, 0xF95E, 0x8AE0);
2163
-        rtl8168_mac_ocp_write(tp, 0xF960, 0xE008);
2164
-        rtl8168_mac_ocp_write(tp, 0xF962, 0xE41C);
2165
-        rtl8168_mac_ocp_write(tp, 0xF964, 0xC0AE);
2166
-        rtl8168_mac_ocp_write(tp, 0xF966, 0xD23A);
2167
-        rtl8168_mac_ocp_write(tp, 0xF968, 0xC7A2);
2168
-        rtl8168_mac_ocp_write(tp, 0xF96A, 0x74E6);
2169
-        rtl8168_mac_ocp_write(tp, 0xF96C, 0x484F);
2170
-        rtl8168_mac_ocp_write(tp, 0xF96E, 0x94E7);
2171
-        rtl8168_mac_ocp_write(tp, 0xF970, 0xC79E);
2172
-        rtl8168_mac_ocp_write(tp, 0xF972, 0x8CE6);
2173
-        rtl8168_mac_ocp_write(tp, 0xF974, 0x8BEC);
2174
-        rtl8168_mac_ocp_write(tp, 0xF976, 0xC29C);
2175
-        rtl8168_mac_ocp_write(tp, 0xF978, 0x8D42);
2176
-        rtl8168_mac_ocp_write(tp, 0xF97A, 0x7220);
2177
-        rtl8168_mac_ocp_write(tp, 0xF97C, 0xB000);
2178
-        rtl8168_mac_ocp_write(tp, 0xF97E, 0xC502);
2179
-        rtl8168_mac_ocp_write(tp, 0xF980, 0xBD00);
2180
-        rtl8168_mac_ocp_write(tp, 0xF982, 0x0932);
2181
-        rtl8168_mac_ocp_write(tp, 0xF984, 0xB400);
2182
-        rtl8168_mac_ocp_write(tp, 0xF986, 0xC240);
2183
-        rtl8168_mac_ocp_write(tp, 0xF988, 0xC340);
2184
-        rtl8168_mac_ocp_write(tp, 0xF98A, 0x7060);
2185
-        rtl8168_mac_ocp_write(tp, 0xF98C, 0x498F);
2186
-        rtl8168_mac_ocp_write(tp, 0xF98E, 0xF014);
2187
-        rtl8168_mac_ocp_write(tp, 0xF990, 0x488F);
2188
-        rtl8168_mac_ocp_write(tp, 0xF992, 0x9061);
2189
-        rtl8168_mac_ocp_write(tp, 0xF994, 0x744C);
2190
-        rtl8168_mac_ocp_write(tp, 0xF996, 0x49C3);
2191
-        rtl8168_mac_ocp_write(tp, 0xF998, 0xF004);
2192
-        rtl8168_mac_ocp_write(tp, 0xF99A, 0x7562);
2193
-        rtl8168_mac_ocp_write(tp, 0xF99C, 0x485E);
2194
-        rtl8168_mac_ocp_write(tp, 0xF99E, 0x9563);
2195
-        rtl8168_mac_ocp_write(tp, 0xF9A0, 0x7446);
2196
-        rtl8168_mac_ocp_write(tp, 0xF9A2, 0x49C3);
2197
-        rtl8168_mac_ocp_write(tp, 0xF9A4, 0xF106);
2198
-        rtl8168_mac_ocp_write(tp, 0xF9A6, 0x7562);
2199
-        rtl8168_mac_ocp_write(tp, 0xF9A8, 0x1C30);
2200
-        rtl8168_mac_ocp_write(tp, 0xF9AA, 0x46E5);
2201
-        rtl8168_mac_ocp_write(tp, 0xF9AC, 0x1200);
2202
-        rtl8168_mac_ocp_write(tp, 0xF9AE, 0xF004);
2203
-        rtl8168_mac_ocp_write(tp, 0xF9B0, 0x7446);
2204
-        rtl8168_mac_ocp_write(tp, 0xF9B2, 0x484F);
2205
-        rtl8168_mac_ocp_write(tp, 0xF9B4, 0x9447);
2206
-        rtl8168_mac_ocp_write(tp, 0xF9B6, 0xC32A);
2207
-        rtl8168_mac_ocp_write(tp, 0xF9B8, 0x7466);
2208
-        rtl8168_mac_ocp_write(tp, 0xF9BA, 0x49C0);
2209
-        rtl8168_mac_ocp_write(tp, 0xF9BC, 0xF00F);
2210
-        rtl8168_mac_ocp_write(tp, 0xF9BE, 0x48C0);
2211
-        rtl8168_mac_ocp_write(tp, 0xF9C0, 0x9C66);
2212
-        rtl8168_mac_ocp_write(tp, 0xF9C2, 0x7446);
2213
-        rtl8168_mac_ocp_write(tp, 0xF9C4, 0x4840);
2214
-        rtl8168_mac_ocp_write(tp, 0xF9C6, 0x4841);
2215
-        rtl8168_mac_ocp_write(tp, 0xF9C8, 0x4842);
2216
-        rtl8168_mac_ocp_write(tp, 0xF9CA, 0x9C46);
2217
-        rtl8168_mac_ocp_write(tp, 0xF9CC, 0x744C);
2218
-        rtl8168_mac_ocp_write(tp, 0xF9CE, 0x4840);
2219
-        rtl8168_mac_ocp_write(tp, 0xF9D0, 0x9C4C);
2220
-        rtl8168_mac_ocp_write(tp, 0xF9D2, 0x744A);
2221
-        rtl8168_mac_ocp_write(tp, 0xF9D4, 0x484A);
2222
-        rtl8168_mac_ocp_write(tp, 0xF9D6, 0x9C4A);
2223
-        rtl8168_mac_ocp_write(tp, 0xF9D8, 0xE013);
2224
-        rtl8168_mac_ocp_write(tp, 0xF9DA, 0x498E);
2225
-        rtl8168_mac_ocp_write(tp, 0xF9DC, 0xF011);
2226
-        rtl8168_mac_ocp_write(tp, 0xF9DE, 0x488E);
2227
-        rtl8168_mac_ocp_write(tp, 0xF9E0, 0x9061);
2228
-        rtl8168_mac_ocp_write(tp, 0xF9E2, 0x744C);
2229
-        rtl8168_mac_ocp_write(tp, 0xF9E4, 0x49C3);
2230
-        rtl8168_mac_ocp_write(tp, 0xF9E6, 0xF004);
2231
-        rtl8168_mac_ocp_write(tp, 0xF9E8, 0x7446);
2232
-        rtl8168_mac_ocp_write(tp, 0xF9EA, 0x484E);
2233
-        rtl8168_mac_ocp_write(tp, 0xF9EC, 0x9447);
2234
-        rtl8168_mac_ocp_write(tp, 0xF9EE, 0x7446);
2235
-        rtl8168_mac_ocp_write(tp, 0xF9F0, 0x1D38);
2236
-        rtl8168_mac_ocp_write(tp, 0xF9F2, 0x46EC);
2237
-        rtl8168_mac_ocp_write(tp, 0xF9F4, 0x1500);
2238
-        rtl8168_mac_ocp_write(tp, 0xF9F6, 0xF004);
2239
-        rtl8168_mac_ocp_write(tp, 0xF9F8, 0x7446);
2240
-        rtl8168_mac_ocp_write(tp, 0xF9FA, 0x484F);
2241
-        rtl8168_mac_ocp_write(tp, 0xF9FC, 0x9447);
2242
-        rtl8168_mac_ocp_write(tp, 0xF9FE, 0xB000);
2243
-        rtl8168_mac_ocp_write(tp, 0xFA00, 0xC502);
2244
-        rtl8168_mac_ocp_write(tp, 0xFA02, 0xBD00);
2245
-        rtl8168_mac_ocp_write(tp, 0xFA04, 0x074C);
2246
-        rtl8168_mac_ocp_write(tp, 0xFA06, 0xE000);
2247
-        rtl8168_mac_ocp_write(tp, 0xFA08, 0xE0FC);
2248
-        rtl8168_mac_ocp_write(tp, 0xFA0A, 0xE0C0);
2249
-        rtl8168_mac_ocp_write(tp, 0xFA0C, 0x4830);
2250
-        rtl8168_mac_ocp_write(tp, 0xFA0E, 0x4837);
2251
-        rtl8168_mac_ocp_write(tp, 0xFA10, 0xC502);
2252
-        rtl8168_mac_ocp_write(tp, 0xFA12, 0xBD00);
2253
-        rtl8168_mac_ocp_write(tp, 0xFA14, 0x0978);
2254
-        rtl8168_mac_ocp_write(tp, 0xFA16, 0x63E2);
2255
-        rtl8168_mac_ocp_write(tp, 0xFA18, 0x4830);
2256
-        rtl8168_mac_ocp_write(tp, 0xFA1A, 0x4837);
2257
-        rtl8168_mac_ocp_write(tp, 0xFA1C, 0xC502);
2258
-        rtl8168_mac_ocp_write(tp, 0xFA1E, 0xBD00);
2259
-        rtl8168_mac_ocp_write(tp, 0xFA20, 0x09FE);
2260
-        rtl8168_mac_ocp_write(tp, 0xFA22, 0x73E2);
2261
-        rtl8168_mac_ocp_write(tp, 0xFA24, 0x4830);
2262
-        rtl8168_mac_ocp_write(tp, 0xFA26, 0x8BE2);
2263
-        rtl8168_mac_ocp_write(tp, 0xFA28, 0xC302);
2264
-        rtl8168_mac_ocp_write(tp, 0xFA2A, 0xBB00);
2265
-        rtl8168_mac_ocp_write(tp, 0xFA2C, 0x0A12);
2266
-        rtl8168_mac_ocp_write(tp, 0xFA2E, 0x73E2);
2267
-        rtl8168_mac_ocp_write(tp, 0xFA30, 0x48B0);
2268
-        rtl8168_mac_ocp_write(tp, 0xFA32, 0x48B3);
2269
-        rtl8168_mac_ocp_write(tp, 0xFA34, 0x48B4);
2270
-        rtl8168_mac_ocp_write(tp, 0xFA36, 0x48B5);
2271
-        rtl8168_mac_ocp_write(tp, 0xFA38, 0x48B6);
2272
-        rtl8168_mac_ocp_write(tp, 0xFA3A, 0x48B7);
2273
-        rtl8168_mac_ocp_write(tp, 0xFA3C, 0x8BE2);
2274
-        rtl8168_mac_ocp_write(tp, 0xFA3E, 0xC302);
2275
-        rtl8168_mac_ocp_write(tp, 0xFA40, 0xBB00);
2276
-        rtl8168_mac_ocp_write(tp, 0xFA42, 0x0A5A);
2277
-        rtl8168_mac_ocp_write(tp, 0xFA44, 0x73E2);
2278
-        rtl8168_mac_ocp_write(tp, 0xFA46, 0x4830);
2279
-        rtl8168_mac_ocp_write(tp, 0xFA48, 0x8BE2);
2280
-        rtl8168_mac_ocp_write(tp, 0xFA4A, 0xC302);
2281
-        rtl8168_mac_ocp_write(tp, 0xFA4C, 0xBB00);
2282
-        rtl8168_mac_ocp_write(tp, 0xFA4E, 0x0A6C);
2283
-        rtl8168_mac_ocp_write(tp, 0xFA50, 0x73E2);
2284
-        rtl8168_mac_ocp_write(tp, 0xFA52, 0x4830);
2285
-        rtl8168_mac_ocp_write(tp, 0xFA54, 0x4837);
2286
-        rtl8168_mac_ocp_write(tp, 0xFA56, 0xC502);
2287
-        rtl8168_mac_ocp_write(tp, 0xFA58, 0xBD00);
2288
-        rtl8168_mac_ocp_write(tp, 0xFA5A, 0x0A86);
2289
+        if(tp->HwPkgDet == 0x00 || tp->HwPkgDet == 0x0F) {
2290
+                static const u16 mcu_patch_code_8168fp_1_1[] = {
2291
+                        0xE00A, 0xE0C1, 0xE104, 0xE108, 0xE10D, 0xE112, 0xE11C, 0xE121, 0xE000,
2292
+                        0xE0C8, 0xB400, 0xC1FE, 0x49E2, 0xF04C, 0x49EA, 0xF04A, 0x74E6, 0xC246,
2293
+                        0x7542, 0x73EC, 0x1800, 0x49C0, 0xF10D, 0x49C1, 0xF10B, 0x49C2, 0xF109,
2294
+                        0x49B0, 0xF107, 0x49B1, 0xF105, 0x7220, 0x49A2, 0xF102, 0xE002, 0x4800,
2295
+                        0x49D0, 0xF10A, 0x49D1, 0xF108, 0x49D2, 0xF106, 0x49D3, 0xF104, 0x49DF,
2296
+                        0xF102, 0xE00C, 0x4801, 0x72E4, 0x49AD, 0xF108, 0xC225, 0x6741, 0x48F0,
2297
+                        0x8F41, 0x4870, 0x8F41, 0xC7CF, 0x49B5, 0xF01F, 0x49B2, 0xF00B, 0x4980,
2298
+                        0xF003, 0x484E, 0x94E7, 0x4981, 0xF004, 0x485E, 0xC212, 0x9543, 0xE071,
2299
+                        0x49B6, 0xF003, 0x49B3, 0xF10F, 0x4980, 0xF003, 0x484E, 0x94E7, 0x4981,
2300
+                        0xF004, 0x485E, 0xC204, 0x9543, 0xE005, 0xE000, 0xE0FC, 0xE0FA, 0xE065,
2301
+                        0x49B7, 0xF007, 0x4980, 0xF005, 0x1A38, 0x46D4, 0x1200, 0xF109, 0x4981,
2302
+                        0xF055, 0x49C3, 0xF105, 0x1A30, 0x46D5, 0x1200, 0xF04F, 0x7220, 0x49A2,
2303
+                        0xF130, 0x49C1, 0xF12E, 0x49B0, 0xF12C, 0xC2E6, 0x7240, 0x49A8, 0xF003,
2304
+                        0x49D0, 0xF126, 0x49A9, 0xF003, 0x49D1, 0xF122, 0x49AA, 0xF003, 0x49D2,
2305
+                        0xF11E, 0x49AB, 0xF003, 0x49DF, 0xF11A, 0x49AC, 0xF003, 0x49D3, 0xF116,
2306
+                        0x4980, 0xF003, 0x49C7, 0xF105, 0x4981, 0xF02C, 0x49D7, 0xF02A, 0x49C0,
2307
+                        0xF00C, 0xC721, 0x62F4, 0x49A0, 0xF008, 0x49A4, 0xF106, 0x4824, 0x8AF4,
2308
+                        0xC71A, 0x1A40, 0x9AE0, 0x49B6, 0xF017, 0x200E, 0xC7B8, 0x72E0, 0x4710,
2309
+                        0x92E1, 0xC70E, 0x77E0, 0x49F0, 0xF112, 0xC70B, 0x77E0, 0x27FE, 0x1AFA,
2310
+                        0x4317, 0xC705, 0x9AE2, 0x1A11, 0x8AE0, 0xE008, 0xE41C, 0xC0AE, 0xD23A,
2311
+                        0xC7A2, 0x74E6, 0x484F, 0x94E7, 0xC79E, 0x8CE6, 0x8BEC, 0xC29C, 0x8D42,
2312
+                        0x7220, 0xB000, 0xC502, 0xBD00, 0x0932, 0xB400, 0xC240, 0xC340, 0x7060,
2313
+                        0x498F, 0xF014, 0x488F, 0x9061, 0x744C, 0x49C3, 0xF004, 0x7562, 0x485E,
2314
+                        0x9563, 0x7446, 0x49C3, 0xF106, 0x7562, 0x1C30, 0x46E5, 0x1200, 0xF004,
2315
+                        0x7446, 0x484F, 0x9447, 0xC32A, 0x7466, 0x49C0, 0xF00F, 0x48C0, 0x9C66,
2316
+                        0x7446, 0x4840, 0x4841, 0x4842, 0x9C46, 0x744C, 0x4840, 0x9C4C, 0x744A,
2317
+                        0x484A, 0x9C4A, 0xE013, 0x498E, 0xF011, 0x488E, 0x9061, 0x744C, 0x49C3,
2318
+                        0xF004, 0x7446, 0x484E, 0x9447, 0x7446, 0x1D38, 0x46EC, 0x1500, 0xF004,
2319
+                        0x7446, 0x484F, 0x9447, 0xB000, 0xC502, 0xBD00, 0x074C, 0xE000, 0xE0FC,
2320
+                        0xE0C0, 0x4830, 0x4837, 0xC502, 0xBD00, 0x0978, 0x63E2, 0x4830, 0x4837,
2321
+                        0xC502, 0xBD00, 0x09FE, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A12,
2322
+                        0x73E2, 0x48B0, 0x48B3, 0x48B4, 0x48B5, 0x48B6, 0x48B7, 0x8BE2, 0xC302,
2323
+                        0xBB00, 0x0A5A, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A6C, 0x73E2,
2324
+                        0x4830, 0x4837, 0xC502, 0xBD00, 0x0A86
2325
+                };
2326
+
2327
+                for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_1); i++) {
2328
+                        rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_1_1[i]);
2329
+                }
2330
+
2331
+                rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
2332
+
2333
+                rtl8168_mac_ocp_write(tp, 0xFC28, 0x0890);
2334
+                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0712);
2335
+                rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0974);
2336
+                rtl8168_mac_ocp_write(tp, 0xFC2E, 0x09FC);
2337
+                rtl8168_mac_ocp_write(tp, 0xFC30, 0x0A0E);
2338
+                rtl8168_mac_ocp_write(tp, 0xFC32, 0x0A56);
2339
+                rtl8168_mac_ocp_write(tp, 0xFC34, 0x0A68);
2340
+                rtl8168_mac_ocp_write(tp, 0xFC36, 0x0A84);
2341
+
2342
+        } else if (tp->HwPkgDet == 0x6) {
2343
+                static const u16 mcu_patch_code_8168fp_1_2[] = {
2344
+                        0xE008, 0xE00A, 0xE031, 0xE033, 0xE035, 0xE144, 0xE166, 0xE168, 0xC502,
2345
+                        0xBD00, 0x0000, 0xC725, 0x75E0, 0x48D0, 0x9DE0, 0xC722, 0x75E0, 0x1C78,
2346
+                        0x416C, 0x1530, 0xF111, 0xC71D, 0x75F6, 0x49D1, 0xF00D, 0x75E0, 0x1C1F,
2347
+                        0x416C, 0x1502, 0xF108, 0x75FA, 0x49D3, 0xF005, 0x75EC, 0x9DE4, 0x4853,
2348
+                        0x9DFA, 0xC70B, 0x75E0, 0x4852, 0x4850, 0x9DE0, 0xC602, 0xBE00, 0x04B8,
2349
+                        0xE420, 0xE000, 0xE0FC, 0xE43C, 0xDC00, 0xEB00, 0xC202, 0xBA00, 0x0000,
2350
+                        0xC002, 0xB800, 0x0000, 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xB406,
2351
+                        0xC44D, 0xC54D, 0x1867, 0xE8A2, 0x2318, 0x276E, 0x1601, 0xF106, 0x1A07,
2352
+                        0xE861, 0xE86B, 0xE873, 0xE037, 0x231E, 0x276E, 0x1602, 0xF10B, 0x1A07,
2353
+                        0xE858, 0xE862, 0xC247, 0xC344, 0xE8E3, 0xC73B, 0x66E0, 0xE8B5, 0xE029,
2354
+                        0x231A, 0x276C, 0xC733, 0x9EE0, 0x1866, 0xE885, 0x251C, 0x120F, 0xF011,
2355
+                        0x1209, 0xF011, 0x2014, 0x240E, 0x1000, 0xF007, 0x120C, 0xF00D, 0x1203,
2356
+                        0xF00D, 0x1200, 0xF00D, 0x120C, 0xF00D, 0x1203, 0xF00D, 0x1A03, 0xE00C,
2357
+                        0x1A07, 0xE00A, 0x1A00, 0xE008, 0x1A01, 0xE006, 0x1A02, 0xE004, 0x1A04,
2358
+                        0xE002, 0x1A05, 0xE829, 0xE833, 0xB006, 0xB005, 0xB004, 0xB003, 0xB002,
2359
+                        0xB001, 0x60C4, 0xC702, 0xBF00, 0x2786, 0xDD00, 0xD030, 0xE0C4, 0xE0F8,
2360
+                        0xDC42, 0xD3F0, 0x0000, 0x0004, 0x0007, 0x0014, 0x0090, 0x1000, 0x0F00,
2361
+                        0x1004, 0x1008, 0x3000, 0x3004, 0x3008, 0x4000, 0x7777, 0x8000, 0x8001,
2362
+                        0x8008, 0x8003, 0x8004, 0xC000, 0xC004, 0xF004, 0xFFFF, 0xB406, 0xB407,
2363
+                        0xC6E5, 0x77C0, 0x27F3, 0x23F3, 0x47FA, 0x9FC0, 0xB007, 0xB006, 0xFF80,
2364
+                        0xB405, 0xB407, 0xC7D8, 0x75E0, 0x48D0, 0x9DE0, 0xB007, 0xB005, 0xFF80,
2365
+                        0xB401, 0xC0EA, 0xC2DC, 0xC3D8, 0xE865, 0xC0D3, 0xC1E0, 0xC2E3, 0xE861,
2366
+                        0xE817, 0xC0CD, 0xC2CF, 0xE85D, 0xC0C9, 0xC1D6, 0xC2DB, 0xE859, 0xE80F,
2367
+                        0xC1C7, 0xC2CE, 0xE855, 0xC0C0, 0xC1D1, 0xC2D3, 0xE851, 0xE807, 0xC0BE,
2368
+                        0xC2C2, 0xE84D, 0xE803, 0xB001, 0xFF80, 0xB402, 0xC2C6, 0xE859, 0x499F,
2369
+                        0xF1FE, 0xB002, 0xFF80, 0xB402, 0xB403, 0xB407, 0xE821, 0x8882, 0x1980,
2370
+                        0x8983, 0xE81D, 0x7180, 0x218B, 0x25BB, 0x1310, 0xF014, 0x1310, 0xFB03,
2371
+                        0x1F20, 0x38FB, 0x3288, 0x434B, 0x2491, 0x430B, 0x1F0F, 0x38FB, 0x4313,
2372
+                        0x2121, 0x4353, 0x2521, 0x418A, 0x6282, 0x2527, 0x212F, 0x418A, 0xB007,
2373
+                        0xB003, 0xB002, 0xFF80, 0x6183, 0x2496, 0x1100, 0xF1FD, 0xFF80, 0x4800,
2374
+                        0x4801, 0xC213, 0xC313, 0xE815, 0x4860, 0x8EE0, 0xC210, 0xC310, 0xE822,
2375
+                        0x481E, 0xC20C, 0xC30C, 0xE80C, 0xC206, 0x7358, 0x483A, 0x9B58, 0xFF80,
2376
+                        0xE8E0, 0xE000, 0x1008, 0x0F00, 0x800C, 0x0F00, 0xB407, 0xB406, 0xB403,
2377
+                        0xC7F7, 0x98E0, 0x99E2, 0x9AE4, 0x21B2, 0x4831, 0x483F, 0x9BE6, 0x66E7,
2378
+                        0x49E6, 0xF1FE, 0xB003, 0xB006, 0xB007, 0xFF80, 0xB407, 0xB406, 0xB403,
2379
+                        0xC7E5, 0x9AE4, 0x21B2, 0x4831, 0x9BE6, 0x66E7, 0x49E6, 0xF1FE, 0x70E0,
2380
+                        0x71E2, 0xB003, 0xB006, 0xB007, 0xFF80, 0x4882, 0xB406, 0xB405, 0xC71E,
2381
+                        0x76E0, 0x1D78, 0x4175, 0x1630, 0xF10C, 0xC715, 0x76E0, 0x4861, 0x9EE0,
2382
+                        0xC713, 0x1EFF, 0x9EE2, 0x75E0, 0x4850, 0x9DE0, 0xE005, 0xC70B, 0x76E0,
2383
+                        0x4865, 0x9EE0, 0xB005, 0xB006, 0xC708, 0xC102, 0xB900, 0x279E, 0xEB16,
2384
+                        0xEB00, 0xE43C, 0xDC00, 0xD3EC, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
2385
+                        0x0000
2386
+                };
2387
 
2388
-        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
2389
+                for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_2); i++) {
2390
+                        rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_1_2[i]);
2391
+                }
2392
+
2393
+                rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
2394
 
2395
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x0890);
2396
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0712);
2397
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0974);
2398
-        rtl8168_mac_ocp_write(tp, 0xFC2E, 0x09FC);
2399
-        rtl8168_mac_ocp_write(tp, 0xFC30, 0x0A0E);
2400
-        rtl8168_mac_ocp_write(tp, 0xFC32, 0x0A56);
2401
-        rtl8168_mac_ocp_write(tp, 0xFC34, 0x0A68);
2402
-        rtl8168_mac_ocp_write(tp, 0xFC36, 0x0A84);
2403
-
2404
-        if (tp->HwPkgDet == 0x0)
2405
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x00FC);
2406
-        else if(tp->HwPkgDet == 0xF)
2407
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x00FF);
2408
+                rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
2409
+                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x04b4);
2410
+                rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
2411
+                rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0000);
2412
+                rtl8168_mac_ocp_write(tp, 0xFC30, 0x0000);
2413
+                rtl8168_mac_ocp_write(tp, 0xFC32, 0x279C);
2414
+                rtl8168_mac_ocp_write(tp, 0xFC34, 0x0000);
2415
+                rtl8168_mac_ocp_write(tp, 0xFC36, 0x0000);
2416
+        }
2417
+
2418
+        if (tp->HwPkgDet == 0x00)
2419
+                breakPointEnabled = 0x00FC;
2420
+        else if (tp->HwPkgDet == 0x0F)
2421
+                breakPointEnabled = 0x00FF;
2422
+        else if (tp->HwPkgDet == 0x06)
2423
+                breakPointEnabled = 0x0022;
2424
+
2425
+        rtl8168_mac_ocp_write(tp, 0xFC38, breakPointEnabled);
2426
 }
2427
 
2428
 static void
2429
 rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
2430
 {
2431
         struct rtl8168_private *tp = netdev_priv(dev);
2432
+        u16 i;
2433
+        static const u16 mcu_patch_code_8168fp_2[] = {
2434
+                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE063, 0xE065, 0xE067, 0xC602,
2435
+                0xBE00, 0x2AB2, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
2436
+                0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xB400, 0xB401, 0xB402, 0xB403,
2437
+                0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE, 0xC137, 0x9904, 0xC136,
2438
+                0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF10B, 0xC52F, 0xC12E,
2439
+                0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330, 0xE80E, 0xE018, 0xC126,
2440
+                0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326, 0xE805, 0xC521, 0xC324,
2441
+                0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x9D0A, 0x9A0C, 0x9B0E,
2442
+                0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004, 0xB003, 0xB002, 0xB001,
2443
+                0xB000, 0xC604, 0xC002, 0xB800, 0x2A5E, 0xE000, 0xE8E0, 0xF128, 0x3DC2,
2444
+                0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000, 0x8002, 0x8004, 0x8007,
2445
+                0x48C1, 0x48C2, 0xC502, 0xBD00, 0x07BC, 0xC602, 0xBE00, 0x0000, 0xC602,
2446
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
2447
+        };
2448
 
2449
         rtl8168_hw_disable_mac_mcu_bps(dev);
2450
 
2451
-        rtl8168_mac_ocp_write(tp, 0xF800, 0xE008);
2452
-        rtl8168_mac_ocp_write(tp, 0xF802, 0xE00A);
2453
-        rtl8168_mac_ocp_write(tp, 0xF804, 0xE031);
2454
-        rtl8168_mac_ocp_write(tp, 0xF806, 0xE033);
2455
-        rtl8168_mac_ocp_write(tp, 0xF808, 0xE035);
2456
-        rtl8168_mac_ocp_write(tp, 0xF80A, 0xE144);
2457
-        rtl8168_mac_ocp_write(tp, 0xF80C, 0xE166);
2458
-        rtl8168_mac_ocp_write(tp, 0xF80E, 0xE168);
2459
-        rtl8168_mac_ocp_write(tp, 0xF810, 0xC502);
2460
-        rtl8168_mac_ocp_write(tp, 0xF812, 0xBD00);
2461
-        rtl8168_mac_ocp_write(tp, 0xF814, 0x0000);
2462
-        rtl8168_mac_ocp_write(tp, 0xF816, 0xC725);
2463
-        rtl8168_mac_ocp_write(tp, 0xF818, 0x75E0);
2464
-        rtl8168_mac_ocp_write(tp, 0xF81A, 0x48D0);
2465
-        rtl8168_mac_ocp_write(tp, 0xF81C, 0x9DE0);
2466
-        rtl8168_mac_ocp_write(tp, 0xF81E, 0xC722);
2467
-        rtl8168_mac_ocp_write(tp, 0xF820, 0x75E0);
2468
-        rtl8168_mac_ocp_write(tp, 0xF822, 0x1C78);
2469
-        rtl8168_mac_ocp_write(tp, 0xF824, 0x416C);
2470
-        rtl8168_mac_ocp_write(tp, 0xF826, 0x1530);
2471
-        rtl8168_mac_ocp_write(tp, 0xF828, 0xF111);
2472
-        rtl8168_mac_ocp_write(tp, 0xF82A, 0xC71D);
2473
-        rtl8168_mac_ocp_write(tp, 0xF82C, 0x75F6);
2474
-        rtl8168_mac_ocp_write(tp, 0xF82E, 0x49D1);
2475
-        rtl8168_mac_ocp_write(tp, 0xF830, 0xF00D);
2476
-        rtl8168_mac_ocp_write(tp, 0xF832, 0x75E0);
2477
-        rtl8168_mac_ocp_write(tp, 0xF834, 0x1C1F);
2478
-        rtl8168_mac_ocp_write(tp, 0xF836, 0x416C);
2479
-        rtl8168_mac_ocp_write(tp, 0xF838, 0x1502);
2480
-        rtl8168_mac_ocp_write(tp, 0xF83A, 0xF108);
2481
-        rtl8168_mac_ocp_write(tp, 0xF83C, 0x75FA);
2482
-        rtl8168_mac_ocp_write(tp, 0xF83E, 0x49D3);
2483
-        rtl8168_mac_ocp_write(tp, 0xF840, 0xF005);
2484
-        rtl8168_mac_ocp_write(tp, 0xF842, 0x75EC);
2485
-        rtl8168_mac_ocp_write(tp, 0xF844, 0x9DE4);
2486
-        rtl8168_mac_ocp_write(tp, 0xF846, 0x4853);
2487
-        rtl8168_mac_ocp_write(tp, 0xF848, 0x9DFA);
2488
-        rtl8168_mac_ocp_write(tp, 0xF84A, 0xC70B);
2489
-        rtl8168_mac_ocp_write(tp, 0xF84C, 0x75E0);
2490
-        rtl8168_mac_ocp_write(tp, 0xF84E, 0x4852);
2491
-        rtl8168_mac_ocp_write(tp, 0xF850, 0x4850);
2492
-        rtl8168_mac_ocp_write(tp, 0xF852, 0x9DE0);
2493
-        rtl8168_mac_ocp_write(tp, 0xF854, 0xC602);
2494
-        rtl8168_mac_ocp_write(tp, 0xF856, 0xBE00);
2495
-        rtl8168_mac_ocp_write(tp, 0xF858, 0x04B8);
2496
-        rtl8168_mac_ocp_write(tp, 0xF85A, 0xE420);
2497
-        rtl8168_mac_ocp_write(tp, 0xF85C, 0xE000);
2498
-        rtl8168_mac_ocp_write(tp, 0xF85E, 0xE0FC);
2499
-        rtl8168_mac_ocp_write(tp, 0xF860, 0xE43C);
2500
-        rtl8168_mac_ocp_write(tp, 0xF862, 0xDC00);
2501
-        rtl8168_mac_ocp_write(tp, 0xF864, 0xEB00);
2502
-        rtl8168_mac_ocp_write(tp, 0xF866, 0xC202);
2503
-        rtl8168_mac_ocp_write(tp, 0xF868, 0xBA00);
2504
-        rtl8168_mac_ocp_write(tp, 0xF86A, 0x0000);
2505
-        rtl8168_mac_ocp_write(tp, 0xF86C, 0xC002);
2506
-        rtl8168_mac_ocp_write(tp, 0xF86E, 0xB800);
2507
-        rtl8168_mac_ocp_write(tp, 0xF870, 0x0000);
2508
-        rtl8168_mac_ocp_write(tp, 0xF872, 0xB401);
2509
-        rtl8168_mac_ocp_write(tp, 0xF874, 0xB402);
2510
-        rtl8168_mac_ocp_write(tp, 0xF876, 0xB403);
2511
-        rtl8168_mac_ocp_write(tp, 0xF878, 0xB404);
2512
-        rtl8168_mac_ocp_write(tp, 0xF87A, 0xB405);
2513
-        rtl8168_mac_ocp_write(tp, 0xF87C, 0xB406);
2514
-        rtl8168_mac_ocp_write(tp, 0xF87E, 0xC44D);
2515
-        rtl8168_mac_ocp_write(tp, 0xF880, 0xC54D);
2516
-        rtl8168_mac_ocp_write(tp, 0xF882, 0x1867);
2517
-        rtl8168_mac_ocp_write(tp, 0xF884, 0xE8A2);
2518
-        rtl8168_mac_ocp_write(tp, 0xF886, 0x2318);
2519
-        rtl8168_mac_ocp_write(tp, 0xF888, 0x276E);
2520
-        rtl8168_mac_ocp_write(tp, 0xF88A, 0x1601);
2521
-        rtl8168_mac_ocp_write(tp, 0xF88C, 0xF106);
2522
-        rtl8168_mac_ocp_write(tp, 0xF88E, 0x1A07);
2523
-        rtl8168_mac_ocp_write(tp, 0xF890, 0xE861);
2524
-        rtl8168_mac_ocp_write(tp, 0xF892, 0xE86B);
2525
-        rtl8168_mac_ocp_write(tp, 0xF894, 0xE873);
2526
-        rtl8168_mac_ocp_write(tp, 0xF896, 0xE037);
2527
-        rtl8168_mac_ocp_write(tp, 0xF898, 0x231E);
2528
-        rtl8168_mac_ocp_write(tp, 0xF89A, 0x276E);
2529
-        rtl8168_mac_ocp_write(tp, 0xF89C, 0x1602);
2530
-        rtl8168_mac_ocp_write(tp, 0xF89E, 0xF10B);
2531
-        rtl8168_mac_ocp_write(tp, 0xF8A0, 0x1A07);
2532
-        rtl8168_mac_ocp_write(tp, 0xF8A2, 0xE858);
2533
-        rtl8168_mac_ocp_write(tp, 0xF8A4, 0xE862);
2534
-        rtl8168_mac_ocp_write(tp, 0xF8A6, 0xC247);
2535
-        rtl8168_mac_ocp_write(tp, 0xF8A8, 0xC344);
2536
-        rtl8168_mac_ocp_write(tp, 0xF8AA, 0xE8E3);
2537
-        rtl8168_mac_ocp_write(tp, 0xF8AC, 0xC73B);
2538
-        rtl8168_mac_ocp_write(tp, 0xF8AE, 0x66E0);
2539
-        rtl8168_mac_ocp_write(tp, 0xF8B0, 0xE8B5);
2540
-        rtl8168_mac_ocp_write(tp, 0xF8B2, 0xE029);
2541
-        rtl8168_mac_ocp_write(tp, 0xF8B4, 0x231A);
2542
-        rtl8168_mac_ocp_write(tp, 0xF8B6, 0x276C);
2543
-        rtl8168_mac_ocp_write(tp, 0xF8B8, 0xC733);
2544
-        rtl8168_mac_ocp_write(tp, 0xF8BA, 0x9EE0);
2545
-        rtl8168_mac_ocp_write(tp, 0xF8BC, 0x1866);
2546
-        rtl8168_mac_ocp_write(tp, 0xF8BE, 0xE885);
2547
-        rtl8168_mac_ocp_write(tp, 0xF8C0, 0x251C);
2548
-        rtl8168_mac_ocp_write(tp, 0xF8C2, 0x120F);
2549
-        rtl8168_mac_ocp_write(tp, 0xF8C4, 0xF011);
2550
-        rtl8168_mac_ocp_write(tp, 0xF8C6, 0x1209);
2551
-        rtl8168_mac_ocp_write(tp, 0xF8C8, 0xF011);
2552
-        rtl8168_mac_ocp_write(tp, 0xF8CA, 0x2014);
2553
-        rtl8168_mac_ocp_write(tp, 0xF8CC, 0x240E);
2554
-        rtl8168_mac_ocp_write(tp, 0xF8CE, 0x1000);
2555
-        rtl8168_mac_ocp_write(tp, 0xF8D0, 0xF007);
2556
-        rtl8168_mac_ocp_write(tp, 0xF8D2, 0x120C);
2557
-        rtl8168_mac_ocp_write(tp, 0xF8D4, 0xF00D);
2558
-        rtl8168_mac_ocp_write(tp, 0xF8D6, 0x1203);
2559
-        rtl8168_mac_ocp_write(tp, 0xF8D8, 0xF00D);
2560
-        rtl8168_mac_ocp_write(tp, 0xF8DA, 0x1200);
2561
-        rtl8168_mac_ocp_write(tp, 0xF8DC, 0xF00D);
2562
-        rtl8168_mac_ocp_write(tp, 0xF8DE, 0x120C);
2563
-        rtl8168_mac_ocp_write(tp, 0xF8E0, 0xF00D);
2564
-        rtl8168_mac_ocp_write(tp, 0xF8E2, 0x1203);
2565
-        rtl8168_mac_ocp_write(tp, 0xF8E4, 0xF00D);
2566
-        rtl8168_mac_ocp_write(tp, 0xF8E6, 0x1A03);
2567
-        rtl8168_mac_ocp_write(tp, 0xF8E8, 0xE00C);
2568
-        rtl8168_mac_ocp_write(tp, 0xF8EA, 0x1A07);
2569
-        rtl8168_mac_ocp_write(tp, 0xF8EC, 0xE00A);
2570
-        rtl8168_mac_ocp_write(tp, 0xF8EE, 0x1A00);
2571
-        rtl8168_mac_ocp_write(tp, 0xF8F0, 0xE008);
2572
-        rtl8168_mac_ocp_write(tp, 0xF8F2, 0x1A01);
2573
-        rtl8168_mac_ocp_write(tp, 0xF8F4, 0xE006);
2574
-        rtl8168_mac_ocp_write(tp, 0xF8F6, 0x1A02);
2575
-        rtl8168_mac_ocp_write(tp, 0xF8F8, 0xE004);
2576
-        rtl8168_mac_ocp_write(tp, 0xF8FA, 0x1A04);
2577
-        rtl8168_mac_ocp_write(tp, 0xF8FC, 0xE002);
2578
-        rtl8168_mac_ocp_write(tp, 0xF8FE, 0x1A05);
2579
-        rtl8168_mac_ocp_write(tp, 0xF900, 0xE829);
2580
-        rtl8168_mac_ocp_write(tp, 0xF902, 0xE833);
2581
-        rtl8168_mac_ocp_write(tp, 0xF904, 0xB006);
2582
-        rtl8168_mac_ocp_write(tp, 0xF906, 0xB005);
2583
-        rtl8168_mac_ocp_write(tp, 0xF908, 0xB004);
2584
-        rtl8168_mac_ocp_write(tp, 0xF90A, 0xB003);
2585
-        rtl8168_mac_ocp_write(tp, 0xF90C, 0xB002);
2586
-        rtl8168_mac_ocp_write(tp, 0xF90E, 0xB001);
2587
-        rtl8168_mac_ocp_write(tp, 0xF910, 0x60C4);
2588
-        rtl8168_mac_ocp_write(tp, 0xF912, 0xC702);
2589
-        rtl8168_mac_ocp_write(tp, 0xF914, 0xBF00);
2590
-        rtl8168_mac_ocp_write(tp, 0xF916, 0x2786);
2591
-        rtl8168_mac_ocp_write(tp, 0xF918, 0xDD00);
2592
-        rtl8168_mac_ocp_write(tp, 0xF91A, 0xD030);
2593
-        rtl8168_mac_ocp_write(tp, 0xF91C, 0xE0C4);
2594
-        rtl8168_mac_ocp_write(tp, 0xF91E, 0xE0F8);
2595
-        rtl8168_mac_ocp_write(tp, 0xF920, 0xDC42);
2596
-        rtl8168_mac_ocp_write(tp, 0xF922, 0xD3F0);
2597
-        rtl8168_mac_ocp_write(tp, 0xF924, 0x0000);
2598
-        rtl8168_mac_ocp_write(tp, 0xF926, 0x0004);
2599
-        rtl8168_mac_ocp_write(tp, 0xF928, 0x0007);
2600
-        rtl8168_mac_ocp_write(tp, 0xF92A, 0x0014);
2601
-        rtl8168_mac_ocp_write(tp, 0xF92C, 0x0090);
2602
-        rtl8168_mac_ocp_write(tp, 0xF92E, 0x1000);
2603
-        rtl8168_mac_ocp_write(tp, 0xF930, 0x0F00);
2604
-        rtl8168_mac_ocp_write(tp, 0xF932, 0x1004);
2605
-        rtl8168_mac_ocp_write(tp, 0xF934, 0x1008);
2606
-        rtl8168_mac_ocp_write(tp, 0xF936, 0x3000);
2607
-        rtl8168_mac_ocp_write(tp, 0xF938, 0x3004);
2608
-        rtl8168_mac_ocp_write(tp, 0xF93A, 0x3008);
2609
-        rtl8168_mac_ocp_write(tp, 0xF93C, 0x4000);
2610
-        rtl8168_mac_ocp_write(tp, 0xF93E, 0x7777);
2611
-        rtl8168_mac_ocp_write(tp, 0xF940, 0x8000);
2612
-        rtl8168_mac_ocp_write(tp, 0xF942, 0x8001);
2613
-        rtl8168_mac_ocp_write(tp, 0xF944, 0x8008);
2614
-        rtl8168_mac_ocp_write(tp, 0xF946, 0x8003);
2615
-        rtl8168_mac_ocp_write(tp, 0xF948, 0x8004);
2616
-        rtl8168_mac_ocp_write(tp, 0xF94A, 0xC000);
2617
-        rtl8168_mac_ocp_write(tp, 0xF94C, 0xC004);
2618
-        rtl8168_mac_ocp_write(tp, 0xF94E, 0xF004);
2619
-        rtl8168_mac_ocp_write(tp, 0xF950, 0xFFFF);
2620
-        rtl8168_mac_ocp_write(tp, 0xF952, 0xB406);
2621
-        rtl8168_mac_ocp_write(tp, 0xF954, 0xB407);
2622
-        rtl8168_mac_ocp_write(tp, 0xF956, 0xC6E5);
2623
-        rtl8168_mac_ocp_write(tp, 0xF958, 0x77C0);
2624
-        rtl8168_mac_ocp_write(tp, 0xF95A, 0x27F3);
2625
-        rtl8168_mac_ocp_write(tp, 0xF95C, 0x23F3);
2626
-        rtl8168_mac_ocp_write(tp, 0xF95E, 0x47FA);
2627
-        rtl8168_mac_ocp_write(tp, 0xF960, 0x9FC0);
2628
-        rtl8168_mac_ocp_write(tp, 0xF962, 0xB007);
2629
-        rtl8168_mac_ocp_write(tp, 0xF964, 0xB006);
2630
-        rtl8168_mac_ocp_write(tp, 0xF966, 0xFF80);
2631
-        rtl8168_mac_ocp_write(tp, 0xF968, 0xB405);
2632
-        rtl8168_mac_ocp_write(tp, 0xF96A, 0xB407);
2633
-        rtl8168_mac_ocp_write(tp, 0xF96C, 0xC7D8);
2634
-        rtl8168_mac_ocp_write(tp, 0xF96E, 0x75E0);
2635
-        rtl8168_mac_ocp_write(tp, 0xF970, 0x48D0);
2636
-        rtl8168_mac_ocp_write(tp, 0xF972, 0x9DE0);
2637
-        rtl8168_mac_ocp_write(tp, 0xF974, 0xB007);
2638
-        rtl8168_mac_ocp_write(tp, 0xF976, 0xB005);
2639
-        rtl8168_mac_ocp_write(tp, 0xF978, 0xFF80);
2640
-        rtl8168_mac_ocp_write(tp, 0xF97A, 0xB401);
2641
-        rtl8168_mac_ocp_write(tp, 0xF97C, 0xC0EA);
2642
-        rtl8168_mac_ocp_write(tp, 0xF97E, 0xC2DC);
2643
-        rtl8168_mac_ocp_write(tp, 0xF980, 0xC3D8);
2644
-        rtl8168_mac_ocp_write(tp, 0xF982, 0xE865);
2645
-        rtl8168_mac_ocp_write(tp, 0xF984, 0xC0D3);
2646
-        rtl8168_mac_ocp_write(tp, 0xF986, 0xC1E0);
2647
-        rtl8168_mac_ocp_write(tp, 0xF988, 0xC2E3);
2648
-        rtl8168_mac_ocp_write(tp, 0xF98A, 0xE861);
2649
-        rtl8168_mac_ocp_write(tp, 0xF98C, 0xE817);
2650
-        rtl8168_mac_ocp_write(tp, 0xF98E, 0xC0CD);
2651
-        rtl8168_mac_ocp_write(tp, 0xF990, 0xC2CF);
2652
-        rtl8168_mac_ocp_write(tp, 0xF992, 0xE85D);
2653
-        rtl8168_mac_ocp_write(tp, 0xF994, 0xC0C9);
2654
-        rtl8168_mac_ocp_write(tp, 0xF996, 0xC1D6);
2655
-        rtl8168_mac_ocp_write(tp, 0xF998, 0xC2DB);
2656
-        rtl8168_mac_ocp_write(tp, 0xF99A, 0xE859);
2657
-        rtl8168_mac_ocp_write(tp, 0xF99C, 0xE80F);
2658
-        rtl8168_mac_ocp_write(tp, 0xF99E, 0xC1C7);
2659
-        rtl8168_mac_ocp_write(tp, 0xF9A0, 0xC2CE);
2660
-        rtl8168_mac_ocp_write(tp, 0xF9A2, 0xE855);
2661
-        rtl8168_mac_ocp_write(tp, 0xF9A4, 0xC0C0);
2662
-        rtl8168_mac_ocp_write(tp, 0xF9A6, 0xC1D1);
2663
-        rtl8168_mac_ocp_write(tp, 0xF9A8, 0xC2D3);
2664
-        rtl8168_mac_ocp_write(tp, 0xF9AA, 0xE851);
2665
-        rtl8168_mac_ocp_write(tp, 0xF9AC, 0xE807);
2666
-        rtl8168_mac_ocp_write(tp, 0xF9AE, 0xC0BE);
2667
-        rtl8168_mac_ocp_write(tp, 0xF9B0, 0xC2C2);
2668
-        rtl8168_mac_ocp_write(tp, 0xF9B2, 0xE84D);
2669
-        rtl8168_mac_ocp_write(tp, 0xF9B4, 0xE803);
2670
-        rtl8168_mac_ocp_write(tp, 0xF9B6, 0xB001);
2671
-        rtl8168_mac_ocp_write(tp, 0xF9B8, 0xFF80);
2672
-        rtl8168_mac_ocp_write(tp, 0xF9BA, 0xB402);
2673
-        rtl8168_mac_ocp_write(tp, 0xF9BC, 0xC2C6);
2674
-        rtl8168_mac_ocp_write(tp, 0xF9BE, 0xE859);
2675
-        rtl8168_mac_ocp_write(tp, 0xF9C0, 0x499F);
2676
-        rtl8168_mac_ocp_write(tp, 0xF9C2, 0xF1FE);
2677
-        rtl8168_mac_ocp_write(tp, 0xF9C4, 0xB002);
2678
-        rtl8168_mac_ocp_write(tp, 0xF9C6, 0xFF80);
2679
-        rtl8168_mac_ocp_write(tp, 0xF9C8, 0xB402);
2680
-        rtl8168_mac_ocp_write(tp, 0xF9CA, 0xB403);
2681
-        rtl8168_mac_ocp_write(tp, 0xF9CC, 0xB407);
2682
-        rtl8168_mac_ocp_write(tp, 0xF9CE, 0xE821);
2683
-        rtl8168_mac_ocp_write(tp, 0xF9D0, 0x8882);
2684
-        rtl8168_mac_ocp_write(tp, 0xF9D2, 0x1980);
2685
-        rtl8168_mac_ocp_write(tp, 0xF9D4, 0x8983);
2686
-        rtl8168_mac_ocp_write(tp, 0xF9D6, 0xE81D);
2687
-        rtl8168_mac_ocp_write(tp, 0xF9D8, 0x7180);
2688
-        rtl8168_mac_ocp_write(tp, 0xF9DA, 0x218B);
2689
-        rtl8168_mac_ocp_write(tp, 0xF9DC, 0x25BB);
2690
-        rtl8168_mac_ocp_write(tp, 0xF9DE, 0x1310);
2691
-        rtl8168_mac_ocp_write(tp, 0xF9E0, 0xF014);
2692
-        rtl8168_mac_ocp_write(tp, 0xF9E2, 0x1310);
2693
-        rtl8168_mac_ocp_write(tp, 0xF9E4, 0xFB03);
2694
-        rtl8168_mac_ocp_write(tp, 0xF9E6, 0x1F20);
2695
-        rtl8168_mac_ocp_write(tp, 0xF9E8, 0x38FB);
2696
-        rtl8168_mac_ocp_write(tp, 0xF9EA, 0x3288);
2697
-        rtl8168_mac_ocp_write(tp, 0xF9EC, 0x434B);
2698
-        rtl8168_mac_ocp_write(tp, 0xF9EE, 0x2491);
2699
-        rtl8168_mac_ocp_write(tp, 0xF9F0, 0x430B);
2700
-        rtl8168_mac_ocp_write(tp, 0xF9F2, 0x1F0F);
2701
-        rtl8168_mac_ocp_write(tp, 0xF9F4, 0x38FB);
2702
-        rtl8168_mac_ocp_write(tp, 0xF9F6, 0x4313);
2703
-        rtl8168_mac_ocp_write(tp, 0xF9F8, 0x2121);
2704
-        rtl8168_mac_ocp_write(tp, 0xF9FA, 0x4353);
2705
-        rtl8168_mac_ocp_write(tp, 0xF9FC, 0x2521);
2706
-        rtl8168_mac_ocp_write(tp, 0xF9FE, 0x418A);
2707
-        rtl8168_mac_ocp_write(tp, 0xFA00, 0x6282);
2708
-        rtl8168_mac_ocp_write(tp, 0xFA02, 0x2527);
2709
-        rtl8168_mac_ocp_write(tp, 0xFA04, 0x212F);
2710
-        rtl8168_mac_ocp_write(tp, 0xFA06, 0x418A);
2711
-        rtl8168_mac_ocp_write(tp, 0xFA08, 0xB007);
2712
-        rtl8168_mac_ocp_write(tp, 0xFA0A, 0xB003);
2713
-        rtl8168_mac_ocp_write(tp, 0xFA0C, 0xB002);
2714
-        rtl8168_mac_ocp_write(tp, 0xFA0E, 0xFF80);
2715
-        rtl8168_mac_ocp_write(tp, 0xFA10, 0x6183);
2716
-        rtl8168_mac_ocp_write(tp, 0xFA12, 0x2496);
2717
-        rtl8168_mac_ocp_write(tp, 0xFA14, 0x1100);
2718
-        rtl8168_mac_ocp_write(tp, 0xFA16, 0xF1FD);
2719
-        rtl8168_mac_ocp_write(tp, 0xFA18, 0xFF80);
2720
-        rtl8168_mac_ocp_write(tp, 0xFA1A, 0x4800);
2721
-        rtl8168_mac_ocp_write(tp, 0xFA1C, 0x4801);
2722
-        rtl8168_mac_ocp_write(tp, 0xFA1E, 0xC213);
2723
-        rtl8168_mac_ocp_write(tp, 0xFA20, 0xC313);
2724
-        rtl8168_mac_ocp_write(tp, 0xFA22, 0xE815);
2725
-        rtl8168_mac_ocp_write(tp, 0xFA24, 0x4860);
2726
-        rtl8168_mac_ocp_write(tp, 0xFA26, 0x8EE0);
2727
-        rtl8168_mac_ocp_write(tp, 0xFA28, 0xC210);
2728
-        rtl8168_mac_ocp_write(tp, 0xFA2A, 0xC310);
2729
-        rtl8168_mac_ocp_write(tp, 0xFA2C, 0xE822);
2730
-        rtl8168_mac_ocp_write(tp, 0xFA2E, 0x481E);
2731
-        rtl8168_mac_ocp_write(tp, 0xFA30, 0xC20C);
2732
-        rtl8168_mac_ocp_write(tp, 0xFA32, 0xC30C);
2733
-        rtl8168_mac_ocp_write(tp, 0xFA34, 0xE80C);
2734
-        rtl8168_mac_ocp_write(tp, 0xFA36, 0xC206);
2735
-        rtl8168_mac_ocp_write(tp, 0xFA38, 0x7358);
2736
-        rtl8168_mac_ocp_write(tp, 0xFA3A, 0x483A);
2737
-        rtl8168_mac_ocp_write(tp, 0xFA3C, 0x9B58);
2738
-        rtl8168_mac_ocp_write(tp, 0xFA3E, 0xFF80);
2739
-        rtl8168_mac_ocp_write(tp, 0xFA40, 0xE8E0);
2740
-        rtl8168_mac_ocp_write(tp, 0xFA42, 0xE000);
2741
-        rtl8168_mac_ocp_write(tp, 0xFA44, 0x1008);
2742
-        rtl8168_mac_ocp_write(tp, 0xFA46, 0x0F00);
2743
-        rtl8168_mac_ocp_write(tp, 0xFA48, 0x800C);
2744
-        rtl8168_mac_ocp_write(tp, 0xFA4A, 0x0F00);
2745
-        rtl8168_mac_ocp_write(tp, 0xFA4C, 0xB407);
2746
-        rtl8168_mac_ocp_write(tp, 0xFA4E, 0xB406);
2747
-        rtl8168_mac_ocp_write(tp, 0xFA50, 0xB403);
2748
-        rtl8168_mac_ocp_write(tp, 0xFA52, 0xC7F7);
2749
-        rtl8168_mac_ocp_write(tp, 0xFA54, 0x98E0);
2750
-        rtl8168_mac_ocp_write(tp, 0xFA56, 0x99E2);
2751
-        rtl8168_mac_ocp_write(tp, 0xFA58, 0x9AE4);
2752
-        rtl8168_mac_ocp_write(tp, 0xFA5A, 0x21B2);
2753
-        rtl8168_mac_ocp_write(tp, 0xFA5C, 0x4831);
2754
-        rtl8168_mac_ocp_write(tp, 0xFA5E, 0x483F);
2755
-        rtl8168_mac_ocp_write(tp, 0xFA60, 0x9BE6);
2756
-        rtl8168_mac_ocp_write(tp, 0xFA62, 0x66E7);
2757
-        rtl8168_mac_ocp_write(tp, 0xFA64, 0x49E6);
2758
-        rtl8168_mac_ocp_write(tp, 0xFA66, 0xF1FE);
2759
-        rtl8168_mac_ocp_write(tp, 0xFA68, 0xB003);
2760
-        rtl8168_mac_ocp_write(tp, 0xFA6A, 0xB006);
2761
-        rtl8168_mac_ocp_write(tp, 0xFA6C, 0xB007);
2762
-        rtl8168_mac_ocp_write(tp, 0xFA6E, 0xFF80);
2763
-        rtl8168_mac_ocp_write(tp, 0xFA70, 0xB407);
2764
-        rtl8168_mac_ocp_write(tp, 0xFA72, 0xB406);
2765
-        rtl8168_mac_ocp_write(tp, 0xFA74, 0xB403);
2766
-        rtl8168_mac_ocp_write(tp, 0xFA76, 0xC7E5);
2767
-        rtl8168_mac_ocp_write(tp, 0xFA78, 0x9AE4);
2768
-        rtl8168_mac_ocp_write(tp, 0xFA7A, 0x21B2);
2769
-        rtl8168_mac_ocp_write(tp, 0xFA7C, 0x4831);
2770
-        rtl8168_mac_ocp_write(tp, 0xFA7E, 0x9BE6);
2771
-        rtl8168_mac_ocp_write(tp, 0xFA80, 0x66E7);
2772
-        rtl8168_mac_ocp_write(tp, 0xFA82, 0x49E6);
2773
-        rtl8168_mac_ocp_write(tp, 0xFA84, 0xF1FE);
2774
-        rtl8168_mac_ocp_write(tp, 0xFA86, 0x70E0);
2775
-        rtl8168_mac_ocp_write(tp, 0xFA88, 0x71E2);
2776
-        rtl8168_mac_ocp_write(tp, 0xFA8A, 0xB003);
2777
-        rtl8168_mac_ocp_write(tp, 0xFA8C, 0xB006);
2778
-        rtl8168_mac_ocp_write(tp, 0xFA8E, 0xB007);
2779
-        rtl8168_mac_ocp_write(tp, 0xFA90, 0xFF80);
2780
-        rtl8168_mac_ocp_write(tp, 0xFA92, 0x4882);
2781
-        rtl8168_mac_ocp_write(tp, 0xFA94, 0xB406);
2782
-        rtl8168_mac_ocp_write(tp, 0xFA96, 0xB405);
2783
-        rtl8168_mac_ocp_write(tp, 0xFA98, 0xC71E);
2784
-        rtl8168_mac_ocp_write(tp, 0xFA9A, 0x76E0);
2785
-        rtl8168_mac_ocp_write(tp, 0xFA9C, 0x1D78);
2786
-        rtl8168_mac_ocp_write(tp, 0xFA9E, 0x4175);
2787
-        rtl8168_mac_ocp_write(tp, 0xFAA0, 0x1630);
2788
-        rtl8168_mac_ocp_write(tp, 0xFAA2, 0xF10C);
2789
-        rtl8168_mac_ocp_write(tp, 0xFAA4, 0xC715);
2790
-        rtl8168_mac_ocp_write(tp, 0xFAA6, 0x76E0);
2791
-        rtl8168_mac_ocp_write(tp, 0xFAA8, 0x4861);
2792
-        rtl8168_mac_ocp_write(tp, 0xFAAA, 0x9EE0);
2793
-        rtl8168_mac_ocp_write(tp, 0xFAAC, 0xC713);
2794
-        rtl8168_mac_ocp_write(tp, 0xFAAE, 0x1EFF);
2795
-        rtl8168_mac_ocp_write(tp, 0xFAB0, 0x9EE2);
2796
-        rtl8168_mac_ocp_write(tp, 0xFAB2, 0x75E0);
2797
-        rtl8168_mac_ocp_write(tp, 0xFAB4, 0x4850);
2798
-        rtl8168_mac_ocp_write(tp, 0xFAB6, 0x9DE0);
2799
-        rtl8168_mac_ocp_write(tp, 0xFAB8, 0xE005);
2800
-        rtl8168_mac_ocp_write(tp, 0xFABA, 0xC70B);
2801
-        rtl8168_mac_ocp_write(tp, 0xFABC, 0x76E0);
2802
-        rtl8168_mac_ocp_write(tp, 0xFABE, 0x4865);
2803
-        rtl8168_mac_ocp_write(tp, 0xFAC0, 0x9EE0);
2804
-        rtl8168_mac_ocp_write(tp, 0xFAC2, 0xB005);
2805
-        rtl8168_mac_ocp_write(tp, 0xFAC4, 0xB006);
2806
-        rtl8168_mac_ocp_write(tp, 0xFAC6, 0xC708);
2807
-        rtl8168_mac_ocp_write(tp, 0xFAC8, 0xC102);
2808
-        rtl8168_mac_ocp_write(tp, 0xFACA, 0xB900);
2809
-        rtl8168_mac_ocp_write(tp, 0xFACC, 0x279E);
2810
-        rtl8168_mac_ocp_write(tp, 0xFACE, 0xEB16);
2811
-        rtl8168_mac_ocp_write(tp, 0xFAD0, 0xEB00);
2812
-        rtl8168_mac_ocp_write(tp, 0xFAD2, 0xE43C);
2813
-        rtl8168_mac_ocp_write(tp, 0xFAD4, 0xDC00);
2814
-        rtl8168_mac_ocp_write(tp, 0xFAD6, 0xD3EC);
2815
-        rtl8168_mac_ocp_write(tp, 0xFAD8, 0xC602);
2816
-        rtl8168_mac_ocp_write(tp, 0xFADA, 0xBE00);
2817
-        rtl8168_mac_ocp_write(tp, 0xFADC, 0x0000);
2818
-        rtl8168_mac_ocp_write(tp, 0xFADE, 0xC602);
2819
-        rtl8168_mac_ocp_write(tp, 0xFAE0, 0xBE00);
2820
-        rtl8168_mac_ocp_write(tp, 0xFAE2, 0x0000);
2821
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_2); i++) {
2822
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_2[i]);
2823
+        }
2824
 
2825
         rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
2826
 
2827
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
2828
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x04B4);
2829
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
2830
-        rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0000);
2831
-        rtl8168_mac_ocp_write(tp, 0xFC30, 0x0000);
2832
-        rtl8168_mac_ocp_write(tp, 0xFC32, 0x279C);
2833
-        rtl8168_mac_ocp_write(tp, 0xFC34, 0x0000);
2834
-        rtl8168_mac_ocp_write(tp, 0xFC36, 0x0000);
2835
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC);
2836
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
2837
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
2838
+        rtl8168_mac_ocp_write(tp, 0xFC2E, 0x2A5C);
2839
+        rtl8168_mac_ocp_write(tp, 0xFC30, 0x07B0);
2840
+
2841
+        if (tp->HwSuppSerDesPhyVer == 1)
2842
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x001F);
2843
+        else
2844
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x001E);
2845
 
2846
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0022);
2847
 }
2848
 
2849
 static void
2850
 rtl8168_set_mac_mcu_8168fp_3(struct net_device *dev)
2851
 {
2852
         struct rtl8168_private *tp = netdev_priv(dev);
2853
+        u16 i;
2854
+        static const u16 mcu_patch_code_8168fp_3[] = {
2855
+                0xE008, 0xE053, 0xE057, 0xE059, 0xE05B, 0xE05D, 0xE05F, 0xE061, 0xB400,
2856
+                0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE,
2857
+                0xC137, 0x9904, 0xC136, 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0,
2858
+                0xF10B, 0xC52F, 0xC12E, 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330,
2859
+                0xE80E, 0xE018, 0xC126, 0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326,
2860
+                0xE805, 0xC521, 0xC324, 0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908,
2861
+                0x9D0A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004,
2862
+                0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002, 0xB800, 0x2B16, 0xE000,
2863
+                0xE8E0, 0xF128, 0x3DC2, 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000,
2864
+                0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x07BC, 0xC602,
2865
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
2866
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
2867
+        };
2868
 
2869
         rtl8168_hw_disable_mac_mcu_bps(dev);
2870
 
2871
-        rtl8168_mac_ocp_write(tp, 0xF800, 0xE008);
2872
-        rtl8168_mac_ocp_write(tp, 0xF802, 0xE00A);
2873
-        rtl8168_mac_ocp_write(tp, 0xF804, 0xE00F);
2874
-        rtl8168_mac_ocp_write(tp, 0xF806, 0xE014);
2875
-        rtl8168_mac_ocp_write(tp, 0xF808, 0xE016);
2876
-        rtl8168_mac_ocp_write(tp, 0xF80A, 0xE018);
2877
-        rtl8168_mac_ocp_write(tp, 0xF80C, 0xE01A);
2878
-        rtl8168_mac_ocp_write(tp, 0xF80E, 0xE01C);
2879
-        rtl8168_mac_ocp_write(tp, 0xF810, 0xC602);
2880
-        rtl8168_mac_ocp_write(tp, 0xF812, 0xBE00);
2881
-        rtl8168_mac_ocp_write(tp, 0xF814, 0x2AB2);
2882
-        rtl8168_mac_ocp_write(tp, 0xF816, 0x1BC0);
2883
-        rtl8168_mac_ocp_write(tp, 0xF818, 0x46EB);
2884
-        rtl8168_mac_ocp_write(tp, 0xF81A, 0x1BFE);
2885
-        rtl8168_mac_ocp_write(tp, 0xF81C, 0xC102);
2886
-        rtl8168_mac_ocp_write(tp, 0xF81E, 0xB900);
2887
-        rtl8168_mac_ocp_write(tp, 0xF820, 0x0B1A);
2888
-        rtl8168_mac_ocp_write(tp, 0xF822, 0x1BC0);
2889
-        rtl8168_mac_ocp_write(tp, 0xF824, 0x46EB);
2890
-        rtl8168_mac_ocp_write(tp, 0xF826, 0x1B7E);
2891
-        rtl8168_mac_ocp_write(tp, 0xF828, 0xC102);
2892
-        rtl8168_mac_ocp_write(tp, 0xF82A, 0xB900);
2893
-        rtl8168_mac_ocp_write(tp, 0xF82C, 0x0BEA);
2894
-        rtl8168_mac_ocp_write(tp, 0xF82E, 0xC602);
2895
-        rtl8168_mac_ocp_write(tp, 0xF830, 0xBE00);
2896
-        rtl8168_mac_ocp_write(tp, 0xF832, 0x0000);
2897
-        rtl8168_mac_ocp_write(tp, 0xF834, 0xC602);
2898
-        rtl8168_mac_ocp_write(tp, 0xF836, 0xBE00);
2899
-        rtl8168_mac_ocp_write(tp, 0xF838, 0x0000);
2900
-        rtl8168_mac_ocp_write(tp, 0xF83A, 0xC602);
2901
-        rtl8168_mac_ocp_write(tp, 0xF83C, 0xBE00);
2902
-        rtl8168_mac_ocp_write(tp, 0xF83E, 0x0000);
2903
-        rtl8168_mac_ocp_write(tp, 0xF840, 0xC602);
2904
-        rtl8168_mac_ocp_write(tp, 0xF842, 0xBE00);
2905
-        rtl8168_mac_ocp_write(tp, 0xF844, 0x0000);
2906
-        rtl8168_mac_ocp_write(tp, 0xF846, 0xC602);
2907
-        rtl8168_mac_ocp_write(tp, 0xF848, 0xBE00);
2908
-        rtl8168_mac_ocp_write(tp, 0xF84A, 0x0000);
2909
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_3); i++) {
2910
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_3[i]);
2911
+        }
2912
 
2913
         rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
2914
 
2915
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC);
2916
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
2917
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
2918
-
2919
-        if (tp->HwSuppSerDesPhyVer == 1) {
2920
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0007);
2921
-        } else {
2922
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0006);
2923
-        }
2924
-}
2925
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2B14);
2926
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x07B0);
2927
 
2928
-static void
2929
-rtl8168_set_mac_mcu_8168fp_4(struct net_device *dev)
2930
-{
2931
-        rtl8168_hw_disable_mac_mcu_bps(dev);
2932
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0003);
2933
 }
2934
 
2935
 static void
2936
@@ -9346,19 +8785,48 @@
2937
                 rtl8168_set_mac_mcu_8168h_1(dev);
2938
                 break;
2939
         case CFG_METHOD_31:
2940
-                if (tp->HwPkgDet == 0x00 || tp->HwPkgDet == 0x0F)
2941
-                        rtl8168_set_mac_mcu_8168fp_1(dev);
2942
-                else if (tp->HwPkgDet == 0x06)
2943
-                        rtl8168_set_mac_mcu_8168fp_2(dev);
2944
+                rtl8168_set_mac_mcu_8168fp_1(dev);
2945
                 break;
2946
         case CFG_METHOD_32:
2947
-                rtl8168_set_mac_mcu_8168fp_3(dev);
2948
+                rtl8168_set_mac_mcu_8168fp_2(dev);
2949
                 break;
2950
         case CFG_METHOD_33:
2951
-                rtl8168_set_mac_mcu_8168fp_4(dev);
2952
+                rtl8168_set_mac_mcu_8168fp_3(dev);
2953
                 break;
2954
         }
2955
 }
2956
+#endif
2957
+
2958
+#ifdef ENABLE_USE_FIRMWARE_FILE
2959
+static void rtl8168_release_firmware(struct rtl8168_private *tp)
2960
+{
2961
+        if (tp->rtl_fw) {
2962
+                rtl8168_fw_release_firmware(tp->rtl_fw);
2963
+                kfree(tp->rtl_fw);
2964
+                tp->rtl_fw = NULL;
2965
+        }
2966
+}
2967
+
2968
+void rtl8168_apply_firmware(struct rtl8168_private *tp)
2969
+{
2970
+        /* TODO: release firmware if rtl_fw_write_firmware signals failure. */
2971
+        if (tp->rtl_fw) {
2972
+                rtl8168_fw_write_firmware(tp, tp->rtl_fw);
2973
+                /* At least one firmware doesn't reset tp->ocp_base. */
2974
+                tp->ocp_base = OCP_STD_PHY_BASE;
2975
+
2976
+                /* PHY soft reset may still be in progress */
2977
+                //phy_read_poll_timeout(tp->phydev, MII_BMCR, val,
2978
+                //           !(val & BMCR_RESET),
2979
+                //           50000, 600000, true);
2980
+                rtl8168_wait_phy_reset_complete(tp);
2981
+
2982
+                tp->hw_ram_code_ver = rtl8168_get_hw_phy_mcu_code_ver(tp);
2983
+                tp->sw_ram_code_ver = tp->hw_ram_code_ver;
2984
+                tp->HwHasWrRamCodeToMicroP = TRUE;
2985
+        }
2986
+}
2987
+#endif
2988
 
2989
 static void
2990
 rtl8168_hw_init(struct net_device *dev)
2991
@@ -9366,45 +8834,16 @@
2992
         struct rtl8168_private *tp = netdev_priv(dev);
2993
         u32 csi_tmp;
2994
 
2995
-        switch (tp->mcfg) {
2996
-        case CFG_METHOD_14:
2997
-        case CFG_METHOD_15:
2998
-        case CFG_METHOD_16:
2999
-        case CFG_METHOD_17:
3000
-        case CFG_METHOD_18:
3001
-        case CFG_METHOD_19:
3002
-        case CFG_METHOD_20:
3003
-        case CFG_METHOD_21:
3004
-        case CFG_METHOD_22:
3005
-        case CFG_METHOD_23:
3006
-        case CFG_METHOD_24:
3007
-        case CFG_METHOD_25:
3008
-        case CFG_METHOD_26:
3009
-        case CFG_METHOD_27:
3010
-        case CFG_METHOD_28:
3011
-        case CFG_METHOD_29:
3012
-        case CFG_METHOD_30:
3013
-        case CFG_METHOD_31:
3014
-        case CFG_METHOD_32:
3015
-        case CFG_METHOD_33:
3016
+        if (tp->HwSuppAspmClkIntrLock) {
3017
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
3018
                 rtl8168_enable_cfg9346_write(tp);
3019
-                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
3020
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
3021
+                rtl8168_hw_aspm_clkreq_enable(tp, false);
3022
                 rtl8168_disable_cfg9346_write(tp);
3023
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
3024
-                break;
3025
         }
3026
 
3027
         //Disable UPS
3028
-        switch (tp->mcfg) {
3029
-        case CFG_METHOD_29:
3030
-        case CFG_METHOD_30:
3031
-        case CFG_METHOD_31:
3032
-        case CFG_METHOD_32:
3033
-        case CFG_METHOD_33:
3034
+        if (HW_SUPPORT_UPS_MODE(tp))
3035
                 rtl8168_mac_ocp_write(tp, 0xD400, rtl8168_mac_ocp_read( tp, 0xD400) & ~(BIT_0));
3036
-                break;
3037
-        }
3038
 
3039
         //Disable DMA Aggregation
3040
         switch (tp->mcfg) {
3041
@@ -9466,7 +8905,10 @@
3042
         if (tp->mcfg == CFG_METHOD_10 || tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15)
3043
                 RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) | BIT_2);
3044
 
3045
-        rtl8168_hw_mac_mcu_config(dev);
3046
+#ifndef ENABLE_USE_FIRMWARE_FILE
3047
+        if (!tp->rtl_fw)
3048
+                rtl8168_hw_mac_mcu_config(dev);
3049
+#endif
3050
 
3051
         /*disable ocp phy power saving*/
3052
         if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
3053
@@ -9493,8 +8935,17 @@
3054
                 break;
3055
         }
3056
 
3057
+        rtl8168_set_pci_pme(tp, 0);
3058
+
3059
         if (s0_magic_packet == 1)
3060
                 rtl8168_enable_magic_packet(dev);
3061
+
3062
+#ifdef ENABLE_USE_FIRMWARE_FILE
3063
+        if (tp->rtl_fw &&
3064
+            !(HW_DASH_SUPPORT_TYPE_3(tp) &&
3065
+              tp->HwPkgDet == 0x06))
3066
+                rtl8168_apply_firmware(tp);
3067
+#endif
3068
 }
3069
 
3070
 static void
3071
@@ -9802,12 +9253,17 @@
3072
 
3073
                 break;
3074
         case CFG_METHOD_28:
3075
-                rtl8168_ephy_write(tp, 0x00, 0x10A3);
3076
-                rtl8168_ephy_write(tp, 0x19, 0x7C00);
3077
+                rtl8168_ephy_write(tp, 0x00, 0x10AB);
3078
+                rtl8168_ephy_write(tp, 0x19, 0xFC00);
3079
                 rtl8168_ephy_write(tp, 0x1E, 0x20EB);
3080
                 rtl8168_ephy_write(tp, 0x0D, 0x1666);
3081
                 ClearPCIePhyBit(tp, 0x0B, BIT_0);
3082
                 SetPCIePhyBit(tp, 0x1D, BIT_14);
3083
+                ClearAndSetPCIePhyBit(tp,
3084
+                                      0x0C,
3085
+                                      BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5,
3086
+                                      BIT_9 | BIT_4
3087
+                                     );
3088
 
3089
                 break;
3090
         case CFG_METHOD_29:
3091
@@ -9862,14 +9318,11 @@
3092
                 WaitCnt = 0;
3093
                 do {
3094
                         PhyRegValue = rtl8168_mdio_read(tp, 0x10);
3095
-                        PhyRegValue &= 0x0040;
3096
                         udelay(100);
3097
                         WaitCnt++;
3098
-                } while(PhyRegValue != 0x0040 && WaitCnt <1000);
3099
+                }  while (!(PhyRegValue & BIT_6) && (WaitCnt < 1000));
3100
 
3101
-                if (WaitCnt == 1000) {
3102
-                        retval = FALSE;
3103
-                }
3104
+                if (!(PhyRegValue & BIT_6) && (WaitCnt == 1000)) retval = FALSE;
3105
 
3106
                 rtl8168_mdio_write(tp,0x1f, 0x0000);
3107
                 break;
3108
@@ -9890,18 +9343,15 @@
3109
                 rtl8168_mdio_write(tp, 0x1f, 0x0B82);
3110
                 rtl8168_clear_eth_phy_bit(tp, 0x10, BIT_4);
3111
 
3112
-                rtl8168_mdio_write(tp,0x1f, 0x0A22);
3113
+                rtl8168_mdio_write(tp,0x1f, 0x0B80);
3114
                 WaitCnt = 0;
3115
                 do {
3116
-                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
3117
-                        PhyRegValue &= 0x0010;
3118
+                        PhyRegValue = rtl8168_mdio_read(tp, 0x10);
3119
                         udelay(100);
3120
                         WaitCnt++;
3121
-                } while(PhyRegValue != 0x0010 && WaitCnt <1000);
3122
+                } while ((PhyRegValue & BIT_6) && (WaitCnt < 1000));
3123
 
3124
-                if (WaitCnt == 1000) {
3125
-                        retval = FALSE;
3126
-                }
3127
+                if ((PhyRegValue & BIT_6) && (WaitCnt == 1000)) retval = FALSE;
3128
 
3129
                 rtl8168_mdio_write(tp,0x1f, 0x0000);
3130
                 break;
3131
@@ -9910,18 +9360,17 @@
3132
         return retval;
3133
 }
3134
 
3135
-static int
3136
-rtl8168_check_hw_phy_mcu_code_ver(struct net_device *dev)
3137
+static u16
3138
+rtl8168_get_hw_phy_mcu_code_ver(struct rtl8168_private *tp)
3139
 {
3140
-        struct rtl8168_private *tp = netdev_priv(dev);
3141
-        int ram_code_ver_match = 0;
3142
+        u16 hw_ram_code_ver = ~0;
3143
 
3144
         switch (tp->mcfg) {
3145
         case CFG_METHOD_14:
3146
         case CFG_METHOD_15:
3147
                 rtl8168_mdio_write(tp, 0x1F, 0x0005);
3148
                 rtl8168_mdio_write(tp, 0x05, 0x8B60);
3149
-                tp->hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06);
3150
+                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06);
3151
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
3152
                 break;
3153
         case CFG_METHOD_16:
3154
@@ -9931,7 +9380,7 @@
3155
         case CFG_METHOD_20:
3156
                 rtl8168_mdio_write(tp, 0x1F, 0x0005);
3157
                 rtl8168_mdio_write(tp, 0x05, 0x8B30);
3158
-                tp->hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06);
3159
+                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06);
3160
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
3161
                 break;
3162
         case CFG_METHOD_21:
3163
@@ -9949,7 +9398,7 @@
3164
         case CFG_METHOD_33:
3165
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
3166
                 rtl8168_mdio_write(tp, 0x13, 0x801E);
3167
-                tp->hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14);
3168
+                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14);
3169
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
3170
                 break;
3171
         default:
3172
@@ -9957,6 +9406,56 @@
3173
                 break;
3174
         }
3175
 
3176
+        return hw_ram_code_ver;
3177
+}
3178
+
3179
+#ifndef ENABLE_USE_FIRMWARE_FILE
3180
+static void
3181
+rtl8168_enable_phy_disable_mode(struct net_device *dev)
3182
+{
3183
+        struct rtl8168_private *tp = netdev_priv(dev);
3184
+
3185
+        switch (tp->HwSuppCheckPhyDisableModeVer) {
3186
+        case 1:
3187
+                rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) | BIT_1);
3188
+                break;
3189
+        case 2:
3190
+        case 3:
3191
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5);
3192
+                break;
3193
+        }
3194
+
3195
+        dprintk("enable phy disable mode.\n");
3196
+}
3197
+
3198
+static void
3199
+rtl8168_disable_phy_disable_mode(struct net_device *dev)
3200
+{
3201
+        struct rtl8168_private *tp = netdev_priv(dev);
3202
+
3203
+        switch (tp->HwSuppCheckPhyDisableModeVer) {
3204
+        case 1:
3205
+                rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) & ~BIT_1);
3206
+                break;
3207
+        case 2:
3208
+        case 3:
3209
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5);
3210
+                break;
3211
+        }
3212
+
3213
+        mdelay(1);
3214
+
3215
+        dprintk("disable phy disable mode.\n");
3216
+}
3217
+
3218
+static int
3219
+rtl8168_check_hw_phy_mcu_code_ver(struct net_device *dev)
3220
+{
3221
+        struct rtl8168_private *tp = netdev_priv(dev);
3222
+        int ram_code_ver_match = 0;
3223
+
3224
+        tp->hw_ram_code_ver = rtl8168_get_hw_phy_mcu_code_ver(tp);
3225
+
3226
         if ( tp->hw_ram_code_ver == tp->sw_ram_code_ver) {
3227
                 ram_code_ver_match = 1;
3228
                 tp->HwHasWrRamCodeToMicroP = TRUE;
3229
@@ -21327,6 +20826,7 @@
3230
 
3231
         tp->HwHasWrRamCodeToMicroP = TRUE;
3232
 }
3233
+#endif
3234
 
3235
 static void
3236
 rtl8168_hw_phy_config(struct net_device *dev)
3237
@@ -21340,7 +20840,11 @@
3238
 
3239
         if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06) return;
3240
 
3241
-        rtl8168_init_hw_phy_mcu(dev);
3242
+#ifndef ENABLE_USE_FIRMWARE_FILE
3243
+        if (!tp->rtl_fw) {
3244
+                rtl8168_init_hw_phy_mcu(dev);
3245
+        }
3246
+#endif
3247
 
3248
         if (tp->mcfg == CFG_METHOD_1) {
3249
                 rtl8168_mdio_write(tp, 0x1F, 0x0001);
3250
@@ -24056,6 +23560,16 @@
3251
         }
3252
 
3253
         switch (tp->mcfg) {
3254
+        case CFG_METHOD_29:
3255
+        case CFG_METHOD_30:
3256
+        case CFG_METHOD_31:
3257
+        case CFG_METHOD_32:
3258
+        case CFG_METHOD_33:
3259
+                tp->HwSuppUpsVer = 1;
3260
+                break;
3261
+        }
3262
+
3263
+        switch (tp->mcfg) {
3264
         case CFG_METHOD_31:
3265
         case CFG_METHOD_32:
3266
         case CFG_METHOD_33:
3267
@@ -24069,6 +23583,34 @@
3268
                 break;
3269
         }
3270
 
3271
+        switch (tp->mcfg) {
3272
+        case CFG_METHOD_14:
3273
+        case CFG_METHOD_15:
3274
+        case CFG_METHOD_16:
3275
+        case CFG_METHOD_17:
3276
+        case CFG_METHOD_18:
3277
+        case CFG_METHOD_19:
3278
+        case CFG_METHOD_20:
3279
+        case CFG_METHOD_21:
3280
+        case CFG_METHOD_22:
3281
+        case CFG_METHOD_23:
3282
+        case CFG_METHOD_24:
3283
+        case CFG_METHOD_25:
3284
+        case CFG_METHOD_26:
3285
+        case CFG_METHOD_27:
3286
+        case CFG_METHOD_28:
3287
+        case CFG_METHOD_29:
3288
+        case CFG_METHOD_30:
3289
+        case CFG_METHOD_31:
3290
+        case CFG_METHOD_32:
3291
+        case CFG_METHOD_33:
3292
+                tp->HwSuppAspmClkIntrLock = 1;
3293
+                break;
3294
+        }
3295
+
3296
+        if (!aspm || !tp->HwSuppAspmClkIntrLock)
3297
+                dynamic_aspm = 0;
3298
+
3299
 #ifdef ENABLE_REALWOW_SUPPORT
3300
         rtl8168_get_realwow_hw_version(dev);
3301
 #endif //ENABLE_REALWOW_SUPPORT
3302
@@ -24102,6 +23644,8 @@
3303
                                 tp->mapped_cmac_ioaddr = cmac_ioaddr;
3304
                         }
3305
                 }
3306
+
3307
+                eee_enable = 0;
3308
         }
3309
 
3310
 #ifdef ENABLE_DASH_SUPPORT
3311
@@ -24183,6 +23727,19 @@
3312
                         tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x214);
3313
                         break;
3314
                 }
3315
+
3316
+                switch (tp->mcfg) {
3317
+                case CFG_METHOD_21:
3318
+                case CFG_METHOD_22:
3319
+                case CFG_METHOD_23:
3320
+                case CFG_METHOD_24:
3321
+                case CFG_METHOD_25:
3322
+                case CFG_METHOD_27:
3323
+                case CFG_METHOD_28:
3324
+                        if (tp->org_pci_offset_99 & BIT_2)
3325
+                                tp->issue_offset_99_event = TRUE;
3326
+                        break;
3327
+                }
3328
         }
3329
 
3330
         pci_read_config_byte(pdev, 0x80, &tp->org_pci_offset_80);
3331
@@ -24348,6 +23905,26 @@
3332
         }
3333
 
3334
         switch (tp->mcfg) {
3335
+        case CFG_METHOD_29:
3336
+        case CFG_METHOD_30:
3337
+                tp->HwSuppEsdVer = 2;
3338
+                break;
3339
+        default:
3340
+                tp->HwSuppEsdVer = 1;
3341
+                break;
3342
+        }
3343
+
3344
+        if (tp->HwSuppEsdVer == 2) {
3345
+                rtl8168_mdio_write(tp, 0x1F, 0x0A46);
3346
+                tp->BackupPhyFuseDout_15_0 = rtl8168_mdio_read(tp, 0x10);
3347
+                tp->BackupPhyFuseDout_47_32 = rtl8168_mdio_read(tp, 0x12);
3348
+                tp->BackupPhyFuseDout_63_48 = rtl8168_mdio_read(tp, 0x13);
3349
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
3350
+
3351
+                tp->TestPhyOcpReg = TRUE;
3352
+        }
3353
+
3354
+        switch (tp->mcfg) {
3355
         case CFG_METHOD_16:
3356
         case CFG_METHOD_17:
3357
                 tp->HwSuppCheckPhyDisableModeVer = 1;
3358
@@ -24374,24 +23951,6 @@
3359
         }
3360
 
3361
         switch (tp->mcfg) {
3362
-        case CFG_METHOD_21:
3363
-        case CFG_METHOD_22:
3364
-        case CFG_METHOD_23:
3365
-        case CFG_METHOD_24:
3366
-        case CFG_METHOD_25:
3367
-        case CFG_METHOD_26:
3368
-        case CFG_METHOD_27:
3369
-        case CFG_METHOD_28:
3370
-        case CFG_METHOD_29:
3371
-        case CFG_METHOD_30:
3372
-        case CFG_METHOD_31:
3373
-        case CFG_METHOD_32:
3374
-        case CFG_METHOD_33:
3375
-                tp->HwSuppGigaForceMode = TRUE;
3376
-                break;
3377
-        }
3378
-
3379
-        switch (tp->mcfg) {
3380
         case CFG_METHOD_14:
3381
         case CFG_METHOD_15:
3382
                 tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_14;
3383
@@ -24455,7 +24014,7 @@
3384
         tp->max_jumbo_frame_size = rtl_chip_info[tp->chipset].jumbo_frame_sz;
3385
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
3386
         /* MTU range: 60 - hw-specific max */
3387
-        dev->min_mtu = ETH_ZLEN;
3388
+        dev->min_mtu = ETH_MIN_MTU;
3389
         dev->max_mtu = tp->max_jumbo_frame_size;
3390
 #endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
3391
         tp->eee_enabled = eee_enable;
3392
@@ -24491,6 +24050,7 @@
3393
 
3394
         iounmap(ioaddr);
3395
         pci_release_regions(pdev);
3396
+        pci_clear_mwi(pdev);
3397
         pci_disable_device(pdev);
3398
         free_netdev(dev);
3399
 }
3400
@@ -25432,15 +24992,8 @@
3401
         }
3402
 
3403
         //wait ups resume (phy state 3)
3404
-        switch (tp->mcfg) {
3405
-        case CFG_METHOD_29:
3406
-        case CFG_METHOD_30:
3407
-        case CFG_METHOD_31:
3408
-        case CFG_METHOD_32:
3409
-        case CFG_METHOD_33:
3410
-                rtl8168_wait_phy_ups_resume(dev, 3);
3411
-                break;
3412
-        };
3413
+        if (HW_SUPPORT_UPS_MODE(tp))
3414
+                rtl8168_wait_phy_ups_resume(dev, HW_PHY_STATUS_LAN_ON);
3415
 }
3416
 
3417
 static void
3418
@@ -25526,11 +25079,12 @@
3419
         tp->dev = dev;
3420
         tp->msg_enable = netif_msg_init(debug.msg_enable, R8168_MSG_DEFAULT);
3421
 
3422
+        if (!aspm || tp->mcfg == CFG_METHOD_9) {
3423
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
3424
-        if (!aspm || tp->mcfg == CFG_METHOD_9)
3425
                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3426
                                        PCIE_LINK_STATE_CLKPM);
3427
 #endif
3428
+        }
3429
 
3430
         /* enable device (incl. PCI PM wakeup and hotplug setup) */
3431
         rc = pci_enable_device(pdev);
3432
@@ -25542,9 +25096,12 @@
3433
                 goto err_out_free_dev;
3434
         }
3435
 
3436
-        rc = pci_set_mwi(pdev);
3437
-        if (rc < 0)
3438
-                goto err_out_disable;
3439
+        if (pci_set_mwi(pdev) < 0) {
3440
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
3441
+                if (netif_msg_drv(&debug))
3442
+                        dev_info(&pdev->dev, "Mem-Wr-Inval unavailable.\n");
3443
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
3444
+        }
3445
 
3446
         /* save power state before pci_enable_device overwrites it */
3447
         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
3448
@@ -25607,8 +25164,6 @@
3449
                 }
3450
         }
3451
 
3452
-        pci_set_master(pdev);
3453
-
3454
         /* ioremap MMIO region */
3455
         ioaddr = ioremap(pci_resource_start(pdev, 2), R8168_REGS_SIZE);
3456
         if (ioaddr == NULL) {
3457
@@ -25652,13 +25207,9 @@
3458
 
3459
 err_out_free_res:
3460
         pci_release_regions(pdev);
3461
-
3462
 err_out_mwi:
3463
         pci_clear_mwi(pdev);
3464
-
3465
-err_out_disable:
3466
         pci_disable_device(pdev);
3467
-
3468
 err_out_free_dev:
3469
         free_netdev(dev);
3470
 err_out:
3471
@@ -25813,6 +25364,9 @@
3472
                 }
3473
         }
3474
 
3475
+        if (tp->TestPhyOcpReg && rtl8168_test_phy_ocp(tp))
3476
+                tp->esd_flag |= BIT_15;
3477
+
3478
         if (tp->esd_flag != 0) {
3479
                 printk(KERN_ERR "%s: esd_flag = 0x%04x\n.\n", dev->name, tp->esd_flag);
3480
                 netif_stop_queue(dev);
3481
@@ -25985,19 +25539,24 @@
3482
         }
3483
 #endif
3484
 
3485
+        /* There has been a number of reports that using SG/TSO results in
3486
+         * tx timeouts. However for a lot of people SG/TSO works fine.
3487
+         * Therefore disable both features by default, but allow users to
3488
+         * enable them. Use at own risk!
3489
+         */
3490
         tp->cp_cmd |= RTL_R16(tp, CPlusCmd);
3491
         if (tp->mcfg != CFG_METHOD_DEFAULT) {
3492
                 dev->features |= NETIF_F_IP_CSUM;
3493
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
3494
                 tp->cp_cmd |= RxChkSum;
3495
 #else
3496
-                dev->features |= NETIF_F_RXCSUM | NETIF_F_SG;
3497
+                dev->features |= NETIF_F_RXCSUM;
3498
                 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
3499
                                    NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
3500
                 dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |
3501
                                      NETIF_F_HIGHDMA;
3502
                 if ((tp->mcfg != CFG_METHOD_16) && (tp->mcfg != CFG_METHOD_17)) {
3503
-                        dev->features |= NETIF_F_TSO;
3504
+                        //dev->features |= NETIF_F_TSO;
3505
                         dev->hw_features |= NETIF_F_TSO;
3506
                         dev->vlan_features |= NETIF_F_TSO;
3507
                 }
3508
@@ -26021,7 +25580,7 @@
3509
                         dev->features |=  NETIF_F_IPV6_CSUM;
3510
                         if ((tp->mcfg != CFG_METHOD_16) && (tp->mcfg != CFG_METHOD_17)) {
3511
                                 dev->hw_features |= NETIF_F_TSO6;
3512
-                                dev->features |=  NETIF_F_TSO6;
3513
+                                //dev->features |=  NETIF_F_TSO6;
3514
                         }
3515
                         netif_set_gso_max_size(dev, LSO_64K);
3516
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
3517
@@ -26066,6 +25625,8 @@
3518
 
3519
         rtl8168_get_mac_address(dev);
3520
 
3521
+        tp->fw_name = rtl_chip_fw_infos[tp->mcfg].fw_name;
3522
+
3523
 #if defined(ENABLE_DASH_PRINTER_SUPPORT)
3524
         init_completion(&tp->fw_host_ok);
3525
         init_completion(&tp->fw_ack);
3526
@@ -26142,6 +25703,11 @@
3527
         }
3528
 
3529
         rtl8168_release_board(pdev, dev);
3530
+
3531
+#ifdef ENABLE_USE_FIRMWARE_FILE
3532
+        rtl8168_release_firmware(tp);
3533
+#endif
3534
+
3535
         pci_set_drvdata(pdev, NULL);
3536
 }
3537
 
3538
@@ -26154,6 +25720,33 @@
3539
         tp->rx_buf_sz = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 + 1 : RX_BUF_SIZE;
3540
 }
3541
 
3542
+#ifdef ENABLE_USE_FIRMWARE_FILE
3543
+static void rtl8168_request_firmware(struct rtl8168_private *tp)
3544
+{
3545
+        struct rtl8168_fw *rtl_fw;
3546
+
3547
+        /* firmware loaded already or no firmware available */
3548
+        if (tp->rtl_fw || !tp->fw_name)
3549
+                return;
3550
+
3551
+        rtl_fw = kzalloc(sizeof(*rtl_fw), GFP_KERNEL);
3552
+        if (!rtl_fw)
3553
+                return;
3554
+
3555
+        rtl_fw->phy_write = rtl8168_mdio_write;
3556
+        rtl_fw->phy_read = rtl8168_mdio_read;
3557
+        rtl_fw->mac_mcu_write = mac_mcu_write;
3558
+        rtl_fw->mac_mcu_read = mac_mcu_read;
3559
+        rtl_fw->fw_name = tp->fw_name;
3560
+        rtl_fw->dev = tp_to_dev(tp);
3561
+
3562
+        if (rtl8168_fw_request_firmware(rtl_fw))
3563
+                kfree(rtl_fw);
3564
+        else
3565
+                tp->rtl_fw = rtl_fw;
3566
+}
3567
+#endif
3568
+
3569
 static int rtl8168_open(struct net_device *dev)
3570
 {
3571
         struct rtl8168_private *tp = netdev_priv(dev);
3572
@@ -26168,9 +25761,9 @@
3573
 #endif
3574
         rtl8168_set_rxbufsize(tp, dev);
3575
         /*
3576
-         * Rx and Tx descriptors needs 256 bytes alignment.
3577
-         * pci_alloc_consistent provides more.
3578
-         */
3579
+        * Rx and Tx descriptors needs 256 bytes alignment.
3580
+        * pci_alloc_consistent provides more.
3581
+        */
3582
         tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8168_TX_RING_BYTES,
3583
                                              &tp->TxPhyAddr, GFP_KERNEL);
3584
         if (!tp->TxDescArray)
3585
@@ -26181,19 +25774,14 @@
3586
         if (!tp->RxDescArray)
3587
                 goto err_free_all_allocated_mem;
3588
 
3589
-        if (tp->UseSwPaddingShortPkt) {
3590
-                tp->ShortPacketEmptyBuffer = dma_alloc_coherent(&pdev->dev, SHORT_PACKET_PADDING_BUF_SIZE,
3591
-                                             &tp->ShortPacketEmptyBufferPhy, GFP_KERNEL);
3592
-                if (!tp->ShortPacketEmptyBuffer)
3593
-                        goto err_free_all_allocated_mem;
3594
-
3595
-                memset(tp->ShortPacketEmptyBuffer, 0x0, SHORT_PACKET_PADDING_BUF_SIZE);
3596
-        }
3597
-
3598
         retval = rtl8168_init_ring(dev);
3599
         if (retval < 0)
3600
                 goto err_free_all_allocated_mem;
3601
 
3602
+        retval = request_irq(dev->irq, rtl8168_interrupt, (tp->features & RTL_FEATURE_MSI) ? 0 : SA_SHIRQ, dev->name, dev);
3603
+        if (retval<0)
3604
+                goto err_free_all_allocated_mem;
3605
+
3606
         if (netif_msg_probe(tp)) {
3607
                 printk(KERN_INFO "%s: 0x%lx, "
3608
                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
3609
@@ -26205,12 +25793,18 @@
3610
                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
3611
         }
3612
 
3613
+#ifdef ENABLE_USE_FIRMWARE_FILE
3614
+        rtl8168_request_firmware(tp);
3615
+#endif
3616
+
3617
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
3618
-        INIT_WORK(&tp->task, NULL, dev);
3619
+        INIT_WORK(&tp->task, rtl8168_reset_task, dev);
3620
 #else
3621
-        INIT_DELAYED_WORK(&tp->task, NULL);
3622
+        INIT_DELAYED_WORK(&tp->task, rtl8168_reset_task);
3623
 #endif
3624
 
3625
+        pci_set_master(pdev);
3626
+
3627
 #ifdef  CONFIG_R8168_NAPI
3628
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
3629
         RTL_NAPI_ENABLE(dev, &tp->napi);
3630
@@ -26238,10 +25832,6 @@
3631
 
3632
         spin_unlock_irqrestore(&tp->lock, flags);
3633
 
3634
-        retval = request_irq(dev->irq, rtl8168_interrupt, (tp->features & RTL_FEATURE_MSI) ? 0 : SA_SHIRQ, dev->name, dev);
3635
-        if (retval<0)
3636
-                goto err_free_all_allocated_mem;
3637
-
3638
         if (tp->esd_flag == 0)
3639
                 rtl8168_request_esd_timer(dev);
3640
 
3641
@@ -26264,12 +25854,6 @@
3642
                 tp->TxDescArray = NULL;
3643
         }
3644
 
3645
-        if (tp->ShortPacketEmptyBuffer != NULL) {
3646
-                dma_free_coherent(&pdev->dev, ETH_ZLEN, tp->ShortPacketEmptyBuffer,
3647
-                                  tp->ShortPacketEmptyBufferPhy);
3648
-                tp->ShortPacketEmptyBuffer = NULL;
3649
-        }
3650
-
3651
         goto out;
3652
 }
3653
 
3654
@@ -26449,31 +26033,9 @@
3655
         rtl8168_hw_reset(dev);
3656
 
3657
         rtl8168_enable_cfg9346_write(tp);
3658
-        switch (tp->mcfg) {
3659
-        case CFG_METHOD_14:
3660
-        case CFG_METHOD_15:
3661
-        case CFG_METHOD_16:
3662
-        case CFG_METHOD_17:
3663
-        case CFG_METHOD_18:
3664
-        case CFG_METHOD_19:
3665
-        case CFG_METHOD_20:
3666
-        case CFG_METHOD_21:
3667
-        case CFG_METHOD_22:
3668
-        case CFG_METHOD_23:
3669
-        case CFG_METHOD_24:
3670
-        case CFG_METHOD_25:
3671
-        case CFG_METHOD_26:
3672
-        case CFG_METHOD_27:
3673
-        case CFG_METHOD_28:
3674
-        case CFG_METHOD_29:
3675
-        case CFG_METHOD_30:
3676
-        case CFG_METHOD_31:
3677
-        case CFG_METHOD_32:
3678
-        case CFG_METHOD_33:
3679
+        if (tp->HwSuppAspmClkIntrLock) {
3680
                 RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
3681
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
3682
-                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
3683
-                break;
3684
+                rtl8168_hw_aspm_clkreq_enable(tp, false);
3685
         }
3686
 
3687
         //clear io_rdy_l23
3688
@@ -26772,8 +26334,10 @@
3689
 
3690
                 RTL_W8(tp, TDFNR, 0x8);
3691
 
3692
+                /*
3693
                 if (aspm)
3694
-                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3695
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3696
+                */
3697
 
3698
                 RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_3);
3699
 
3700
@@ -26788,9 +26352,6 @@
3701
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
3702
                 rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
3703
                 rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
3704
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
3705
-                csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
3706
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
3707
                 csi_tmp = rtl8168_eri_read(tp, 0x1D0, 4, ERIAR_ExGMAC);
3708
                 csi_tmp |= BIT_1;
3709
                 rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
3710
@@ -26844,8 +26405,10 @@
3711
                 csi_tmp |= BIT_0;
3712
                 rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
3713
 
3714
+                /*
3715
                 if (aspm)
3716
-                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3717
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3718
+                */
3719
 
3720
                 if (dev->mtu > ETH_DATA_LEN)
3721
                         RTL_W8(tp, MTPS, 0x27);
3722
@@ -26857,9 +26420,6 @@
3723
 
3724
                 rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
3725
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
3726
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
3727
-                csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
3728
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
3729
                 RTL_W8(tp, 0x1B,RTL_R8(tp, 0x1B) & ~0x07);
3730
 
3731
                 csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC);
3732
@@ -26884,8 +26444,10 @@
3733
                 csi_tmp |= BIT_0;
3734
                 rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
3735
 
3736
+                /*
3737
                 if (aspm)
3738
-                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3739
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3740
+                */
3741
 
3742
                 if (dev->mtu > ETH_DATA_LEN)
3743
                         RTL_W8(tp, MTPS, 0x27);
3744
@@ -26896,9 +26458,6 @@
3745
                 RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
3746
                 rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
3747
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
3748
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
3749
-                csi_tmp |= BIT_10 | BIT_11;
3750
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
3751
 
3752
                 csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC);
3753
                 csi_tmp |= BIT_4;
3754
@@ -26933,7 +26492,7 @@
3755
                 if (tp->mcfg == CFG_METHOD_26) {
3756
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C0);
3757
                         mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
3758
-                        mac_ocp_data |= 0x03A9;
3759
+                        mac_ocp_data |= 0x0FFF;
3760
                         rtl8168_mac_ocp_write(tp, 0xD3C0, mac_ocp_data);
3761
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C2);
3762
                         mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
3763
@@ -26952,18 +26511,18 @@
3764
 
3765
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056);
3766
                         mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
3767
-                        mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
3768
+                        //mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
3769
                         rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data);
3770
 
3771
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
3772
-                        mac_ocp_data &= ~( BIT_14 | BIT_13);
3773
+                        mac_ocp_data &= ~(BIT_15 | BIT_14 | BIT_13 | BIT_3);
3774
                         mac_ocp_data |= BIT_15;
3775
-                        mac_ocp_data |= BIT_3;
3776
+                        //mac_ocp_data |= BIT_3;
3777
                         rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data);
3778
 
3779
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD420);
3780
                         mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
3781
-                        mac_ocp_data |= 0x47F;
3782
+                        mac_ocp_data |= 0x45F;
3783
                         rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data);
3784
 
3785
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE0D6);
3786
@@ -26980,8 +26539,10 @@
3787
 
3788
                 RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
3789
 
3790
+                /*
3791
                 if (aspm)
3792
-                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3793
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3794
+                */
3795
 
3796
                 if (dev->mtu > ETH_DATA_LEN)
3797
                         RTL_W8(tp, MTPS, 0x27);
3798
@@ -26994,23 +26555,18 @@
3799
                 rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
3800
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
3801
 
3802
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30)
3803
-                        rtl8168_mac_ocp_write(tp, 0xE054, 0xFC01);
3804
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
3805
+                        rtl8168_mac_ocp_write(tp, 0xE054, 0x0000);
3806
 
3807
-                rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
3808
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
3809
+                } else {
3810
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
3811
+                }
3812
 
3813
                 if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
3814
-                        csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
3815
-                        csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
3816
-                        rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
3817
-
3818
                         csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC);
3819
                         csi_tmp |= (BIT_2 | BIT_3 | BIT_4);
3820
                         rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
3821
-                } else {
3822
-                        csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
3823
-                        csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
3824
-                        rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
3825
                 }
3826
 
3827
                 if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
3828
@@ -27070,8 +26626,10 @@
3829
 
3830
                 RTL_W8(tp, TDFNR, 0x4);
3831
 
3832
+                /*
3833
                 if (aspm)
3834
-                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3835
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3836
+                */
3837
 
3838
                 csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
3839
                 csi_tmp &= ~BIT_12;
3840
@@ -27079,7 +26637,7 @@
3841
 
3842
                 csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
3843
                 csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2);
3844
-                csi_tmp |= BIT_0;
3845
+                csi_tmp |= (BIT_0 | BIT_1);
3846
                 rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
3847
 
3848
                 csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
3849
@@ -27095,17 +26653,13 @@
3850
                         rtl8168_oob_mutex_unlock(tp);
3851
                 }
3852
 
3853
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
3854
-                csi_tmp  |= ( BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12 );
3855
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
3856
-
3857
                 rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
3858
                 rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
3859
 
3860
                 if (tp->mcfg == CFG_METHOD_28) {
3861
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3E2);
3862
                         mac_ocp_data &= 0xF000;
3863
-                        mac_ocp_data |= 0x3A9;
3864
+                        mac_ocp_data |= 0xAFD;
3865
                         rtl8168_mac_ocp_write(tp, 0xD3E2, mac_ocp_data);
3866
 
3867
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3E4);
3868
@@ -27143,8 +26697,6 @@
3869
 
3870
                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056);
3871
                 mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
3872
-                if (FALSE == HW_SUPP_SERDES_PHY(tp))
3873
-                        mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
3874
                 rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data);
3875
                 if (FALSE == HW_SUPP_SERDES_PHY(tp))
3876
                         rtl8168_mac_ocp_write(tp, 0xEA80, 0x0003);
3877
@@ -27154,17 +26706,12 @@
3878
                 rtl8168_oob_mutex_lock(tp);
3879
                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
3880
                 mac_ocp_data &= ~(BIT_3 | BIT_0);
3881
-                if (FALSE == HW_SUPP_SERDES_PHY(tp)) {
3882
-                        mac_ocp_data |= BIT_0;
3883
-                        if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
3884
-                                mac_ocp_data |= BIT_3;
3885
-                }
3886
                 rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data);
3887
                 rtl8168_oob_mutex_unlock(tp);
3888
 
3889
                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD420);
3890
                 mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
3891
-                mac_ocp_data |= 0x47F;
3892
+                mac_ocp_data |= 0x45F;
3893
                 rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data);
3894
 
3895
                 RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
3896
@@ -27175,8 +26722,10 @@
3897
 
3898
                 RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
3899
 
3900
+                /*
3901
                 if (aspm)
3902
-                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3903
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
3904
+                */
3905
 
3906
                 if (dev->mtu > ETH_DATA_LEN)
3907
                         RTL_W8(tp, MTPS, 0x27);
3908
@@ -27195,17 +26744,14 @@
3909
                 rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
3910
 
3911
                 rtl8168_oob_mutex_lock(tp);
3912
-                if (FALSE == HW_SUPP_SERDES_PHY(tp))
3913
-                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
3914
-                else
3915
-                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4080, ERIAR_ExGMAC);
3916
+                rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
3917
                 rtl8168_oob_mutex_unlock(tp);
3918
 
3919
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
3920
-                csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
3921
-                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
3922
-                        csi_tmp|= BIT_4;
3923
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
3924
+                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33) {
3925
+                        csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
3926
+                        csi_tmp |= BIT_4;
3927
+                        rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
3928
+                }
3929
 
3930
                 rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
3931
                 rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
3932
@@ -27317,6 +26863,8 @@
3933
 
3934
         rtl8168_hw_clear_timer_int(dev);
3935
 
3936
+        rtl8168_enable_exit_l1_mask(tp);
3937
+
3938
         switch (tp->mcfg) {
3939
         case CFG_METHOD_25:
3940
                 rtl8168_mac_ocp_write(tp, 0xD3C0, 0x0B00);
3941
@@ -27448,36 +26996,8 @@
3942
                 NICChkTypeEnableDashInterrupt(tp);
3943
 #endif
3944
 
3945
-        switch (tp->mcfg) {
3946
-        case CFG_METHOD_14:
3947
-        case CFG_METHOD_15:
3948
-        case CFG_METHOD_16:
3949
-        case CFG_METHOD_17:
3950
-        case CFG_METHOD_18:
3951
-        case CFG_METHOD_19:
3952
-        case CFG_METHOD_20:
3953
-        case CFG_METHOD_21:
3954
-        case CFG_METHOD_22:
3955
-        case CFG_METHOD_23:
3956
-        case CFG_METHOD_24:
3957
-        case CFG_METHOD_25:
3958
-        case CFG_METHOD_26:
3959
-        case CFG_METHOD_27:
3960
-        case CFG_METHOD_28:
3961
-        case CFG_METHOD_29:
3962
-        case CFG_METHOD_30:
3963
-        case CFG_METHOD_31:
3964
-        case CFG_METHOD_32:
3965
-        case CFG_METHOD_33:
3966
-                if (aspm) {
3967
-                        RTL_W8(tp, Config5, RTL_R8(tp, Config5) | BIT_0);
3968
-                        RTL_W8(tp, Config2, RTL_R8(tp, Config2) | BIT_7);
3969
-                } else {
3970
-                        RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
3971
-                        RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
3972
-                }
3973
-                break;
3974
-        }
3975
+        if (tp->HwSuppAspmClkIntrLock)
3976
+                rtl8168_hw_aspm_clkreq_enable(tp, true);
3977
 
3978
         rtl8168_disable_cfg9346_write(tp);
3979
 
3980
@@ -27494,7 +27014,6 @@
3981
         rtl8168_enable_hw_interrupt(tp);
3982
 }
3983
 
3984
-
3985
 static int
3986
 rtl8168_change_mtu(struct net_device *dev,
3987
                    int new_mtu)
3988
@@ -27504,7 +27023,7 @@
3989
         unsigned long flags;
3990
 
3991
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
3992
-        if (new_mtu < ETH_ZLEN)
3993
+        if (new_mtu < ETH_MIN_MTU)
3994
                 return -EINVAL;
3995
         else if (new_mtu > tp->max_jumbo_frame_size)
3996
                 new_mtu = tp->max_jumbo_frame_size;
3997
@@ -27615,9 +27134,9 @@
3998
 
3999
         skb_reserve(skb, RTK_RX_ALIGN);
4000
 
4001
-        mapping = dma_map_single(&tp->pci_dev->dev, skb->data, rx_buf_sz,
4002
+        mapping = dma_map_single(tp_to_dev(tp), skb->data, rx_buf_sz,
4003
                                  DMA_FROM_DEVICE);
4004
-        if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
4005
+        if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
4006
                 if (unlikely(net_ratelimit()))
4007
                         netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
4008
                 goto err_out;
4009
@@ -27710,6 +27229,8 @@
4010
         int i = 0;
4011
         int ownbit = 0;
4012
 
4013
+        if (tp->RxDescArray == NULL) return;
4014
+
4015
         if (own)
4016
                 ownbit = DescOwn;
4017
 
4018
@@ -27978,8 +27499,7 @@
4019
 static int
4020
 rtl8168_xmit_frags(struct rtl8168_private *tp,
4021
                    struct sk_buff *skb,
4022
-                   u32 opts1,
4023
-                   u32 opts2)
4024
+                   const u32 *opts)
4025
 {
4026
         struct skb_shared_info *info = skb_shinfo(skb);
4027
         unsigned int cur_frag, entry;
4028
@@ -28003,9 +27523,9 @@
4029
                 len = skb_frag_size(frag);
4030
                 addr = skb_frag_address(frag);
4031
 #endif
4032
-                mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE);
4033
+                mapping = dma_map_single(tp_to_dev(tp), addr, len, DMA_TO_DEVICE);
4034
 
4035
-                if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
4036
+                if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
4037
                         if (unlikely(net_ratelimit()))
4038
                                 netif_err(tp, drv, tp->dev,
4039
                                           "Failed to map TX fragments DMA!\n");
4040
@@ -28013,7 +27533,7 @@
4041
                 }
4042
 
4043
                 /* anti gcc 2.95.3 bugware (sic) */
4044
-                status = rtl8168_get_txd_opts1(opts1, len, entry);
4045
+                status = rtl8168_get_txd_opts1(opts[0], len, entry);
4046
                 if (cur_frag == (nr_frags - 1)) {
4047
                         tp->tx_skb[entry].skb = skb;
4048
                         status |= LastFrag;
4049
@@ -28023,7 +27543,7 @@
4050
 
4051
                 tp->tx_skb[entry].len = len;
4052
 
4053
-                txd->opts2 = cpu_to_le32(opts2);
4054
+                txd->opts2 = cpu_to_le32(opts[1]);
4055
                 wmb();
4056
                 txd->opts1 = cpu_to_le32(status);
4057
         }
4058
@@ -28038,6 +27558,9 @@
4059
 static inline
4060
 __be16 get_protocol(struct sk_buff *skb)
4061
 {
4062
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)
4063
+        return vlan_get_protocol(skb);
4064
+#else
4065
         __be16 protocol;
4066
 
4067
         if (skb->protocol == htons(ETH_P_8021Q))
4068
@@ -28046,11 +27569,25 @@
4069
                 protocol = skb->protocol;
4070
 
4071
         return protocol;
4072
+#endif
4073
 }
4074
 
4075
-static inline u32
4076
+static bool rtl8168_skb_pad(struct sk_buff *skb)
4077
+{
4078
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0)
4079
+        if (skb_padto(skb, ETH_ZLEN))
4080
+                return false;
4081
+        skb_put(skb, ETH_ZLEN - skb->len);
4082
+        return true;
4083
+#else
4084
+        return !eth_skb_pad(skb);
4085
+#endif
4086
+}
4087
+
4088
+static inline bool
4089
 rtl8168_tx_csum(struct sk_buff *skb,
4090
-                struct net_device *dev)
4091
+                struct net_device *dev,
4092
+                u32 *opts)
4093
 {
4094
         struct rtl8168_private *tp = netdev_priv(dev);
4095
         u32 csum_cmd = 0;
4096
@@ -28107,8 +27644,22 @@
4097
                 }
4098
         }
4099
 
4100
-        if (tp->ShortPacketSwChecksum && skb->len < 60 && csum_cmd != 0)
4101
-                sw_calc_csum = TRUE;
4102
+        if (csum_cmd != 0) {
4103
+                if (tp->ShortPacketSwChecksum && skb->len < ETH_ZLEN) {
4104
+                        sw_calc_csum = TRUE;
4105
+                        if (!rtl8168_skb_pad(skb))
4106
+                                return false;
4107
+                } else {
4108
+                        if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3))
4109
+                                opts[0] |= csum_cmd;
4110
+                        else
4111
+                                opts[1] |= csum_cmd;
4112
+                }
4113
+        }
4114
+
4115
+        if (tp->UseSwPaddingShortPkt && skb->len < ETH_ZLEN)
4116
+                if (!rtl8168_skb_pad(skb))
4117
+                        return false;
4118
 
4119
         if (sw_calc_csum) {
4120
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7)
4121
@@ -28118,58 +27669,14 @@
4122
 #else
4123
                 skb_checksum_help(skb);
4124
 #endif
4125
-                csum_cmd = 0;
4126
         }
4127
 
4128
-        return csum_cmd;
4129
-}
4130
-
4131
-static int
4132
-rtl8168_sw_padding_short_pkt(struct rtl8168_private *tp,
4133
-                             struct sk_buff *skb,
4134
-                             u32 opts1,
4135
-                             u32 opts2)
4136
-{
4137
-        unsigned int entry;
4138
-        dma_addr_t mapping;
4139
-        u32 status, len;
4140
-        void *addr;
4141
-        struct TxDesc *txd = NULL;
4142
-        int ret = 0;
4143
-
4144
-        if (skb->len >= ETH_ZLEN)
4145
-                goto out;
4146
-
4147
-        entry = tp->cur_tx;
4148
-
4149
-        entry = (entry + 1) % NUM_TX_DESC;
4150
-
4151
-        txd = tp->TxDescArray + entry;
4152
-        len = ETH_ZLEN - skb->len;
4153
-        addr = tp->ShortPacketEmptyBuffer;
4154
-        mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE);
4155
-        if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
4156
-                if (unlikely(net_ratelimit()))
4157
-                        netif_err(tp, drv, tp->dev,
4158
-                                  "Failed to map Short Packet Buffer DMA!\n");
4159
-                ret = -ENOMEM;
4160
-                goto out;
4161
-        }
4162
-        status = rtl8168_get_txd_opts1(opts1, len, entry);
4163
-        status |= LastFrag;
4164
-
4165
-        txd->addr = cpu_to_le64(mapping);
4166
-
4167
-        txd->opts2 = cpu_to_le32(opts2);
4168
-        wmb();
4169
-        txd->opts1 = cpu_to_le32(status);
4170
-out:
4171
-        return ret;
4172
+        return true;
4173
 }
4174
 
4175
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
4176
 /* r8169_csum_workaround()
4177
-  * The hw limites the value the transport offset. When the offset is out of the
4178
+  * The hw limits the value the transport offset. When the offset is out of the
4179
   * range, calculate the checksum by sw.
4180
   */
4181
 static void r8168_csum_workaround(struct rtl8168_private *tp,
4182
@@ -28240,7 +27747,7 @@
4183
         return slots_avail > nr_frags;
4184
 }
4185
 
4186
-static int
4187
+static netdev_tx_t
4188
 rtl8168_start_xmit(struct sk_buff *skb,
4189
                    struct net_device *dev)
4190
 {
4191
@@ -28249,9 +27756,8 @@
4192
         struct TxDesc *txd;
4193
         dma_addr_t mapping;
4194
         u32 len;
4195
-        u32 opts1;
4196
-        u32 opts2;
4197
-        int ret = NETDEV_TX_OK;
4198
+        u32 opts[2];
4199
+        netdev_tx_t ret = NETDEV_TX_OK;
4200
         unsigned long flags, large_send;
4201
         int frags;
4202
 
4203
@@ -28278,8 +27784,8 @@
4204
                 goto err_stop;
4205
         }
4206
 
4207
-        opts1 = DescOwn;
4208
-        opts2 = rtl8168_tx_vlan_tag(tp, skb);
4209
+        opts[0] = DescOwn;
4210
+        opts[1] = rtl8168_tx_vlan_tag(tp, skb);
4211
 
4212
         large_send = 0;
4213
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
4214
@@ -28295,16 +27801,16 @@
4215
                         if ((tp->mcfg == CFG_METHOD_1) ||
4216
                             (tp->mcfg == CFG_METHOD_2) ||
4217
                             (tp->mcfg == CFG_METHOD_3)) {
4218
-                                opts1 |= LargeSend | (min(mss, MSS_MAX) << 16);
4219
+                                opts[0] |= LargeSend | (min(mss, MSS_MAX) << 16);
4220
                                 large_send = 1;
4221
                         } else {
4222
                                 u32 transport_offset = (u32)skb_transport_offset(skb);
4223
                                 switch (get_protocol(skb)) {
4224
                                 case __constant_htons(ETH_P_IP):
4225
-                                        if (transport_offset <= 128) {
4226
-                                                opts1 |= GiantSendv4;
4227
-                                                opts1 |= transport_offset << GTTCPHO_SHIFT;
4228
-                                                opts2 |= min(mss, MSS_MAX) << 18;
4229
+                                        if (transport_offset <= GTTCPHO_MAX) {
4230
+                                                opts[0] |= GiantSendv4;
4231
+                                                opts[0] |= transport_offset << GTTCPHO_SHIFT;
4232
+                                                opts[1] |= min(mss, MSS_MAX) << 18;
4233
                                                 large_send = 1;
4234
                                         }
4235
                                         break;
4236
@@ -28316,10 +27822,10 @@
4237
                                                 goto out;
4238
                                         }
4239
 #endif
4240
-                                        if (transport_offset <= 128) {
4241
-                                                opts1 |= GiantSendv6;
4242
-                                                opts1 |= transport_offset << GTTCPHO_SHIFT;
4243
-                                                opts2 |= min(mss, MSS_MAX) << 18;
4244
+                                        if (transport_offset <= GTTCPHO_MAX) {
4245
+                                                opts[0] |= GiantSendv6;
4246
+                                                opts[0] |= transport_offset << GTTCPHO_SHIFT;
4247
+                                                opts[1] |= min(mss, MSS_MAX) << 18;
4248
                                                 large_send = 1;
4249
                                         }
4250
                                         break;
4251
@@ -28337,47 +27843,36 @@
4252
 #endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
4253
 
4254
         if (large_send == 0) {
4255
-                if (skb->ip_summed == CHECKSUM_PARTIAL) {
4256
-                        if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3))
4257
-                                opts1 |= rtl8168_tx_csum(skb, dev);
4258
-                        else
4259
-                                opts2 |= rtl8168_tx_csum(skb, dev);
4260
-                }
4261
+                if (unlikely(!rtl8168_tx_csum(skb, dev, opts)))
4262
+                        goto err_dma_0;
4263
         }
4264
 
4265
-        frags = rtl8168_xmit_frags(tp, skb, opts1, opts2);
4266
+        frags = rtl8168_xmit_frags(tp, skb, opts);
4267
         if (unlikely(frags < 0))
4268
                 goto err_dma_0;
4269
         if (frags) {
4270
                 len = skb_headlen(skb);
4271
-                opts1 |= FirstFrag;
4272
+                opts[0] |= FirstFrag;
4273
         } else {
4274
                 len = skb->len;
4275
 
4276
                 tp->tx_skb[entry].skb = skb;
4277
 
4278
-                if (tp->UseSwPaddingShortPkt && len < 60) {
4279
-                        if (unlikely(rtl8168_sw_padding_short_pkt(tp, skb, opts1, opts2)))
4280
-                                goto err_dma_1;
4281
-                        opts1 |= FirstFrag;
4282
-                        frags++;
4283
-                } else {
4284
-                        opts1 |= FirstFrag | LastFrag;
4285
-                }
4286
+                opts[0] |= FirstFrag | LastFrag;
4287
         }
4288
 
4289
-        opts1 = rtl8168_get_txd_opts1(opts1, len, entry);
4290
-        mapping = dma_map_single(&tp->pci_dev->dev, skb->data, len, DMA_TO_DEVICE);
4291
-        if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
4292
+        opts[0] = rtl8168_get_txd_opts1(opts[0], len, entry);
4293
+        mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
4294
+        if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
4295
                 if (unlikely(net_ratelimit()))
4296
                         netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
4297
                 goto err_dma_1;
4298
         }
4299
         tp->tx_skb[entry].len = len;
4300
         txd->addr = cpu_to_le64(mapping);
4301
-        txd->opts2 = cpu_to_le32(opts2);
4302
+        txd->opts2 = cpu_to_le32(opts[1]);
4303
         wmb();
4304
-        txd->opts1 = cpu_to_le32(opts1);
4305
+        txd->opts1 = cpu_to_le32(opts[0]);
4306
 
4307
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
4308
         dev->trans_start = jiffies;
4309
@@ -28431,6 +27926,7 @@
4310
         dirty_tx = tp->dirty_tx;
4311
         smp_rmb();
4312
         tx_left = tp->cur_tx - dirty_tx;
4313
+        tp->dynamic_aspm_packet_count += tx_left;
4314
 
4315
         while (tx_left > 0) {
4316
                 unsigned int entry = dirty_tx % NUM_TX_DESC;
4317
@@ -28462,6 +27958,8 @@
4318
                 tx_left--;
4319
         }
4320
 
4321
+        tp->dynamic_aspm_packet_count -= tx_left;
4322
+
4323
         if (tp->dirty_tx != dirty_tx) {
4324
                 tp->dirty_tx = dirty_tx;
4325
                 smp_wmb();
4326
@@ -28573,7 +28071,7 @@
4327
         assert(dev != NULL);
4328
         assert(tp != NULL);
4329
 
4330
-        if ((tp->RxDescArray == NULL) || (tp->Rx_skbuff == NULL))
4331
+        if (tp->RxDescArray == NULL)
4332
                 goto rx_out;
4333
 
4334
         rx_quota = RTL_RX_QUOTA(budget);
4335
@@ -28629,17 +28127,17 @@
4336
 
4337
                         skb = tp->Rx_skbuff[entry];
4338
 
4339
-                        dma_sync_single_for_cpu(&tp->pci_dev->dev,
4340
+                        dma_sync_single_for_cpu(tp_to_dev(tp),
4341
                                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
4342
                                                 DMA_FROM_DEVICE);
4343
 
4344
                         if (rtl8168_try_rx_copy(tp, &skb, pkt_size,
4345
                                                 desc, tp->rx_buf_sz)) {
4346
                                 tp->Rx_skbuff[entry] = NULL;
4347
-                                dma_unmap_single(&tp->pci_dev->dev, le64_to_cpu(desc->addr),
4348
+                                dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr),
4349
                                                  tp->rx_buf_sz, DMA_FROM_DEVICE);
4350
                         } else {
4351
-                                dma_sync_single_for_device(&tp->pci_dev->dev, le64_to_cpu(desc->addr),
4352
+                                dma_sync_single_for_device(tp_to_dev(tp), le64_to_cpu(desc->addr),
4353
                                                            tp->rx_buf_sz, DMA_FROM_DEVICE);
4354
                         }
4355
 
4356
@@ -28678,6 +28176,8 @@
4357
                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
4358
         tp->dirty_rx += delta;
4359
 
4360
+        tp->dynamic_aspm_packet_count += delta;
4361
+
4362
         /*
4363
          * FIXME: until there is periodic timer to try and refill the ring,
4364
          * a temporary shortage may definitely kill the Rx process.
4365
@@ -28905,6 +28405,8 @@
4366
 {
4367
         struct rtl8168_private *tp = netdev_priv(dev);
4368
 
4369
+        if (tp->wol_enabled != WOL_ENABLED) return;
4370
+
4371
         if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2)) {
4372
                 RTL_W8(tp, ChipCmd, CmdReset);
4373
                 rtl8168_rx_desc_offset0_init(tp, 0);
4374
@@ -28955,8 +28457,6 @@
4375
 
4376
         rtl8168_rx_clear(tp);
4377
 
4378
-        rtl8168_sleep_rx_enable(dev);
4379
-
4380
         spin_unlock_irqrestore(&tp->lock, flags);
4381
 }
4382
 
4383
@@ -28971,12 +28471,16 @@
4384
 
4385
                 rtl8168_down(dev);
4386
 
4387
+                pci_clear_master(tp->pci_dev);
4388
+
4389
                 spin_lock_irqsave(&tp->lock, flags);
4390
 
4391
                 rtl8168_hw_d3_para(dev);
4392
 
4393
                 rtl8168_powerdown_pll(dev);
4394
 
4395
+                rtl8168_sleep_rx_enable(dev);
4396
+
4397
                 spin_unlock_irqrestore(&tp->lock, flags);
4398
 
4399
                 free_irq(dev->irq, dev);
4400
@@ -28987,12 +28491,6 @@
4401
                                   tp->TxPhyAddr);
4402
                 tp->TxDescArray = NULL;
4403
                 tp->RxDescArray = NULL;
4404
-
4405
-                if (tp->ShortPacketEmptyBuffer != NULL) {
4406
-                        dma_free_coherent(&pdev->dev, SHORT_PACKET_PADDING_BUF_SIZE, tp->ShortPacketEmptyBuffer,
4407
-                                          tp->ShortPacketEmptyBufferPhy);
4408
-                        tp->ShortPacketEmptyBuffer = NULL;
4409
-                }
4410
         } else {
4411
                 spin_lock_irqsave(&tp->lock, flags);
4412
 
4413
@@ -29028,6 +28526,13 @@
4414
 
4415
         rtl8168_close(dev);
4416
         rtl8168_disable_msi(pdev, tp);
4417
+
4418
+        if (system_state == SYSTEM_POWER_OFF) {
4419
+                pci_clear_master(tp->pci_dev);
4420
+                rtl8168_sleep_rx_enable(dev);
4421
+                pci_wake_from_d3(pdev, tp->wol_enabled);
4422
+                pci_set_power_state(pdev, PCI_D3hot);
4423
+        }
4424
 }
4425
 #endif
4426
 
4427
@@ -29089,7 +28594,7 @@
4428
 
4429
         rtl8168_hw_reset(dev);
4430
 
4431
-        rtl8168_sleep_rx_enable(dev);
4432
+        pci_clear_master(pdev);
4433
 
4434
         rtl8168_hw_d3_para(dev);
4435
 
4436
@@ -29099,6 +28604,8 @@
4437
 
4438
         rtl8168_powerdown_pll(dev);
4439
 
4440
+        rtl8168_sleep_rx_enable(dev);
4441
+
4442
         spin_unlock_irqrestore(&tp->lock, flags);
4443
 
4444
 out:
4445
@@ -29153,6 +28660,8 @@
4446
                 goto out;
4447
         }
4448
 
4449
+        pci_set_master(pdev);
4450
+
4451
         spin_lock_irqsave(&tp->lock, flags);
4452
 
4453
         rtl8168_exit_oob(dev);
4454
@@ -29167,6 +28676,8 @@
4455
 
4456
         rtl8168_hw_phy_config(dev);
4457
 
4458
+        rtl8168_hw_config(dev);
4459
+
4460
         spin_unlock_irqrestore(&tp->lock, flags);
4461
 
4462
         rtl8168_schedule_work(dev, rtl8168_reset_task);
4463
r8168-8.048.03.tar.gz/src/r8168_realwow.h -> r8168-8.049.02.tar.gz/src/r8168_realwow.h Changed
14
 
1
@@ -1,10 +1,11 @@
2
+/* SPDX-License-Identifier: GPL-2.0-only */
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
r8168-8.048.03.tar.gz/src/rtl_eeprom.c -> r8168-8.049.02.tar.gz/src/rtl_eeprom.c Changed
14
 
1
@@ -1,10 +1,11 @@
2
+// SPDX-License-Identifier: GPL-2.0-only
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
r8168-8.048.03.tar.gz/src/rtl_eeprom.h -> r8168-8.049.02.tar.gz/src/rtl_eeprom.h Changed
14
 
1
@@ -1,10 +1,11 @@
2
+/* SPDX-License-Identifier: GPL-2.0-only */
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
r8168-8.048.03.tar.gz/src/rtltool.c -> r8168-8.049.02.tar.gz/src/rtltool.c Changed
14
 
1
@@ -1,10 +1,11 @@
2
+// SPDX-License-Identifier: GPL-2.0-only
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
r8168-8.048.03.tar.gz/src/rtltool.h -> r8168-8.049.02.tar.gz/src/rtltool.h Changed
14
 
1
@@ -1,10 +1,11 @@
2
+/* SPDX-License-Identifier: GPL-2.0-only */
3
 /*
4
 ################################################################################
5
 #
6
 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
7
 # controllers with PCI-Express interface.
8
 #
9
-# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
10
+# Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
11
 #
12
 # This program is free software; you can redistribute it and/or modify it
13
 # under the terms of the GNU General Public License as published by the Free
14
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Request History
Luigi Baldoni's avatar

Aloysius created request over 3 years ago

Update to 8.049.02


bitstreamout's avatar

bitstreamout accepted request over 3 years ago

Thanks